tcg: Introduce tcg_set_insn_start_param

The parameters for tcg_gen_insn_start are target_ulong, which may be split
into two TCGArg parameters for storage in the opcode on 32-bit hosts.

Fixes the ARM target and its direct use of tcg_set_insn_param, which would
set the wrong argument in the 64-on-32 case.

Backports commit 9743cd5736263e90d312b2c33bd739ffe1eae70d from qemu
This commit is contained in:
Richard Henderson 2018-04-11 19:33:23 -04:00 committed by Lioncash
parent 8f26d8e556
commit 49476ebf5e
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GPG key ID: 4E3C3CC1031BA9C7
2 changed files with 11 additions and 1 deletions

View file

@ -117,7 +117,7 @@ static inline void disas_set_insn_syndrome(DisasContext *s, uint32_t syn)
/* We check and clear insn_start_idx to catch multiple updates. */
assert(s->insn_start != NULL);
tcg_set_insn_param(s->insn_start, 2, syn);
tcg_set_insn_start_param(s->insn_start, 2, syn);
s->insn_start = NULL;
}

View file

@ -1036,6 +1036,16 @@ static inline void tcg_set_insn_param(TCGOp *op, int arg, TCGArg v)
op->args[arg] = v;
}
static inline void tcg_set_insn_start_param(TCGOp *op, int arg, target_ulong v)
{
#if TARGET_LONG_BITS <= TCG_TARGET_REG_BITS
tcg_set_insn_param(op, arg, v);
#else
tcg_set_insn_param(op, arg * 2, v);
tcg_set_insn_param(op, arg * 2 + 1, v >> 32);
#endif
}
/* The last op that was emitted. */
static inline TCGOp *tcg_last_op(TCGContext *tcg_ctx)
{