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Backport optimizations to AArch64's REV16 handling

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Backports commits abb1066df313602ef0ca631126bd342d399d5359 and e4256c3cbf7eefebc0bc6e1f472c47c6dd20b996 from qemu.
This commit is contained in:
Lioncash 2018-02-04 14:45:33 -05:00
parent 9ff703fd60
commit 4a8a92bad2
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GPG key ID: 4E3C3CC1031BA9C7
1 changed files with 7 additions and 18 deletions
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25
qemu/target-arm/translate-a64.c
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@ -3789,26 +3789,15 @@ static void handle_rev16(DisasContext *s, unsigned int sf,
TCGv_i64 tcg_rd = cpu_reg(s, rd);
TCGv_i64 tcg_tmp = tcg_temp_new_i64(tcg_ctx);
TCGv_i64 tcg_rn = read_cpu_reg(s, rn, sf);
TCGv_i64 mask = tcg_const_i64(tcg_ctx, sf ? 0x00ff00ff00ff00ffull : 0x00ff00ff);
tcg_gen_andi_i64(tcg_ctx, tcg_tmp, tcg_rn, 0xffff);
tcg_gen_bswap16_i64(tcg_ctx, tcg_rd, tcg_tmp);
tcg_gen_shri_i64(tcg_ctx, tcg_tmp, tcg_rn, 16);
tcg_gen_andi_i64(tcg_ctx, tcg_tmp, tcg_tmp, 0xffff);
tcg_gen_bswap16_i64(tcg_ctx, tcg_tmp, tcg_tmp);
tcg_gen_deposit_i64(tcg_ctx, tcg_rd, tcg_rd, tcg_tmp, 16, 16);
if (sf) {
tcg_gen_shri_i64(tcg_ctx, tcg_tmp, tcg_rn, 32);
tcg_gen_andi_i64(tcg_ctx, tcg_tmp, tcg_tmp, 0xffff);
tcg_gen_bswap16_i64(tcg_ctx, tcg_tmp, tcg_tmp);
tcg_gen_deposit_i64(tcg_ctx, tcg_rd, tcg_rd, tcg_tmp, 32, 16);
tcg_gen_shri_i64(tcg_ctx, tcg_tmp, tcg_rn, 48);
tcg_gen_bswap16_i64(tcg_ctx, tcg_tmp, tcg_tmp);
tcg_gen_deposit_i64(tcg_ctx, tcg_rd, tcg_rd, tcg_tmp, 48, 16);
}
tcg_gen_shri_i64(tcg_ctx, tcg_tmp, tcg_rn, 8);
tcg_gen_and_i64(tcg_ctx, tcg_rd, tcg_rn, mask);
tcg_gen_and_i64(tcg_ctx, tcg_tmp, tcg_tmp, mask);
tcg_gen_shli_i64(tcg_ctx, tcg_rd, tcg_rd, 8);
tcg_gen_or_i64(tcg_ctx, tcg_rd, tcg_rd, tcg_tmp);
tcg_temp_free_i64(tcg_ctx, mask);
tcg_temp_free_i64(tcg_ctx, tcg_tmp);
}