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target/riscv: Mark privilege level 2 as reserved

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Backports commit 356d74192a035c71a78a22d24812a6df6099ae40 from qemu
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Alistair Francis 2019-05-28 19:12:08 -04:00 committed by Lioncash
parent ea2fee2d4d
commit 4b0355dcfc
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1 changed files with 1 additions and 1 deletions
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2
qemu/target/riscv/cpu_bits.h
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@ -383,7 +383,7 @@
/* Privilege modes */ /* Privilege modes */
#define PRV_U 0 #define PRV_U 0
#define PRV_S 1 #define PRV_S 1
#define PRV_H 2 #define PRV_H 2 /* Reserved */
#define PRV_M 3 #define PRV_M 3
/* RV32 satp CSR field masks */ /* RV32 satp CSR field masks */