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target/arm: Decode aa64 armv8.3 fcadd

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Backports commit 1695cd61b08d4376c11e0658836c4f08b4fc3aa1 from qemu
This commit is contained in:
Richard Henderson 2018-03-09 00:55:38 -05:00 committed by Lioncash
parent 0b1ab3e745
commit 4b39a36416
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GPG key ID: 4E3C3CC1031BA9C7
16 changed files with 98 additions and 1 deletions
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3
qemu/aarch64.h
View file

@ -993,6 +993,9 @@
#define helper_gvec_eq16 helper_gvec_eq16_aarch64
#define helper_gvec_eq32 helper_gvec_eq32_aarch64
#define helper_gvec_eq64 helper_gvec_eq64_aarch64
#define helper_gvec_fcaddh helper_gvec_fcaddh_aarch64
#define helper_gvec_fcadds helper_gvec_fcadds_aarch64
#define helper_gvec_fcaddd helper_gvec_fcaddd_aarch64
#define helper_gvec_le8 helper_gvec_le8_aarch64
#define helper_gvec_le16 helper_gvec_le16_aarch64
#define helper_gvec_le32 helper_gvec_le32_aarch64

3
qemu/aarch64eb.h
View file

@ -993,6 +993,9 @@
#define helper_gvec_eq16 helper_gvec_eq16_aarch64eb
#define helper_gvec_eq32 helper_gvec_eq32_aarch64eb
#define helper_gvec_eq64 helper_gvec_eq64_aarch64eb
#define helper_gvec_fcaddh helper_gvec_fcaddh_aarch64eb
#define helper_gvec_fcadds helper_gvec_fcadds_aarch64eb
#define helper_gvec_fcaddd helper_gvec_fcaddd_aarch64eb
#define helper_gvec_le8 helper_gvec_le8_aarch64eb
#define helper_gvec_le16 helper_gvec_le16_aarch64eb
#define helper_gvec_le32 helper_gvec_le32_aarch64eb

3
qemu/arm.h
View file

@ -993,6 +993,9 @@
#define helper_gvec_eq16 helper_gvec_eq16_arm
#define helper_gvec_eq32 helper_gvec_eq32_arm
#define helper_gvec_eq64 helper_gvec_eq64_arm
#define helper_gvec_fcaddh helper_gvec_fcaddh_arm
#define helper_gvec_fcadds helper_gvec_fcadds_arm
#define helper_gvec_fcaddd helper_gvec_fcaddd_arm
#define helper_gvec_le8 helper_gvec_le8_arm
#define helper_gvec_le16 helper_gvec_le16_arm
#define helper_gvec_le32 helper_gvec_le32_arm

3
qemu/armeb.h
View file

@ -993,6 +993,9 @@
#define helper_gvec_eq16 helper_gvec_eq16_armeb
#define helper_gvec_eq32 helper_gvec_eq32_armeb
#define helper_gvec_eq64 helper_gvec_eq64_armeb
#define helper_gvec_fcaddh helper_gvec_fcaddh_armeb
#define helper_gvec_fcadds helper_gvec_fcadds_armeb
#define helper_gvec_fcaddd helper_gvec_fcaddd_armeb
#define helper_gvec_le8 helper_gvec_le8_armeb
#define helper_gvec_le16 helper_gvec_le16_armeb
#define helper_gvec_le32 helper_gvec_le32_armeb

3
qemu/header_gen.py
View file

@ -999,6 +999,9 @@ symbols = (
'helper_gvec_eq16',
'helper_gvec_eq32',
'helper_gvec_eq64',
'helper_gvec_fcaddh',
'helper_gvec_fcadds',
'helper_gvec_fcaddd',
'helper_gvec_le8',
'helper_gvec_le16',
'helper_gvec_le32',

3
qemu/m68k.h
View file

@ -993,6 +993,9 @@
#define helper_gvec_eq16 helper_gvec_eq16_m68k
#define helper_gvec_eq32 helper_gvec_eq32_m68k
#define helper_gvec_eq64 helper_gvec_eq64_m68k
#define helper_gvec_fcaddh helper_gvec_fcaddh_m68k
#define helper_gvec_fcadds helper_gvec_fcadds_m68k
#define helper_gvec_fcaddd helper_gvec_fcaddd_m68k
#define helper_gvec_le8 helper_gvec_le8_m68k
#define helper_gvec_le16 helper_gvec_le16_m68k
#define helper_gvec_le32 helper_gvec_le32_m68k

3
qemu/mips.h
View file

@ -993,6 +993,9 @@
#define helper_gvec_eq16 helper_gvec_eq16_mips
#define helper_gvec_eq32 helper_gvec_eq32_mips
#define helper_gvec_eq64 helper_gvec_eq64_mips
#define helper_gvec_fcaddh helper_gvec_fcaddh_mips
#define helper_gvec_fcadds helper_gvec_fcadds_mips
#define helper_gvec_fcaddd helper_gvec_fcaddd_mips
#define helper_gvec_le8 helper_gvec_le8_mips
#define helper_gvec_le16 helper_gvec_le16_mips
#define helper_gvec_le32 helper_gvec_le32_mips

3
qemu/mips64.h
View file

@ -993,6 +993,9 @@
#define helper_gvec_eq16 helper_gvec_eq16_mips64
#define helper_gvec_eq32 helper_gvec_eq32_mips64
#define helper_gvec_eq64 helper_gvec_eq64_mips64
#define helper_gvec_fcaddh helper_gvec_fcaddh_mips64
#define helper_gvec_fcadds helper_gvec_fcadds_mips64
#define helper_gvec_fcaddd helper_gvec_fcaddd_mips64
#define helper_gvec_le8 helper_gvec_le8_mips64
#define helper_gvec_le16 helper_gvec_le16_mips64
#define helper_gvec_le32 helper_gvec_le32_mips64

3
qemu/mips64el.h
View file

@ -993,6 +993,9 @@
#define helper_gvec_eq16 helper_gvec_eq16_mips64el
#define helper_gvec_eq32 helper_gvec_eq32_mips64el
#define helper_gvec_eq64 helper_gvec_eq64_mips64el
#define helper_gvec_fcaddh helper_gvec_fcaddh_mips64el
#define helper_gvec_fcadds helper_gvec_fcadds_mips64el
#define helper_gvec_fcaddd helper_gvec_fcaddd_mips64el
#define helper_gvec_le8 helper_gvec_le8_mips64el
#define helper_gvec_le16 helper_gvec_le16_mips64el
#define helper_gvec_le32 helper_gvec_le32_mips64el

3
qemu/mipsel.h
View file

@ -993,6 +993,9 @@
#define helper_gvec_eq16 helper_gvec_eq16_mipsel
#define helper_gvec_eq32 helper_gvec_eq32_mipsel
#define helper_gvec_eq64 helper_gvec_eq64_mipsel
#define helper_gvec_fcaddh helper_gvec_fcaddh_mipsel
#define helper_gvec_fcadds helper_gvec_fcadds_mipsel
#define helper_gvec_fcaddd helper_gvec_fcaddd_mipsel
#define helper_gvec_le8 helper_gvec_le8_mipsel
#define helper_gvec_le16 helper_gvec_le16_mipsel
#define helper_gvec_le32 helper_gvec_le32_mipsel

3
qemu/powerpc.h
View file

@ -993,6 +993,9 @@
#define helper_gvec_eq16 helper_gvec_eq16_powerpc
#define helper_gvec_eq32 helper_gvec_eq32_powerpc
#define helper_gvec_eq64 helper_gvec_eq64_powerpc
#define helper_gvec_fcaddh helper_gvec_fcaddh_powerpc
#define helper_gvec_fcadds helper_gvec_fcadds_powerpc
#define helper_gvec_fcaddd helper_gvec_fcaddd_powerpc
#define helper_gvec_le8 helper_gvec_le8_powerpc
#define helper_gvec_le16 helper_gvec_le16_powerpc
#define helper_gvec_le32 helper_gvec_le32_powerpc

3
qemu/sparc.h
View file

@ -993,6 +993,9 @@
#define helper_gvec_eq16 helper_gvec_eq16_sparc
#define helper_gvec_eq32 helper_gvec_eq32_sparc
#define helper_gvec_eq64 helper_gvec_eq64_sparc
#define helper_gvec_fcaddh helper_gvec_fcaddh_sparc
#define helper_gvec_fcadds helper_gvec_fcadds_sparc
#define helper_gvec_fcaddd helper_gvec_fcaddd_sparc
#define helper_gvec_le8 helper_gvec_le8_sparc
#define helper_gvec_le16 helper_gvec_le16_sparc
#define helper_gvec_le32 helper_gvec_le32_sparc

3
qemu/sparc64.h
View file

@ -993,6 +993,9 @@
#define helper_gvec_eq16 helper_gvec_eq16_sparc64
#define helper_gvec_eq32 helper_gvec_eq32_sparc64
#define helper_gvec_eq64 helper_gvec_eq64_sparc64
#define helper_gvec_fcaddh helper_gvec_fcaddh_sparc64
#define helper_gvec_fcadds helper_gvec_fcadds_sparc64
#define helper_gvec_fcaddd helper_gvec_fcaddd_sparc64
#define helper_gvec_le8 helper_gvec_le8_sparc64
#define helper_gvec_le16 helper_gvec_le16_sparc64
#define helper_gvec_le32 helper_gvec_le32_sparc64

7
qemu/target/arm/helper.h
View file

@ -580,6 +580,13 @@ DEF_HELPER_FLAGS_5(gvec_qrdmlah_s32, TCG_CALL_NO_RWG,
DEF_HELPER_FLAGS_5(gvec_qrdmlsh_s32, TCG_CALL_NO_RWG,
void, ptr, ptr, ptr, ptr, i32)
DEF_HELPER_FLAGS_5(gvec_fcaddh, TCG_CALL_NO_RWG,
void, ptr, ptr, ptr, ptr, i32)
DEF_HELPER_FLAGS_5(gvec_fcadds, TCG_CALL_NO_RWG,
void, ptr, ptr, ptr, ptr, i32)
DEF_HELPER_FLAGS_5(gvec_fcaddd, TCG_CALL_NO_RWG,
void, ptr, ptr, ptr, ptr, i32)
#ifdef TARGET_ARM
#define helper_clz helper_clz_arm
#define gen_helper_clz gen_helper_clz_arm

50
qemu/target/arm/translate-a64.c
View file

@ -759,6 +759,23 @@ static void gen_gvec_op3_env(DisasContext *s, bool is_q, int rd,
is_q ? 16 : 8, vec_full_reg_size(s), 0, fn);
}
/* Expand a 3-operand + fpstatus pointer + simd data value operation using
* an out-of-line helper.
*/
static void gen_gvec_op3_fpst(DisasContext *s, bool is_q, int rd, int rn,
int rm, bool is_fp16, int data,
gen_helper_gvec_3_ptr *fn)
{
TCGContext *tcg_ctx = s->uc->tcg_ctx;
TCGv_ptr fpst = get_fpstatus_ptr(tcg_ctx, is_fp16);
tcg_gen_gvec_3_ptr(tcg_ctx, vec_full_reg_offset(s, rd),
vec_full_reg_offset(s, rn),
vec_full_reg_offset(s, rm), fpst,
is_q ? 16 : 8, vec_full_reg_size(s), data, fn);
tcg_temp_free_ptr(tcg_ctx, fpst);
}
/* Set ZF and NF based on a 64 bit result. This is alas fiddlier
* than the 32 bit equivalent.
*/
@ -10967,7 +10984,7 @@ static void disas_simd_three_reg_same_extra(DisasContext *s, uint32_t insn)
int size = extract32(insn, 22, 2);
bool u = extract32(insn, 29, 1);
bool is_q = extract32(insn, 30, 1);
int feature;
int feature, rot;
switch (u * 16 + opcode) {
case 0x10: /* SQRDMLAH (vector) */
@ -10978,6 +10995,16 @@ static void disas_simd_three_reg_same_extra(DisasContext *s, uint32_t insn)
}
feature = ARM_FEATURE_V8_RDM;
break;
case 0xc: /* FCADD, #90 */
case 0xe: /* FCADD, #270 */
if (size == 0
|| (size == 1 && !arm_dc_feature(s, ARM_FEATURE_V8_FP16))
|| (size == 3 && !is_q)) {
unallocated_encoding(s);
return;
}
feature = ARM_FEATURE_V8_FCMA;
break;
default:
unallocated_encoding(s);
return;
@ -11017,6 +11044,27 @@ static void disas_simd_three_reg_same_extra(DisasContext *s, uint32_t insn)
}
return;
case 0xc: /* FCADD, #90 */
case 0xe: /* FCADD, #270 */
rot = extract32(opcode, 1, 1);
switch (size) {
case 1:
gen_gvec_op3_fpst(s, is_q, rd, rn, rm, size == 1, rot,
gen_helper_gvec_fcaddh);
break;
case 2:
gen_gvec_op3_fpst(s, is_q, rd, rn, rm, size == 1, rot,
gen_helper_gvec_fcadds);
break;
case 3:
gen_gvec_op3_fpst(s, is_q, rd, rn, rm, size == 1, rot,
gen_helper_gvec_fcaddd);
break;
default:
g_assert_not_reached();
}
return;
default:
g_assert_not_reached();
}

3
qemu/x86_64.h
View file

@ -993,6 +993,9 @@
#define helper_gvec_eq16 helper_gvec_eq16_x86_64
#define helper_gvec_eq32 helper_gvec_eq32_x86_64
#define helper_gvec_eq64 helper_gvec_eq64_x86_64
#define helper_gvec_fcaddh helper_gvec_fcaddh_x86_64
#define helper_gvec_fcadds helper_gvec_fcadds_x86_64
#define helper_gvec_fcaddd helper_gvec_fcaddd_x86_64
#define helper_gvec_le8 helper_gvec_le8_x86_64
#define helper_gvec_le16 helper_gvec_le16_x86_64
#define helper_gvec_le32 helper_gvec_le32_x86_64