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target/mips: Add CP0 BadInstrX register

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Add CP0 BadInstrX register. This register will be used in nanoMIPS.

Backports commit 25beba9bf76a677747b779e997c6540677a38311 from qemu
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Stefan Markovic 2018-08-17 14:21:53 -04:00 committed by Lioncash
parent d70a2c1df1
commit 4b6a9ce61b
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qemu/target/mips/cpu.h
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@ -324,6 +324,7 @@ struct CPUMIPSState {
target_ulong CP0_BadVAddr; target_ulong CP0_BadVAddr;
uint32_t CP0_BadInstr; uint32_t CP0_BadInstr;
uint32_t CP0_BadInstrP; uint32_t CP0_BadInstrP;
uint32_t CP0_BadInstrX;
int32_t CP0_Count; int32_t CP0_Count;
target_ulong CP0_EntryHi; target_ulong CP0_EntryHi;
#define CP0EnHi_EHINV 10 #define CP0EnHi_EHINV 10