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target-arm: Rename and move gt_cnt_reset
Rename gt_cnt_reset to gt_timer_reset as the function really resets the timers and not the counters. Move the registration from counter regs to timer regs. Backports commit d57b9ee84f6b2786f025712609edb259d0de086d from qemu
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@ -1108,7 +1108,7 @@ static void gt_recalc_timer(ARMCPU *cpu, int timeridx)
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}
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}
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static void gt_cnt_reset(CPUARMState *env, const ARMCPRegInfo *ri)
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static void gt_timer_reset(CPUARMState *env, const ARMCPRegInfo *ri)
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{
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}
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@ -1227,26 +1227,26 @@ static const ARMCPRegInfo generic_timer_cp_reginfo[] = {
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gt_ptimer_access, gt_tval_read, gt_tval_write, },
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{ "CNTP_TVAL_EL0", 0,14,2, 3,3,0, ARM_CP_STATE_AA64,
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ARM_CP_NO_RAW | ARM_CP_IO, PL1_RW | PL0_R, 0, NULL, 0, 0, {0, 0},
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gt_ptimer_access, gt_tval_read, gt_tval_write, },
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gt_ptimer_access, gt_tval_read, gt_tval_write, NULL, NULL, gt_timer_reset },
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{ "CNTV_TVAL", 15,14,3, 0,0,0, 0,
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ARM_CP_NO_RAW | ARM_CP_IO, PL1_RW | PL0_R, 0, NULL, 0, 0, {0, 0},
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gt_vtimer_access, gt_tval_read, gt_tval_write, },
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{ "CNTV_TVAL_EL0", 0,14,3, 3,3,0, ARM_CP_STATE_AA64,
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ARM_CP_NO_RAW | ARM_CP_IO, PL1_RW | PL0_R, 0, NULL, 0, 0, {0, 0},
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gt_vtimer_access, gt_tval_read, gt_tval_write, },
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gt_vtimer_access, gt_tval_read, gt_tval_write, NULL, NULL, gt_timer_reset },
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/* The counter itself */
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{ "CNTPCT", 15,0,14, 0,0, 0, 0,
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ARM_CP_64BIT | ARM_CP_NO_RAW | ARM_CP_IO, PL0_R, 0, NULL, 0, 0, {0, 0},
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gt_pct_access, gt_cnt_read,NULL, NULL,NULL, arm_cp_reset_ignore, },
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{ "CNTPCT_EL0", 0,14,0, 3,3,1, ARM_CP_STATE_AA64,
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ARM_CP_NO_RAW | ARM_CP_IO, PL0_R, 0, NULL, 0, 0, {0, 0},
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gt_pct_access, gt_cnt_read, NULL, NULL, NULL, gt_cnt_reset, },
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gt_pct_access, gt_cnt_read, NULL, NULL, NULL, NULL },
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{ "CNTVCT", 15,0,14, 0,1,0, 0,
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ARM_CP_64BIT | ARM_CP_NO_RAW | ARM_CP_IO, PL0_R, 0, NULL, 0, 0, {0, 0},
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gt_vct_access, gt_virt_cnt_read, NULL, NULL, NULL, arm_cp_reset_ignore, },
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{ "CNTVCT_EL0", 0,14,0, 3,3,2, ARM_CP_STATE_AA64,
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ARM_CP_NO_RAW | ARM_CP_IO, PL0_R, 0, NULL, 0, 0, {0, 0},
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gt_vct_access, gt_virt_cnt_read, NULL, NULL, NULL, gt_cnt_reset, },
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gt_vct_access, gt_virt_cnt_read, NULL, NULL, NULL, NULL },
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/* Comparison value, indicating when the timer goes off */
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{ "CNTP_CVAL", 15, 0,14, 0,2, 0, 0,
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ARM_CP_64BIT | ARM_CP_IO | ARM_CP_ALIAS, PL1_RW | PL0_R, 0, NULL, 0, offsetof(CPUARMState, cp15.c14_timer[GTIMER_PHYS].cval), {0, 0},
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