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target-arm: Add CPU property to disable AArch64
Adds registration and get/set functions for enabling/disabling the AArch64 execution state on AArch64 CPUs. By default AArch64 execution state is enabled on AArch64 CPUs, setting the property to off, will disable the execution state. The below QEMU invocation would have AArch64 execution state disabled. $ ./qemu-system-aarch64 -machine virt -cpu cortex-a57,aarch64=off Also adds stripping of features from CPU model string in acquiring the ARM CPU by name. Backports part of commit fb8d6c24b095c426151b9bba8c8b0e58b03d6503 from qemu
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@ -272,7 +272,7 @@ static bool arm_v7m_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
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}
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#endif
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static bool arm_cpu_is_big_endian(CPUState *cs)
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static QEMU_UNUSED_FUNC bool arm_cpu_is_big_endian(CPUState *cs)
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{
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ARMCPU *cpu = ARM_CPU(NULL, cs);
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CPUARMState *env = &cpu->env;
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@ -28,6 +28,11 @@ static inline void set_feature(CPUARMState *env, int feature)
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env->features |= 1ULL << feature;
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}
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static inline QEMU_UNUSED_FUNC void unset_feature(CPUARMState *env, int feature)
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{
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env->features &= ~(1ULL << feature);
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}
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#ifndef CONFIG_USER_ONLY
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static uint64_t a57_l2ctlr_read(CPUARMState *env, const ARMCPRegInfo *ri)
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{
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@ -154,6 +159,13 @@ static const ARMCPUInfo aarch64_cpus[] = {
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{ NULL }
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};
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static QEMU_UNUSED_FUNC bool aarch64_cpu_get_aarch64(Object *obj, Error **errp)
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{
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ARMCPU *cpu = ARM_CPU(NULL, obj);
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return arm_feature(&cpu->env, ARM_FEATURE_AARCH64);
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}
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static void aarch64_cpu_initfn(struct uc_struct *uc, Object *obj, void *opaque)
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{
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}
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