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m68k: Fix build

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A bunch of changes to the memory functions recently broke the build.
This fixes it.
This commit is contained in:
Lioncash 2021-03-05 08:25:40 -05:00
parent dfd53d7573
commit 5436b713ce
2 changed files with 41 additions and 52 deletions
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32
qemu/target/m68k/cpu.c
View file

@ -278,36 +278,24 @@ static void m68k_cpu_class_init(struct uc_struct *uc, ObjectClass *c, void *data
#define DEFINE_M68K_CPU_TYPE(cpu_model, initfn) \
{ \
M68K_CPU_TYPE_NAME(cpu_model), \
TYPE_M68K_CPU, \
.name = M68K_CPU_TYPE_NAME(cpu_model), \
.parent = TYPE_M68K_CPU, \
\
0, \
0, \
NULL, \
\
initfn, \
.instance_init = initfn, \
}
static TypeInfo m68k_cpus_type_infos[] = {
{ /* base class should be registered first */
TYPE_M68K_CPU,
TYPE_CPU,
.name = TYPE_M68K_CPU,
.parent = TYPE_CPU,
sizeof(M68kCPUClass),
sizeof(M68kCPU),
NULL,
.class_size = sizeof(M68kCPUClass),
.instance_size = sizeof(M68kCPU),
m68k_cpu_initfn,
NULL,
NULL,
.instance_init = m68k_cpu_initfn,
.class_init = m68k_cpu_class_init,
NULL,
m68k_cpu_class_init,
NULL,
NULL,
true,
.abstract = true,
},
DEFINE_M68K_CPU_TYPE("m68000", m68000_cpu_initfn),
DEFINE_M68K_CPU_TYPE("m68020", m68020_cpu_initfn),

61
qemu/target/m68k/op_helper.c
View file

@ -43,8 +43,8 @@ static void cf_rte(CPUM68KState *env)
uint32_t fmt;
sp = env->aregs[7];
fmt = cpu_ldl_kernel(env, sp);
env->pc = cpu_ldl_kernel(env, sp + 4);
fmt = cpu_ldl_mmuidx_ra(env, sp, MMU_KERNEL_IDX, 0);
env->pc = cpu_ldl_mmuidx_ra(env, sp + 4, MMU_KERNEL_IDX, 0);
sp |= (fmt >> 28) & 3;
env->aregs[7] = sp + 8;
@ -59,13 +59,13 @@ static void m68k_rte(CPUM68KState *env)
sp = env->aregs[7];
throwaway:
sr = cpu_lduw_kernel(env, sp);
sr = cpu_lduw_mmuidx_ra(env, sp, MMU_KERNEL_IDX, 0);
sp += 2;
env->pc = cpu_ldl_kernel(env, sp);
env->pc = cpu_ldl_mmuidx_ra(env, sp, MMU_KERNEL_IDX, 0);
sp += 4;
if (m68k_feature(env, M68K_FEATURE_QUAD_MULDIV)) {
/* all except 68000 */
fmt = cpu_lduw_kernel(env, sp);
fmt = cpu_lduw_mmuidx_ra(env, sp, MMU_KERNEL_IDX, 0);
sp += 2;
switch (fmt >> 12) {
case 0:
@ -253,12 +253,12 @@ static void cf_interrupt_all(CPUM68KState *env, int is_hw)
/* ??? This could cause MMU faults. */
sp &= ~3;
sp -= 4;
cpu_stl_kernel(env, sp, retaddr);
cpu_stl_mmuidx_ra(env, sp, retaddr, MMU_KERNEL_IDX, 0);
sp -= 4;
cpu_stl_kernel(env, sp, fmt);
cpu_stl_mmuidx_ra(env, sp, fmt, MMU_KERNEL_IDX, 0);
env->aregs[7] = sp;
/* Jump to vector. */
env->pc = cpu_ldl_kernel(env, env->vbr + vector);
env->pc = cpu_ldl_mmuidx_ra(env, env->vbr + vector, MMU_KERNEL_IDX, 0);
}
static inline void do_stack_frame(CPUM68KState *env, uint32_t *sp,
@ -271,23 +271,24 @@ static inline void do_stack_frame(CPUM68KState *env, uint32_t *sp,
switch (format) {
case 4:
*sp -= 4;
cpu_stl_kernel(env, *sp, env->pc);
cpu_stl_mmuidx_ra(env, *sp, env->pc, MMU_KERNEL_IDX, 0);
*sp -= 4;
cpu_stl_kernel(env, *sp, addr);
cpu_stl_mmuidx_ra(env, *sp, addr, MMU_KERNEL_IDX, 0);
break;
case 3:
case 2:
*sp -= 4;
cpu_stl_kernel(env, *sp, addr);
cpu_stl_mmuidx_ra(env, *sp, addr, MMU_KERNEL_IDX, 0);
break;
}
*sp -= 2;
cpu_stw_kernel(env, *sp, (format << 12) + (cs->exception_index << 2));
cpu_stw_mmuidx_ra(env, *sp, (format << 12) + (cs->exception_index << 2),
MMU_KERNEL_IDX, 0);
}
*sp -= 4;
cpu_stl_kernel(env, *sp, retaddr);
cpu_stl_mmuidx_ra(env, *sp, retaddr, MMU_KERNEL_IDX, 0);
*sp -= 2;
cpu_stw_kernel(env, *sp, sr);
cpu_stw_mmuidx_ra(env, *sp, sr, MMU_KERNEL_IDX, 0);
}
static void m68k_interrupt_all(CPUM68KState *env, int is_hw)
@ -361,35 +362,35 @@ static void m68k_interrupt_all(CPUM68KState *env, int is_hw)
}
env->mmu.fault = true;
sp -= 4;
cpu_stl_kernel(env, sp, 0); /* push data 3 */
cpu_stl_mmuidx_ra(env, sp, 0, MMU_KERNEL_IDX, 0); /* push data 3 */
sp -= 4;
cpu_stl_kernel(env, sp, 0); /* push data 2 */
cpu_stl_mmuidx_ra(env, sp, 0, MMU_KERNEL_IDX, 0); /* push data 2 */
sp -= 4;
cpu_stl_kernel(env, sp, 0); /* push data 1 */
cpu_stl_mmuidx_ra(env, sp, 0, MMU_KERNEL_IDX, 0); /* push data 1 */
sp -= 4;
cpu_stl_kernel(env, sp, 0); /* write back 1 / push data 0 */
cpu_stl_mmuidx_ra(env, sp, 0, MMU_KERNEL_IDX, 0); /* write back 1 / push data 0 */
sp -= 4;
cpu_stl_kernel(env, sp, 0); /* write back 1 address */
cpu_stl_mmuidx_ra(env, sp, 0, MMU_KERNEL_IDX, 0); /* write back 1 address */
sp -= 4;
cpu_stl_kernel(env, sp, 0); /* write back 2 data */
cpu_stl_mmuidx_ra(env, sp, 0, MMU_KERNEL_IDX, 0); /* write back 2 data */
sp -= 4;
cpu_stl_kernel(env, sp, 0); /* write back 2 address */
cpu_stl_mmuidx_ra(env, sp, 0, MMU_KERNEL_IDX, 0); /* write back 2 address */
sp -= 4;
cpu_stl_kernel(env, sp, 0); /* write back 3 data */
cpu_stl_mmuidx_ra(env, sp, 0, MMU_KERNEL_IDX, 0); /* write back 3 data */
sp -= 4;
cpu_stl_kernel(env, sp, env->mmu.ar); /* write back 3 address */
cpu_stl_mmuidx_ra(env, sp, env->mmu.ar, MMU_KERNEL_IDX, 0); /* write back 3 address */
sp -= 4;
cpu_stl_kernel(env, sp, env->mmu.ar); /* fault address */
cpu_stl_mmuidx_ra(env, sp, env->mmu.ar, MMU_KERNEL_IDX, 0); /* fault address */
sp -= 2;
cpu_stw_kernel(env, sp, 0); /* write back 1 status */
cpu_stw_mmuidx_ra(env, sp, 0, MMU_KERNEL_IDX, 0); /* write back 1 status */
sp -= 2;
cpu_stw_kernel(env, sp, 0); /* write back 2 status */
cpu_stw_mmuidx_ra(env, sp, 0, MMU_KERNEL_IDX, 0); /* write back 2 status */
sp -= 2;
cpu_stw_kernel(env, sp, 0); /* write back 3 status */
cpu_stw_mmuidx_ra(env, sp, 0, MMU_KERNEL_IDX, 0); /* write back 3 status */
sp -= 2;
cpu_stw_kernel(env, sp, env->mmu.ssw); /* special status word */
cpu_stw_mmuidx_ra(env, sp, env->mmu.ssw, MMU_KERNEL_IDX, 0); /* special status word */
sp -= 4;
cpu_stl_kernel(env, sp, env->mmu.ar); /* effective address */
cpu_stl_mmuidx_ra(env, sp, env->mmu.ar, MMU_KERNEL_IDX, 0); /* effective address */
do_stack_frame(env, &sp, 7, oldsr, 0, retaddr);
env->mmu.fault = false;
if (qemu_loglevel_mask(CPU_LOG_INT)) {
@ -421,7 +422,7 @@ static void m68k_interrupt_all(CPUM68KState *env, int is_hw)
env->aregs[7] = sp;
/* Jump to vector. */
env->pc = cpu_ldl_kernel(env, env->vbr + vector);
env->pc = cpu_ldl_mmuidx_ra(env, env->vbr + vector, MMU_KERNEL_IDX, 0);
}
static void do_interrupt_all(CPUM68KState *env, int is_hw)