mirror of
https://github.com/yuzu-emu/unicorn.git
synced 2024-12-23 07:05:30 +00:00
i386: Replace -noTSX, -IBRS, -IBPB CPU models with aliases
The old CPU models will be just aliases for specific versions of the original CPU models. Backports commit 53db89d93bebe70a3e7f4c45933deffcf3e7cb62 from qemu
This commit is contained in:
parent
0128e34fdf
commit
54993f7479
|
@ -1543,6 +1543,7 @@ typedef struct PropValue {
|
|||
|
||||
typedef struct X86CPUVersionDefinition {
|
||||
X86CPUVersion version;
|
||||
const char *alias;
|
||||
PropValue *props;
|
||||
} X86CPUVersionDefinition;
|
||||
|
||||
|
@ -1968,7 +1969,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
|
|||
{ .version = 1 },
|
||||
{
|
||||
.version = 2,
|
||||
/* Equivalent to Nehalem-IBRS */
|
||||
.alias = "Nehalem-IBRS",
|
||||
.props = (PropValue[]) {
|
||||
{ "spec-ctrl", "on" },
|
||||
{ "model-id",
|
||||
|
@ -1979,36 +1980,6 @@ static X86CPUDefinition builtin_x86_defs[] = {
|
|||
{ /* end of list */ }
|
||||
}
|
||||
},
|
||||
{
|
||||
.name = "Nehalem-IBRS",
|
||||
.level = 11,
|
||||
.vendor = CPUID_VENDOR_INTEL,
|
||||
.family = 6,
|
||||
.model = 26,
|
||||
.stepping = 3,
|
||||
.features[FEAT_1_EDX] =
|
||||
CPUID_VME | CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX |
|
||||
CPUID_CLFLUSH | CPUID_PSE36 | CPUID_PAT | CPUID_CMOV | CPUID_MCA |
|
||||
CPUID_PGE | CPUID_MTRR | CPUID_SEP | CPUID_APIC | CPUID_CX8 |
|
||||
CPUID_MCE | CPUID_PAE | CPUID_MSR | CPUID_TSC | CPUID_PSE |
|
||||
CPUID_DE | CPUID_FP87,
|
||||
.features[FEAT_1_ECX] =
|
||||
CPUID_EXT_POPCNT | CPUID_EXT_SSE42 | CPUID_EXT_SSE41 |
|
||||
CPUID_EXT_CX16 | CPUID_EXT_SSSE3 | CPUID_EXT_SSE3,
|
||||
.features[FEAT_7_0_EDX] =
|
||||
CPUID_7_0_EDX_SPEC_CTRL,
|
||||
.features[FEAT_8000_0001_EDX] =
|
||||
CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX,
|
||||
.features[FEAT_8000_0001_ECX] =
|
||||
CPUID_EXT3_LAHF_LM,
|
||||
.xlevel = 0x80000008,
|
||||
.model_id = "Intel Core i7 9xx (Nehalem Core i7, IBRS update)",
|
||||
/*
|
||||
* This CPU model will eventually be replaced by an alias,
|
||||
* don't register any versions for it.
|
||||
*/
|
||||
.versions = (X86CPUVersionDefinition[]) { { /* end of list */ } },
|
||||
},
|
||||
{
|
||||
.name = "Westmere",
|
||||
.level = 11,
|
||||
|
@ -2038,7 +2009,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
|
|||
{ .version = 1 },
|
||||
{
|
||||
.version = 2,
|
||||
/* Equivalent to Westmere-IBRS */
|
||||
.alias = "Westmere-IBRS",
|
||||
.props = (PropValue[]) {
|
||||
{ "spec-ctrl", "on" },
|
||||
{ "model-id",
|
||||
|
@ -2049,39 +2020,6 @@ static X86CPUDefinition builtin_x86_defs[] = {
|
|||
{ /* end of list */ }
|
||||
}
|
||||
},
|
||||
{
|
||||
.name = "Westmere-IBRS",
|
||||
.level = 11,
|
||||
.vendor = CPUID_VENDOR_INTEL,
|
||||
.family = 6,
|
||||
.model = 44,
|
||||
.stepping = 1,
|
||||
.features[FEAT_1_EDX] =
|
||||
CPUID_VME | CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX |
|
||||
CPUID_CLFLUSH | CPUID_PSE36 | CPUID_PAT | CPUID_CMOV | CPUID_MCA |
|
||||
CPUID_PGE | CPUID_MTRR | CPUID_SEP | CPUID_APIC | CPUID_CX8 |
|
||||
CPUID_MCE | CPUID_PAE | CPUID_MSR | CPUID_TSC | CPUID_PSE |
|
||||
CPUID_DE | CPUID_FP87,
|
||||
.features[FEAT_1_ECX] =
|
||||
CPUID_EXT_AES | CPUID_EXT_POPCNT | CPUID_EXT_SSE42 |
|
||||
CPUID_EXT_SSE41 | CPUID_EXT_CX16 | CPUID_EXT_SSSE3 |
|
||||
CPUID_EXT_PCLMULQDQ | CPUID_EXT_SSE3,
|
||||
.features[FEAT_8000_0001_EDX] =
|
||||
CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX,
|
||||
.features[FEAT_8000_0001_ECX] =
|
||||
CPUID_EXT3_LAHF_LM,
|
||||
.features[FEAT_7_0_EDX] =
|
||||
CPUID_7_0_EDX_SPEC_CTRL,
|
||||
.features[FEAT_6_EAX] =
|
||||
CPUID_6_EAX_ARAT,
|
||||
.xlevel = 0x80000008,
|
||||
.model_id = "Westmere E56xx/L56xx/X56xx (IBRS update)",
|
||||
/*
|
||||
* This CPU model will eventually be replaced by an alias,
|
||||
* don't register any versions for it.
|
||||
*/
|
||||
.versions = (X86CPUVersionDefinition[]) { { /* end of list */ } },
|
||||
},
|
||||
{
|
||||
.name = "SandyBridge",
|
||||
.level = 0xd,
|
||||
|
@ -2116,7 +2054,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
|
|||
{ .version = 1 },
|
||||
{
|
||||
.version = 2,
|
||||
/* Equivalent to SandyBridge-IBRS */
|
||||
.alias = "SandyBridge-IBRS",
|
||||
.props = (PropValue[]) {
|
||||
{ "spec-ctrl", "on" },
|
||||
{ "model-id",
|
||||
|
@ -2127,44 +2065,6 @@ static X86CPUDefinition builtin_x86_defs[] = {
|
|||
{ /* end of list */ }
|
||||
}
|
||||
},
|
||||
{
|
||||
.name = "SandyBridge-IBRS",
|
||||
.level = 0xd,
|
||||
.vendor = CPUID_VENDOR_INTEL,
|
||||
.family = 6,
|
||||
.model = 42,
|
||||
.stepping = 1,
|
||||
.features[FEAT_1_EDX] =
|
||||
CPUID_VME | CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX |
|
||||
CPUID_CLFLUSH | CPUID_PSE36 | CPUID_PAT | CPUID_CMOV | CPUID_MCA |
|
||||
CPUID_PGE | CPUID_MTRR | CPUID_SEP | CPUID_APIC | CPUID_CX8 |
|
||||
CPUID_MCE | CPUID_PAE | CPUID_MSR | CPUID_TSC | CPUID_PSE |
|
||||
CPUID_DE | CPUID_FP87,
|
||||
.features[FEAT_1_ECX] =
|
||||
CPUID_EXT_AVX | CPUID_EXT_XSAVE | CPUID_EXT_AES |
|
||||
CPUID_EXT_TSC_DEADLINE_TIMER | CPUID_EXT_POPCNT |
|
||||
CPUID_EXT_X2APIC | CPUID_EXT_SSE42 | CPUID_EXT_SSE41 |
|
||||
CPUID_EXT_CX16 | CPUID_EXT_SSSE3 | CPUID_EXT_PCLMULQDQ |
|
||||
CPUID_EXT_SSE3,
|
||||
.features[FEAT_8000_0001_EDX] =
|
||||
CPUID_EXT2_LM | CPUID_EXT2_RDTSCP | CPUID_EXT2_NX |
|
||||
CPUID_EXT2_SYSCALL,
|
||||
.features[FEAT_8000_0001_ECX] =
|
||||
CPUID_EXT3_LAHF_LM,
|
||||
.features[FEAT_7_0_EDX] =
|
||||
CPUID_7_0_EDX_SPEC_CTRL,
|
||||
.features[FEAT_XSAVE] =
|
||||
CPUID_XSAVE_XSAVEOPT,
|
||||
.features[FEAT_6_EAX] =
|
||||
CPUID_6_EAX_ARAT,
|
||||
.xlevel = 0x80000008,
|
||||
.model_id = "Intel Xeon E312xx (Sandy Bridge, IBRS update)",
|
||||
/*
|
||||
* This CPU model will eventually be replaced by an alias,
|
||||
* don't register any versions for it.
|
||||
*/
|
||||
.versions = (X86CPUVersionDefinition[]) { { /* end of list */ } },
|
||||
},
|
||||
{
|
||||
.name = "IvyBridge",
|
||||
.level = 0xd,
|
||||
|
@ -2202,7 +2102,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
|
|||
{ .version = 1 },
|
||||
{
|
||||
.version = 2,
|
||||
/* Equivalent to IvyBridge-IBRS */
|
||||
.alias = "IvyBridge-IBRS",
|
||||
.props = (PropValue[]) {
|
||||
{ "spec-ctrl", "on" },
|
||||
{ "model-id",
|
||||
|
@ -2213,131 +2113,6 @@ static X86CPUDefinition builtin_x86_defs[] = {
|
|||
{ /* end of list */ }
|
||||
}
|
||||
},
|
||||
{
|
||||
.name = "IvyBridge-IBRS",
|
||||
.level = 0xd,
|
||||
.vendor = CPUID_VENDOR_INTEL,
|
||||
.family = 6,
|
||||
.model = 58,
|
||||
.stepping = 9,
|
||||
.features[FEAT_1_EDX] =
|
||||
CPUID_VME | CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX |
|
||||
CPUID_CLFLUSH | CPUID_PSE36 | CPUID_PAT | CPUID_CMOV | CPUID_MCA |
|
||||
CPUID_PGE | CPUID_MTRR | CPUID_SEP | CPUID_APIC | CPUID_CX8 |
|
||||
CPUID_MCE | CPUID_PAE | CPUID_MSR | CPUID_TSC | CPUID_PSE |
|
||||
CPUID_DE | CPUID_FP87,
|
||||
.features[FEAT_1_ECX] =
|
||||
CPUID_EXT_AVX | CPUID_EXT_XSAVE | CPUID_EXT_AES |
|
||||
CPUID_EXT_TSC_DEADLINE_TIMER | CPUID_EXT_POPCNT |
|
||||
CPUID_EXT_X2APIC | CPUID_EXT_SSE42 | CPUID_EXT_SSE41 |
|
||||
CPUID_EXT_CX16 | CPUID_EXT_SSSE3 | CPUID_EXT_PCLMULQDQ |
|
||||
CPUID_EXT_SSE3 | CPUID_EXT_F16C | CPUID_EXT_RDRAND,
|
||||
.features[FEAT_7_0_EBX] =
|
||||
CPUID_7_0_EBX_FSGSBASE | CPUID_7_0_EBX_SMEP |
|
||||
CPUID_7_0_EBX_ERMS,
|
||||
.features[FEAT_8000_0001_EDX] =
|
||||
CPUID_EXT2_LM | CPUID_EXT2_RDTSCP | CPUID_EXT2_NX |
|
||||
CPUID_EXT2_SYSCALL,
|
||||
.features[FEAT_8000_0001_ECX] =
|
||||
CPUID_EXT3_LAHF_LM,
|
||||
.features[FEAT_7_0_EDX] =
|
||||
CPUID_7_0_EDX_SPEC_CTRL,
|
||||
.features[FEAT_XSAVE] =
|
||||
CPUID_XSAVE_XSAVEOPT,
|
||||
.features[FEAT_6_EAX] =
|
||||
CPUID_6_EAX_ARAT,
|
||||
.xlevel = 0x80000008,
|
||||
.model_id = "Intel Xeon E3-12xx v2 (Ivy Bridge, IBRS)",
|
||||
/*
|
||||
* This CPU model will eventually be replaced by an alias,
|
||||
* don't register any versions for it.
|
||||
*/
|
||||
.versions = (X86CPUVersionDefinition[]) { { /* end of list */ } },
|
||||
},
|
||||
{
|
||||
.name = "Haswell-noTSX",
|
||||
.level = 0xd,
|
||||
.vendor = CPUID_VENDOR_INTEL,
|
||||
.family = 6,
|
||||
.model = 60,
|
||||
.stepping = 1,
|
||||
.features[FEAT_1_EDX] =
|
||||
CPUID_VME | CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX |
|
||||
CPUID_CLFLUSH | CPUID_PSE36 | CPUID_PAT | CPUID_CMOV | CPUID_MCA |
|
||||
CPUID_PGE | CPUID_MTRR | CPUID_SEP | CPUID_APIC | CPUID_CX8 |
|
||||
CPUID_MCE | CPUID_PAE | CPUID_MSR | CPUID_TSC | CPUID_PSE |
|
||||
CPUID_DE | CPUID_FP87,
|
||||
.features[FEAT_1_ECX] =
|
||||
CPUID_EXT_AVX | CPUID_EXT_XSAVE | CPUID_EXT_AES |
|
||||
CPUID_EXT_POPCNT | CPUID_EXT_X2APIC | CPUID_EXT_SSE42 |
|
||||
CPUID_EXT_SSE41 | CPUID_EXT_CX16 | CPUID_EXT_SSSE3 |
|
||||
CPUID_EXT_PCLMULQDQ | CPUID_EXT_SSE3 |
|
||||
CPUID_EXT_TSC_DEADLINE_TIMER | CPUID_EXT_FMA | CPUID_EXT_MOVBE |
|
||||
CPUID_EXT_PCID | CPUID_EXT_F16C | CPUID_EXT_RDRAND,
|
||||
.features[FEAT_8000_0001_EDX] =
|
||||
CPUID_EXT2_LM | CPUID_EXT2_RDTSCP | CPUID_EXT2_NX |
|
||||
CPUID_EXT2_SYSCALL,
|
||||
.features[FEAT_8000_0001_ECX] =
|
||||
CPUID_EXT3_ABM | CPUID_EXT3_LAHF_LM,
|
||||
.features[FEAT_7_0_EBX] =
|
||||
CPUID_7_0_EBX_FSGSBASE | CPUID_7_0_EBX_BMI1 |
|
||||
CPUID_7_0_EBX_AVX2 | CPUID_7_0_EBX_SMEP |
|
||||
CPUID_7_0_EBX_BMI2 | CPUID_7_0_EBX_ERMS | CPUID_7_0_EBX_INVPCID,
|
||||
.features[FEAT_XSAVE] =
|
||||
CPUID_XSAVE_XSAVEOPT,
|
||||
.features[FEAT_6_EAX] =
|
||||
CPUID_6_EAX_ARAT,
|
||||
.xlevel = 0x80000008,
|
||||
.model_id = "Intel Core Processor (Haswell, no TSX)",
|
||||
/*
|
||||
* This CPU model will eventually be replaced by an alias,
|
||||
* don't register any versions for it.
|
||||
*/
|
||||
.versions = (X86CPUVersionDefinition[]) { { /* end of list */ } },
|
||||
},
|
||||
{
|
||||
.name = "Haswell-noTSX-IBRS",
|
||||
.level = 0xd,
|
||||
.vendor = CPUID_VENDOR_INTEL,
|
||||
.family = 6,
|
||||
.model = 60,
|
||||
.stepping = 1,
|
||||
.features[FEAT_1_EDX] =
|
||||
CPUID_VME | CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX |
|
||||
CPUID_CLFLUSH | CPUID_PSE36 | CPUID_PAT | CPUID_CMOV | CPUID_MCA |
|
||||
CPUID_PGE | CPUID_MTRR | CPUID_SEP | CPUID_APIC | CPUID_CX8 |
|
||||
CPUID_MCE | CPUID_PAE | CPUID_MSR | CPUID_TSC | CPUID_PSE |
|
||||
CPUID_DE | CPUID_FP87,
|
||||
.features[FEAT_1_ECX] =
|
||||
CPUID_EXT_AVX | CPUID_EXT_XSAVE | CPUID_EXT_AES |
|
||||
CPUID_EXT_POPCNT | CPUID_EXT_X2APIC | CPUID_EXT_SSE42 |
|
||||
CPUID_EXT_SSE41 | CPUID_EXT_CX16 | CPUID_EXT_SSSE3 |
|
||||
CPUID_EXT_PCLMULQDQ | CPUID_EXT_SSE3 |
|
||||
CPUID_EXT_TSC_DEADLINE_TIMER | CPUID_EXT_FMA | CPUID_EXT_MOVBE |
|
||||
CPUID_EXT_PCID | CPUID_EXT_F16C | CPUID_EXT_RDRAND,
|
||||
.features[FEAT_8000_0001_EDX] =
|
||||
CPUID_EXT2_LM | CPUID_EXT2_RDTSCP | CPUID_EXT2_NX |
|
||||
CPUID_EXT2_SYSCALL,
|
||||
.features[FEAT_8000_0001_ECX] =
|
||||
CPUID_EXT3_ABM | CPUID_EXT3_LAHF_LM,
|
||||
.features[FEAT_7_0_EDX] =
|
||||
CPUID_7_0_EDX_SPEC_CTRL,
|
||||
.features[FEAT_7_0_EBX] =
|
||||
CPUID_7_0_EBX_FSGSBASE | CPUID_7_0_EBX_BMI1 |
|
||||
CPUID_7_0_EBX_AVX2 | CPUID_7_0_EBX_SMEP |
|
||||
CPUID_7_0_EBX_BMI2 | CPUID_7_0_EBX_ERMS | CPUID_7_0_EBX_INVPCID,
|
||||
.features[FEAT_XSAVE] =
|
||||
CPUID_XSAVE_XSAVEOPT,
|
||||
.features[FEAT_6_EAX] =
|
||||
CPUID_6_EAX_ARAT,
|
||||
.xlevel = 0x80000008,
|
||||
.model_id = "Intel Core Processor (Haswell, no TSX, IBRS)",
|
||||
/*
|
||||
* This CPU model will eventually be replaced by an alias,
|
||||
* don't register any versions for it.
|
||||
*/
|
||||
.versions = (X86CPUVersionDefinition[]) { { /* end of list */ } },
|
||||
},
|
||||
{
|
||||
.name = "Haswell",
|
||||
.level = 0xd,
|
||||
|
@ -2378,7 +2153,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
|
|||
{ .version = 1 },
|
||||
{
|
||||
.version = 2,
|
||||
/* Equivalent to Haswell-noTSX */
|
||||
.alias = "Haswell-noTSX",
|
||||
.props = (PropValue[]) {
|
||||
{ "hle", "off" },
|
||||
{ "rtm", "off" },
|
||||
|
@ -2389,7 +2164,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
|
|||
},
|
||||
{
|
||||
.version = 3,
|
||||
/* Equivalent to Haswell-IBRS */
|
||||
.alias = "Haswell-IBRS",
|
||||
.props = (PropValue[]) {
|
||||
/* Restore TSX features removed by -v2 above */
|
||||
{ "hle", "on" },
|
||||
|
@ -2407,7 +2182,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
|
|||
},
|
||||
{
|
||||
.version = 4,
|
||||
/* Equivalent to Haswell-noTSX-IBRS */
|
||||
.alias = "Haswell-noTSX-IBRS",
|
||||
.props = (PropValue[]) {
|
||||
{ "hle", "off" },
|
||||
{ "rtm", "off" },
|
||||
|
@ -2421,138 +2196,6 @@ static X86CPUDefinition builtin_x86_defs[] = {
|
|||
{ /* end of list */ }
|
||||
}
|
||||
},
|
||||
{
|
||||
.name = "Haswell-IBRS",
|
||||
.level = 0xd,
|
||||
.vendor = CPUID_VENDOR_INTEL,
|
||||
.family = 6,
|
||||
.model = 60,
|
||||
.stepping = 4,
|
||||
.features[FEAT_1_EDX] =
|
||||
CPUID_VME | CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX |
|
||||
CPUID_CLFLUSH | CPUID_PSE36 | CPUID_PAT | CPUID_CMOV | CPUID_MCA |
|
||||
CPUID_PGE | CPUID_MTRR | CPUID_SEP | CPUID_APIC | CPUID_CX8 |
|
||||
CPUID_MCE | CPUID_PAE | CPUID_MSR | CPUID_TSC | CPUID_PSE |
|
||||
CPUID_DE | CPUID_FP87,
|
||||
.features[FEAT_1_ECX] =
|
||||
CPUID_EXT_AVX | CPUID_EXT_XSAVE | CPUID_EXT_AES |
|
||||
CPUID_EXT_POPCNT | CPUID_EXT_X2APIC | CPUID_EXT_SSE42 |
|
||||
CPUID_EXT_SSE41 | CPUID_EXT_CX16 | CPUID_EXT_SSSE3 |
|
||||
CPUID_EXT_PCLMULQDQ | CPUID_EXT_SSE3 |
|
||||
CPUID_EXT_TSC_DEADLINE_TIMER | CPUID_EXT_FMA | CPUID_EXT_MOVBE |
|
||||
CPUID_EXT_PCID | CPUID_EXT_F16C | CPUID_EXT_RDRAND,
|
||||
.features[FEAT_8000_0001_EDX] =
|
||||
CPUID_EXT2_LM | CPUID_EXT2_RDTSCP | CPUID_EXT2_NX |
|
||||
CPUID_EXT2_SYSCALL,
|
||||
.features[FEAT_8000_0001_ECX] =
|
||||
CPUID_EXT3_ABM | CPUID_EXT3_LAHF_LM,
|
||||
.features[FEAT_7_0_EDX] =
|
||||
CPUID_7_0_EDX_SPEC_CTRL,
|
||||
.features[FEAT_7_0_EBX] =
|
||||
CPUID_7_0_EBX_FSGSBASE | CPUID_7_0_EBX_BMI1 |
|
||||
CPUID_7_0_EBX_HLE | CPUID_7_0_EBX_AVX2 | CPUID_7_0_EBX_SMEP |
|
||||
CPUID_7_0_EBX_BMI2 | CPUID_7_0_EBX_ERMS | CPUID_7_0_EBX_INVPCID |
|
||||
CPUID_7_0_EBX_RTM,
|
||||
.features[FEAT_XSAVE] =
|
||||
CPUID_XSAVE_XSAVEOPT,
|
||||
.features[FEAT_6_EAX] =
|
||||
CPUID_6_EAX_ARAT,
|
||||
.xlevel = 0x80000008,
|
||||
.model_id = "Intel Core Processor (Haswell, IBRS)",
|
||||
/*
|
||||
* This CPU model will eventually be replaced by an alias,
|
||||
* don't register any versions for it.
|
||||
*/
|
||||
.versions = (X86CPUVersionDefinition[]) { { /* end of list */ } },
|
||||
},
|
||||
{
|
||||
.name = "Broadwell-noTSX",
|
||||
.level = 0xd,
|
||||
.vendor = CPUID_VENDOR_INTEL,
|
||||
.family = 6,
|
||||
.model = 61,
|
||||
.stepping = 2,
|
||||
.features[FEAT_1_EDX] =
|
||||
CPUID_VME | CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX |
|
||||
CPUID_CLFLUSH | CPUID_PSE36 | CPUID_PAT | CPUID_CMOV | CPUID_MCA |
|
||||
CPUID_PGE | CPUID_MTRR | CPUID_SEP | CPUID_APIC | CPUID_CX8 |
|
||||
CPUID_MCE | CPUID_PAE | CPUID_MSR | CPUID_TSC | CPUID_PSE |
|
||||
CPUID_DE | CPUID_FP87,
|
||||
.features[FEAT_1_ECX] =
|
||||
CPUID_EXT_AVX | CPUID_EXT_XSAVE | CPUID_EXT_AES |
|
||||
CPUID_EXT_POPCNT | CPUID_EXT_X2APIC | CPUID_EXT_SSE42 |
|
||||
CPUID_EXT_SSE41 | CPUID_EXT_CX16 | CPUID_EXT_SSSE3 |
|
||||
CPUID_EXT_PCLMULQDQ | CPUID_EXT_SSE3 |
|
||||
CPUID_EXT_TSC_DEADLINE_TIMER | CPUID_EXT_FMA | CPUID_EXT_MOVBE |
|
||||
CPUID_EXT_PCID | CPUID_EXT_F16C | CPUID_EXT_RDRAND,
|
||||
.features[FEAT_8000_0001_EDX] =
|
||||
CPUID_EXT2_LM | CPUID_EXT2_RDTSCP | CPUID_EXT2_NX |
|
||||
CPUID_EXT2_SYSCALL,
|
||||
.features[FEAT_8000_0001_ECX] =
|
||||
CPUID_EXT3_ABM | CPUID_EXT3_LAHF_LM | CPUID_EXT3_3DNOWPREFETCH,
|
||||
.features[FEAT_7_0_EBX] =
|
||||
CPUID_7_0_EBX_FSGSBASE | CPUID_7_0_EBX_BMI1 |
|
||||
CPUID_7_0_EBX_AVX2 | CPUID_7_0_EBX_SMEP |
|
||||
CPUID_7_0_EBX_BMI2 | CPUID_7_0_EBX_ERMS | CPUID_7_0_EBX_INVPCID |
|
||||
CPUID_7_0_EBX_RDSEED | CPUID_7_0_EBX_ADX |
|
||||
CPUID_7_0_EBX_SMAP,
|
||||
.features[FEAT_XSAVE] =
|
||||
CPUID_XSAVE_XSAVEOPT,
|
||||
.features[FEAT_6_EAX] =
|
||||
CPUID_6_EAX_ARAT,
|
||||
.xlevel = 0x80000008,
|
||||
.model_id = "Intel Core Processor (Broadwell, no TSX)",
|
||||
/*
|
||||
* This CPU model will eventually be replaced by an alias,
|
||||
* don't register any versions for it.
|
||||
*/
|
||||
.versions = (X86CPUVersionDefinition[]) { { /* end of list */ } },
|
||||
},
|
||||
{
|
||||
.name = "Broadwell-noTSX-IBRS",
|
||||
.level = 0xd,
|
||||
.vendor = CPUID_VENDOR_INTEL,
|
||||
.family = 6,
|
||||
.model = 61,
|
||||
.stepping = 2,
|
||||
.features[FEAT_1_EDX] =
|
||||
CPUID_VME | CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX |
|
||||
CPUID_CLFLUSH | CPUID_PSE36 | CPUID_PAT | CPUID_CMOV | CPUID_MCA |
|
||||
CPUID_PGE | CPUID_MTRR | CPUID_SEP | CPUID_APIC | CPUID_CX8 |
|
||||
CPUID_MCE | CPUID_PAE | CPUID_MSR | CPUID_TSC | CPUID_PSE |
|
||||
CPUID_DE | CPUID_FP87,
|
||||
.features[FEAT_1_ECX] =
|
||||
CPUID_EXT_AVX | CPUID_EXT_XSAVE | CPUID_EXT_AES |
|
||||
CPUID_EXT_POPCNT | CPUID_EXT_X2APIC | CPUID_EXT_SSE42 |
|
||||
CPUID_EXT_SSE41 | CPUID_EXT_CX16 | CPUID_EXT_SSSE3 |
|
||||
CPUID_EXT_PCLMULQDQ | CPUID_EXT_SSE3 |
|
||||
CPUID_EXT_TSC_DEADLINE_TIMER | CPUID_EXT_FMA | CPUID_EXT_MOVBE |
|
||||
CPUID_EXT_PCID | CPUID_EXT_F16C | CPUID_EXT_RDRAND,
|
||||
.features[FEAT_8000_0001_EDX] =
|
||||
CPUID_EXT2_LM | CPUID_EXT2_RDTSCP | CPUID_EXT2_NX |
|
||||
CPUID_EXT2_SYSCALL,
|
||||
.features[FEAT_8000_0001_ECX] =
|
||||
CPUID_EXT3_ABM | CPUID_EXT3_LAHF_LM | CPUID_EXT3_3DNOWPREFETCH,
|
||||
.features[FEAT_7_0_EDX] =
|
||||
CPUID_7_0_EDX_SPEC_CTRL,
|
||||
.features[FEAT_7_0_EBX] =
|
||||
CPUID_7_0_EBX_FSGSBASE | CPUID_7_0_EBX_BMI1 |
|
||||
CPUID_7_0_EBX_AVX2 | CPUID_7_0_EBX_SMEP |
|
||||
CPUID_7_0_EBX_BMI2 | CPUID_7_0_EBX_ERMS | CPUID_7_0_EBX_INVPCID |
|
||||
CPUID_7_0_EBX_RDSEED | CPUID_7_0_EBX_ADX |
|
||||
CPUID_7_0_EBX_SMAP,
|
||||
.features[FEAT_XSAVE] =
|
||||
CPUID_XSAVE_XSAVEOPT,
|
||||
.features[FEAT_6_EAX] =
|
||||
CPUID_6_EAX_ARAT,
|
||||
.xlevel = 0x80000008,
|
||||
.model_id = "Intel Core Processor (Broadwell, no TSX, IBRS)",
|
||||
/*
|
||||
* This CPU model will eventually be replaced by an alias,
|
||||
* don't register any versions for it.
|
||||
*/
|
||||
.versions = (X86CPUVersionDefinition[]) { { /* end of list */ } },
|
||||
},
|
||||
{
|
||||
.name = "Broadwell",
|
||||
.level = 0xd,
|
||||
|
@ -2594,7 +2237,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
|
|||
{ .version = 1 },
|
||||
{
|
||||
.version = 2,
|
||||
/* Equivalent to Broadwell-noTSX */
|
||||
.alias = "Broadwell-noTSX",
|
||||
.props = (PropValue[]) {
|
||||
{ "hle", "off" },
|
||||
{ "rtm", "off" },
|
||||
|
@ -2604,7 +2247,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
|
|||
},
|
||||
{
|
||||
.version = 3,
|
||||
/* Equivalent to Broadwell-IBRS */
|
||||
.alias = "Broadwell-IBRS",
|
||||
.props = (PropValue[]) {
|
||||
/* Restore TSX features removed by -v2 above */
|
||||
{ "hle", "on" },
|
||||
|
@ -2617,7 +2260,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
|
|||
},
|
||||
{
|
||||
.version = 4,
|
||||
/* Equivalent to Broadwell-noTSX-IBRS */
|
||||
.alias = "Broadwell-noTSX-IBRS",
|
||||
.props = (PropValue[]) {
|
||||
{ "hle", "off" },
|
||||
{ "rtm", "off" },
|
||||
|
@ -2630,51 +2273,6 @@ static X86CPUDefinition builtin_x86_defs[] = {
|
|||
{ /* end of list */ }
|
||||
}
|
||||
},
|
||||
{
|
||||
.name = "Broadwell-IBRS",
|
||||
.level = 0xd,
|
||||
.vendor = CPUID_VENDOR_INTEL,
|
||||
.family = 6,
|
||||
.model = 61,
|
||||
.stepping = 2,
|
||||
.features[FEAT_1_EDX] =
|
||||
CPUID_VME | CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX |
|
||||
CPUID_CLFLUSH | CPUID_PSE36 | CPUID_PAT | CPUID_CMOV | CPUID_MCA |
|
||||
CPUID_PGE | CPUID_MTRR | CPUID_SEP | CPUID_APIC | CPUID_CX8 |
|
||||
CPUID_MCE | CPUID_PAE | CPUID_MSR | CPUID_TSC | CPUID_PSE |
|
||||
CPUID_DE | CPUID_FP87,
|
||||
.features[FEAT_1_ECX] =
|
||||
CPUID_EXT_AVX | CPUID_EXT_XSAVE | CPUID_EXT_AES |
|
||||
CPUID_EXT_POPCNT | CPUID_EXT_X2APIC | CPUID_EXT_SSE42 |
|
||||
CPUID_EXT_SSE41 | CPUID_EXT_CX16 | CPUID_EXT_SSSE3 |
|
||||
CPUID_EXT_PCLMULQDQ | CPUID_EXT_SSE3 |
|
||||
CPUID_EXT_TSC_DEADLINE_TIMER | CPUID_EXT_FMA | CPUID_EXT_MOVBE |
|
||||
CPUID_EXT_PCID | CPUID_EXT_F16C | CPUID_EXT_RDRAND,
|
||||
.features[FEAT_8000_0001_EDX] =
|
||||
CPUID_EXT2_LM | CPUID_EXT2_RDTSCP | CPUID_EXT2_NX |
|
||||
CPUID_EXT2_SYSCALL,
|
||||
.features[FEAT_8000_0001_ECX] =
|
||||
CPUID_EXT3_ABM | CPUID_EXT3_LAHF_LM | CPUID_EXT3_3DNOWPREFETCH,
|
||||
.features[FEAT_7_0_EDX] =
|
||||
CPUID_7_0_EDX_SPEC_CTRL,
|
||||
.features[FEAT_7_0_EBX] =
|
||||
CPUID_7_0_EBX_FSGSBASE | CPUID_7_0_EBX_BMI1 |
|
||||
CPUID_7_0_EBX_HLE | CPUID_7_0_EBX_AVX2 | CPUID_7_0_EBX_SMEP |
|
||||
CPUID_7_0_EBX_BMI2 | CPUID_7_0_EBX_ERMS | CPUID_7_0_EBX_INVPCID |
|
||||
CPUID_7_0_EBX_RTM | CPUID_7_0_EBX_RDSEED | CPUID_7_0_EBX_ADX |
|
||||
CPUID_7_0_EBX_SMAP,
|
||||
.features[FEAT_XSAVE] =
|
||||
CPUID_XSAVE_XSAVEOPT,
|
||||
.features[FEAT_6_EAX] =
|
||||
CPUID_6_EAX_ARAT,
|
||||
.xlevel = 0x80000008,
|
||||
.model_id = "Intel Core Processor (Broadwell, IBRS)",
|
||||
/*
|
||||
* This CPU model will eventually be replaced by an alias,
|
||||
* don't register any versions for it.
|
||||
*/
|
||||
.versions = (X86CPUVersionDefinition[]) { { /* end of list */ } },
|
||||
},
|
||||
{
|
||||
.name = "Skylake-Client",
|
||||
.level = 0xd,
|
||||
|
@ -2723,7 +2321,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
|
|||
{ .version = 1 },
|
||||
{
|
||||
.version = 2,
|
||||
/* Equivalent to Skylake-Client-IBRS */
|
||||
.alias = "Skylake-Client-IBRS",
|
||||
.props = (PropValue[]) {
|
||||
{ "spec-ctrl", "on" },
|
||||
{ "model-id",
|
||||
|
@ -2734,58 +2332,6 @@ static X86CPUDefinition builtin_x86_defs[] = {
|
|||
{ /* end of list */ }
|
||||
}
|
||||
},
|
||||
{
|
||||
.name = "Skylake-Client-IBRS",
|
||||
.level = 0xd,
|
||||
.vendor = CPUID_VENDOR_INTEL,
|
||||
.family = 6,
|
||||
.model = 94,
|
||||
.stepping = 3,
|
||||
.features[FEAT_1_EDX] =
|
||||
CPUID_VME | CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX |
|
||||
CPUID_CLFLUSH | CPUID_PSE36 | CPUID_PAT | CPUID_CMOV | CPUID_MCA |
|
||||
CPUID_PGE | CPUID_MTRR | CPUID_SEP | CPUID_APIC | CPUID_CX8 |
|
||||
CPUID_MCE | CPUID_PAE | CPUID_MSR | CPUID_TSC | CPUID_PSE |
|
||||
CPUID_DE | CPUID_FP87,
|
||||
.features[FEAT_1_ECX] =
|
||||
CPUID_EXT_AVX | CPUID_EXT_XSAVE | CPUID_EXT_AES |
|
||||
CPUID_EXT_POPCNT | CPUID_EXT_X2APIC | CPUID_EXT_SSE42 |
|
||||
CPUID_EXT_SSE41 | CPUID_EXT_CX16 | CPUID_EXT_SSSE3 |
|
||||
CPUID_EXT_PCLMULQDQ | CPUID_EXT_SSE3 |
|
||||
CPUID_EXT_TSC_DEADLINE_TIMER | CPUID_EXT_FMA | CPUID_EXT_MOVBE |
|
||||
CPUID_EXT_PCID | CPUID_EXT_F16C | CPUID_EXT_RDRAND,
|
||||
.features[FEAT_8000_0001_EDX] =
|
||||
CPUID_EXT2_LM | CPUID_EXT2_RDTSCP | CPUID_EXT2_NX |
|
||||
CPUID_EXT2_SYSCALL,
|
||||
.features[FEAT_8000_0001_ECX] =
|
||||
CPUID_EXT3_ABM | CPUID_EXT3_LAHF_LM | CPUID_EXT3_3DNOWPREFETCH,
|
||||
.features[FEAT_7_0_EDX] =
|
||||
CPUID_7_0_EDX_SPEC_CTRL,
|
||||
.features[FEAT_7_0_EBX] =
|
||||
CPUID_7_0_EBX_FSGSBASE | CPUID_7_0_EBX_BMI1 |
|
||||
CPUID_7_0_EBX_HLE | CPUID_7_0_EBX_AVX2 | CPUID_7_0_EBX_SMEP |
|
||||
CPUID_7_0_EBX_BMI2 | CPUID_7_0_EBX_ERMS | CPUID_7_0_EBX_INVPCID |
|
||||
CPUID_7_0_EBX_RTM | CPUID_7_0_EBX_RDSEED | CPUID_7_0_EBX_ADX |
|
||||
CPUID_7_0_EBX_SMAP,
|
||||
/* Missing: XSAVES (not supported by some Linux versions,
|
||||
* including v4.1 to v4.12).
|
||||
* KVM doesn't yet expose any XSAVES state save component,
|
||||
* and the only one defined in Skylake (processor tracing)
|
||||
* probably will block migration anyway.
|
||||
*/
|
||||
.features[FEAT_XSAVE] =
|
||||
CPUID_XSAVE_XSAVEOPT | CPUID_XSAVE_XSAVEC |
|
||||
CPUID_XSAVE_XGETBV1,
|
||||
.features[FEAT_6_EAX] =
|
||||
CPUID_6_EAX_ARAT,
|
||||
.xlevel = 0x80000008,
|
||||
.model_id = "Intel Core Processor (Skylake, IBRS)",
|
||||
/*
|
||||
* This CPU model will eventually be replaced by an alias,
|
||||
* don't register any versions for it.
|
||||
*/
|
||||
.versions = (X86CPUVersionDefinition[]) { { /* end of list */ } },
|
||||
},
|
||||
{
|
||||
.name = "Skylake-Server",
|
||||
.level = 0xd,
|
||||
|
@ -2839,7 +2385,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
|
|||
{ .version = 1 },
|
||||
{
|
||||
.version = 2,
|
||||
/* Equivalent to Skylake-Server-IBRS */
|
||||
.alias = "Skylake-Server-IBRS",
|
||||
.props = (PropValue[]) {
|
||||
/* clflushopt was not added to Skylake-Server-IBRS */
|
||||
/* TODO: add -v3 including clflushopt */
|
||||
|
@ -2853,63 +2399,6 @@ static X86CPUDefinition builtin_x86_defs[] = {
|
|||
{ /* end of list */ }
|
||||
}
|
||||
},
|
||||
{
|
||||
.name = "Skylake-Server-IBRS",
|
||||
.level = 0xd,
|
||||
.vendor = CPUID_VENDOR_INTEL,
|
||||
.family = 6,
|
||||
.model = 85,
|
||||
.stepping = 4,
|
||||
.features[FEAT_1_EDX] =
|
||||
CPUID_VME | CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX |
|
||||
CPUID_CLFLUSH | CPUID_PSE36 | CPUID_PAT | CPUID_CMOV | CPUID_MCA |
|
||||
CPUID_PGE | CPUID_MTRR | CPUID_SEP | CPUID_APIC | CPUID_CX8 |
|
||||
CPUID_MCE | CPUID_PAE | CPUID_MSR | CPUID_TSC | CPUID_PSE |
|
||||
CPUID_DE | CPUID_FP87,
|
||||
.features[FEAT_1_ECX] =
|
||||
CPUID_EXT_AVX | CPUID_EXT_XSAVE | CPUID_EXT_AES |
|
||||
CPUID_EXT_POPCNT | CPUID_EXT_X2APIC | CPUID_EXT_SSE42 |
|
||||
CPUID_EXT_SSE41 | CPUID_EXT_CX16 | CPUID_EXT_SSSE3 |
|
||||
CPUID_EXT_PCLMULQDQ | CPUID_EXT_SSE3 |
|
||||
CPUID_EXT_TSC_DEADLINE_TIMER | CPUID_EXT_FMA | CPUID_EXT_MOVBE |
|
||||
CPUID_EXT_PCID | CPUID_EXT_F16C | CPUID_EXT_RDRAND,
|
||||
.features[FEAT_8000_0001_EDX] =
|
||||
CPUID_EXT2_LM | CPUID_EXT2_PDPE1GB | CPUID_EXT2_RDTSCP |
|
||||
CPUID_EXT2_NX | CPUID_EXT2_SYSCALL,
|
||||
.features[FEAT_8000_0001_ECX] =
|
||||
CPUID_EXT3_ABM | CPUID_EXT3_LAHF_LM | CPUID_EXT3_3DNOWPREFETCH,
|
||||
.features[FEAT_7_0_EDX] =
|
||||
CPUID_7_0_EDX_SPEC_CTRL,
|
||||
.features[FEAT_7_0_EBX] =
|
||||
CPUID_7_0_EBX_FSGSBASE | CPUID_7_0_EBX_BMI1 |
|
||||
CPUID_7_0_EBX_HLE | CPUID_7_0_EBX_AVX2 | CPUID_7_0_EBX_SMEP |
|
||||
CPUID_7_0_EBX_BMI2 | CPUID_7_0_EBX_ERMS | CPUID_7_0_EBX_INVPCID |
|
||||
CPUID_7_0_EBX_RTM | CPUID_7_0_EBX_RDSEED | CPUID_7_0_EBX_ADX |
|
||||
CPUID_7_0_EBX_SMAP | CPUID_7_0_EBX_CLWB |
|
||||
CPUID_7_0_EBX_AVX512F | CPUID_7_0_EBX_AVX512DQ |
|
||||
CPUID_7_0_EBX_AVX512BW | CPUID_7_0_EBX_AVX512CD |
|
||||
CPUID_7_0_EBX_AVX512VL,
|
||||
.features[FEAT_7_0_ECX] =
|
||||
CPUID_7_0_ECX_PKU,
|
||||
/* Missing: XSAVES (not supported by some Linux versions,
|
||||
* including v4.1 to v4.12).
|
||||
* KVM doesn't yet expose any XSAVES state save component,
|
||||
* and the only one defined in Skylake (processor tracing)
|
||||
* probably will block migration anyway.
|
||||
*/
|
||||
.features[FEAT_XSAVE] =
|
||||
CPUID_XSAVE_XSAVEOPT | CPUID_XSAVE_XSAVEC |
|
||||
CPUID_XSAVE_XGETBV1,
|
||||
.features[FEAT_6_EAX] =
|
||||
CPUID_6_EAX_ARAT,
|
||||
.xlevel = 0x80000008,
|
||||
.model_id = "Intel Xeon Processor (Skylake, IBRS)",
|
||||
/*
|
||||
* This CPU model will eventually be replaced by an alias,
|
||||
* don't register any versions for it.
|
||||
*/
|
||||
.versions = (X86CPUVersionDefinition[]) { { /* end of list */ } },
|
||||
},
|
||||
{
|
||||
.name = "Cascadelake-Server",
|
||||
.level = 0xd,
|
||||
|
@ -3371,7 +2860,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
|
|||
{ .version = 1 },
|
||||
{
|
||||
.version = 2,
|
||||
/* Equivalent to EPYC-IBPB */
|
||||
.alias = "EPYC-IBPB",
|
||||
.props = (PropValue[]) {
|
||||
{ "ibpb", "on" },
|
||||
{ "model-id",
|
||||
|
@ -3382,61 +2871,6 @@ static X86CPUDefinition builtin_x86_defs[] = {
|
|||
{ /* end of list */ }
|
||||
}
|
||||
},
|
||||
{
|
||||
.name = "EPYC-IBPB",
|
||||
.level = 0xd,
|
||||
.vendor = CPUID_VENDOR_AMD,
|
||||
.family = 23,
|
||||
.model = 1,
|
||||
.stepping = 2,
|
||||
.features[FEAT_1_EDX] =
|
||||
CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX | CPUID_CLFLUSH |
|
||||
CPUID_PSE36 | CPUID_PAT | CPUID_CMOV | CPUID_MCA | CPUID_PGE |
|
||||
CPUID_MTRR | CPUID_SEP | CPUID_APIC | CPUID_CX8 | CPUID_MCE |
|
||||
CPUID_PAE | CPUID_MSR | CPUID_TSC | CPUID_PSE | CPUID_DE |
|
||||
CPUID_VME | CPUID_FP87,
|
||||
.features[FEAT_1_ECX] =
|
||||
CPUID_EXT_RDRAND | CPUID_EXT_F16C | CPUID_EXT_AVX |
|
||||
CPUID_EXT_XSAVE | CPUID_EXT_AES | CPUID_EXT_POPCNT |
|
||||
CPUID_EXT_MOVBE | CPUID_EXT_SSE42 | CPUID_EXT_SSE41 |
|
||||
CPUID_EXT_CX16 | CPUID_EXT_FMA | CPUID_EXT_SSSE3 |
|
||||
CPUID_EXT_MONITOR | CPUID_EXT_PCLMULQDQ | CPUID_EXT_SSE3,
|
||||
.features[FEAT_8000_0001_EDX] =
|
||||
CPUID_EXT2_LM | CPUID_EXT2_RDTSCP | CPUID_EXT2_PDPE1GB |
|
||||
CPUID_EXT2_FFXSR | CPUID_EXT2_MMXEXT | CPUID_EXT2_NX |
|
||||
CPUID_EXT2_SYSCALL,
|
||||
.features[FEAT_8000_0001_ECX] =
|
||||
CPUID_EXT3_OSVW | CPUID_EXT3_3DNOWPREFETCH |
|
||||
CPUID_EXT3_MISALIGNSSE | CPUID_EXT3_SSE4A | CPUID_EXT3_ABM |
|
||||
CPUID_EXT3_CR8LEG | CPUID_EXT3_SVM | CPUID_EXT3_LAHF_LM |
|
||||
CPUID_EXT3_TOPOEXT,
|
||||
.features[FEAT_8000_0008_EBX] =
|
||||
CPUID_8000_0008_EBX_IBPB,
|
||||
.features[FEAT_7_0_EBX] =
|
||||
CPUID_7_0_EBX_FSGSBASE | CPUID_7_0_EBX_BMI1 | CPUID_7_0_EBX_AVX2 |
|
||||
CPUID_7_0_EBX_SMEP | CPUID_7_0_EBX_BMI2 | CPUID_7_0_EBX_RDSEED |
|
||||
CPUID_7_0_EBX_ADX | CPUID_7_0_EBX_SMAP | CPUID_7_0_EBX_CLFLUSHOPT |
|
||||
CPUID_7_0_EBX_SHA_NI,
|
||||
/* Missing: XSAVES (not supported by some Linux versions,
|
||||
* including v4.1 to v4.12).
|
||||
* KVM doesn't yet expose any XSAVES state save component.
|
||||
*/
|
||||
.features[FEAT_XSAVE] =
|
||||
CPUID_XSAVE_XSAVEOPT | CPUID_XSAVE_XSAVEC |
|
||||
CPUID_XSAVE_XGETBV1,
|
||||
.features[FEAT_6_EAX] =
|
||||
CPUID_6_EAX_ARAT,
|
||||
.features[FEAT_SVM] =
|
||||
CPUID_SVM_NPT | CPUID_SVM_NRIPSAVE,
|
||||
.xlevel = 0x8000001E,
|
||||
.model_id = "AMD EPYC Processor (with IBPB)",
|
||||
.cache_info = &epyc_cache_info,
|
||||
/*
|
||||
* This CPU model will eventually be replaced by an alias,
|
||||
* don't register any versions for it.
|
||||
*/
|
||||
.versions = (X86CPUVersionDefinition[]) { { /* end of list */ } },
|
||||
},
|
||||
{
|
||||
.name = "Dhyana",
|
||||
.level = 0xd,
|
||||
|
@ -4181,6 +3615,13 @@ static void x86_register_cpudef_types(struct uc_struct *uc, X86CPUDefinition *de
|
|||
name = x86_cpu_versioned_model_name(def, vdef->version);
|
||||
x86_register_cpu_model_type(uc, name, m);
|
||||
g_free(name);
|
||||
|
||||
if (vdef->alias) {
|
||||
X86CPUModel *am = g_new0(X86CPUModel, 1);
|
||||
am->cpudef = def;
|
||||
am->version = vdef->version;
|
||||
x86_register_cpu_model_type(uc, vdef->alias, am);
|
||||
}
|
||||
}
|
||||
|
||||
}
|
||||
|
|
Loading…
Reference in a new issue