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target/mips: Style improvements in translate.c

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Fixes mostly errors and warnings reported by 'checkpatch.pl -f'.

Backports commit 71375b59241a27b75d287b9216e5e82e43d763d8 from qemu
This commit is contained in:
Aleksandar Markovic 2019-11-18 21:36:25 -05:00 committed by Lioncash
parent cf6adb51e0
commit 551b3db088
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GPG key ID: 4E3C3CC1031BA9C7
1 changed files with 315 additions and 305 deletions
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18
qemu/target/mips/translate.c
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@ -4254,7 +4254,10 @@ static void gen_arith(DisasContext *ctx, uint32_t opc,
tcg_temp_free(tcg_ctx, t2); tcg_temp_free(tcg_ctx, t2);
tcg_gen_brcondi_tl(tcg_ctx, TCG_COND_GE, t1, 0, l1); tcg_gen_brcondi_tl(tcg_ctx, TCG_COND_GE, t1, 0, l1);
tcg_temp_free(tcg_ctx, t1); tcg_temp_free(tcg_ctx, t1);
/* operands of different sign, first operand and result different sign */ /*
* Operands of different sign, first operand and result different
* sign.
*/
generate_exception(ctx, EXCP_OVERFLOW); generate_exception(ctx, EXCP_OVERFLOW);
gen_set_label(tcg_ctx, l1); gen_set_label(tcg_ctx, l1);
gen_store_gpr(ctx, t0, rd); gen_store_gpr(ctx, t0, rd);
@ -9957,7 +9960,8 @@ static void gen_mftr(CPUMIPSState *env, DisasContext *ctx, int rt, int rd,
default: default:
gen_mfc0(ctx, t0, rt, sel); gen_mfc0(ctx, t0, rt, sel);
} }
} else switch (sel) { } else {
switch (sel) {
/* GPR registers. */ /* GPR registers. */
case 0: case 0:
gen_helper_1e0i(tcg_ctx, mftgpr, t0, rt); gen_helper_1e0i(tcg_ctx, mftgpr, t0, rt);
@ -10036,6 +10040,7 @@ static void gen_mftr(CPUMIPSState *env, DisasContext *ctx, int rt, int rd,
default: default:
goto die; goto die;
} }
}
LOG_DISAS("mftr (reg %d u %d sel %d h %d)\n", rt, u, sel, h); LOG_DISAS("mftr (reg %d u %d sel %d h %d)\n", rt, u, sel, h);
gen_store_gpr(ctx, t0, rd); gen_store_gpr(ctx, t0, rd);
tcg_temp_free(tcg_ctx, t0); tcg_temp_free(tcg_ctx, t0);
@ -10160,7 +10165,8 @@ static void gen_mttr(CPUMIPSState *env, DisasContext *ctx, int rd, int rt,
default: default:
gen_mtc0(ctx, t0, rd, sel); gen_mtc0(ctx, t0, rd, sel);
} }
} else switch (sel) { } else {
switch (sel) {
/* GPR registers. */ /* GPR registers. */
case 0: case 0:
gen_helper_0e1i(tcg_ctx, mttgpr, t0, rd); gen_helper_0e1i(tcg_ctx, mttgpr, t0, rd);
@ -10246,6 +10252,7 @@ static void gen_mttr(CPUMIPSState *env, DisasContext *ctx, int rd, int rt,
default: default:
goto die; goto die;
} }
}
LOG_DISAS("mttr (reg %d u %d sel %d h %d)\n", rd, u, sel, h); LOG_DISAS("mttr (reg %d u %d sel %d h %d)\n", rd, u, sel, h);
tcg_temp_free(tcg_ctx, t0); tcg_temp_free(tcg_ctx, t0);
return; return;
@ -15761,7 +15768,10 @@ static void gen_pool32axf(CPUMIPSState *env, DisasContext *ctx, int rt, int rs)
save_cpu_state(ctx, 1); save_cpu_state(ctx, 1);
gen_helper_di(tcg_ctx, t0, tcg_ctx->cpu_env); gen_helper_di(tcg_ctx, t0, tcg_ctx->cpu_env);
gen_store_gpr(ctx, t0, rs); gen_store_gpr(ctx, t0, rs);
/* Stop translation as we may have switched the execution mode */ /*
* Stop translation as we may have switched the execution
* mode.
*/
ctx->base.is_jmp = DISAS_STOP; ctx->base.is_jmp = DISAS_STOP;
tcg_temp_free(tcg_ctx, t0); tcg_temp_free(tcg_ctx, t0);
} }