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target/arm: Use tcg_gen_abs_i64 and tcg_gen_gvec_abs

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Backports commit 4e027a710673f5d4dc6cff88728bcfd32e4c47b0 from qemu
This commit is contained in:
Richard Henderson 2019-05-16 16:43:00 -04:00 committed by Lioncash
parent 7c9b3a9021
commit 552e48f14e
No known key found for this signature in database
GPG key ID: 4E3C3CC1031BA9C7
20 changed files with 8 additions and 83 deletions
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2
qemu/aarch64.h
View file

@ -1458,8 +1458,6 @@
#define helper_neon_abdl_u16 helper_neon_abdl_u16_aarch64
#define helper_neon_abdl_u32 helper_neon_abdl_u32_aarch64
#define helper_neon_abdl_u64 helper_neon_abdl_u64_aarch64
#define helper_neon_abs_s16 helper_neon_abs_s16_aarch64
#define helper_neon_abs_s8 helper_neon_abs_s8_aarch64
#define helper_neon_acge_f32 helper_neon_acge_f32_aarch64
#define helper_neon_acge_f64 helper_neon_acge_f64_aarch64
#define helper_neon_acgt_f32 helper_neon_acgt_f32_aarch64

2
qemu/aarch64eb.h
View file

@ -1458,8 +1458,6 @@
#define helper_neon_abdl_u16 helper_neon_abdl_u16_aarch64eb
#define helper_neon_abdl_u32 helper_neon_abdl_u32_aarch64eb
#define helper_neon_abdl_u64 helper_neon_abdl_u64_aarch64eb
#define helper_neon_abs_s16 helper_neon_abs_s16_aarch64eb
#define helper_neon_abs_s8 helper_neon_abs_s8_aarch64eb
#define helper_neon_acge_f32 helper_neon_acge_f32_aarch64eb
#define helper_neon_acge_f64 helper_neon_acge_f64_aarch64eb
#define helper_neon_acgt_f32 helper_neon_acgt_f32_aarch64eb

2
qemu/arm.h
View file

@ -1458,8 +1458,6 @@
#define helper_neon_abdl_u16 helper_neon_abdl_u16_arm
#define helper_neon_abdl_u32 helper_neon_abdl_u32_arm
#define helper_neon_abdl_u64 helper_neon_abdl_u64_arm
#define helper_neon_abs_s16 helper_neon_abs_s16_arm
#define helper_neon_abs_s8 helper_neon_abs_s8_arm
#define helper_neon_acge_f32 helper_neon_acge_f32_arm
#define helper_neon_acge_f64 helper_neon_acge_f64_arm
#define helper_neon_acgt_f32 helper_neon_acgt_f32_arm

2
qemu/armeb.h
View file

@ -1458,8 +1458,6 @@
#define helper_neon_abdl_u16 helper_neon_abdl_u16_armeb
#define helper_neon_abdl_u32 helper_neon_abdl_u32_armeb
#define helper_neon_abdl_u64 helper_neon_abdl_u64_armeb
#define helper_neon_abs_s16 helper_neon_abs_s16_armeb
#define helper_neon_abs_s8 helper_neon_abs_s8_armeb
#define helper_neon_acge_f32 helper_neon_acge_f32_armeb
#define helper_neon_acge_f64 helper_neon_acge_f64_armeb
#define helper_neon_acgt_f32 helper_neon_acgt_f32_armeb

2
qemu/header_gen.py
View file

@ -1464,8 +1464,6 @@ symbols = (
'helper_neon_abdl_u16',
'helper_neon_abdl_u32',
'helper_neon_abdl_u64',
'helper_neon_abs_s16',
'helper_neon_abs_s8',
'helper_neon_acge_f32',
'helper_neon_acge_f64',
'helper_neon_acgt_f32',

2
qemu/m68k.h
View file

@ -1458,8 +1458,6 @@
#define helper_neon_abdl_u16 helper_neon_abdl_u16_m68k
#define helper_neon_abdl_u32 helper_neon_abdl_u32_m68k
#define helper_neon_abdl_u64 helper_neon_abdl_u64_m68k
#define helper_neon_abs_s16 helper_neon_abs_s16_m68k
#define helper_neon_abs_s8 helper_neon_abs_s8_m68k
#define helper_neon_acge_f32 helper_neon_acge_f32_m68k
#define helper_neon_acge_f64 helper_neon_acge_f64_m68k
#define helper_neon_acgt_f32 helper_neon_acgt_f32_m68k

2
qemu/mips.h
View file

@ -1458,8 +1458,6 @@
#define helper_neon_abdl_u16 helper_neon_abdl_u16_mips
#define helper_neon_abdl_u32 helper_neon_abdl_u32_mips
#define helper_neon_abdl_u64 helper_neon_abdl_u64_mips
#define helper_neon_abs_s16 helper_neon_abs_s16_mips
#define helper_neon_abs_s8 helper_neon_abs_s8_mips
#define helper_neon_acge_f32 helper_neon_acge_f32_mips
#define helper_neon_acge_f64 helper_neon_acge_f64_mips
#define helper_neon_acgt_f32 helper_neon_acgt_f32_mips

2
qemu/mips64.h
View file

@ -1458,8 +1458,6 @@
#define helper_neon_abdl_u16 helper_neon_abdl_u16_mips64
#define helper_neon_abdl_u32 helper_neon_abdl_u32_mips64
#define helper_neon_abdl_u64 helper_neon_abdl_u64_mips64
#define helper_neon_abs_s16 helper_neon_abs_s16_mips64
#define helper_neon_abs_s8 helper_neon_abs_s8_mips64
#define helper_neon_acge_f32 helper_neon_acge_f32_mips64
#define helper_neon_acge_f64 helper_neon_acge_f64_mips64
#define helper_neon_acgt_f32 helper_neon_acgt_f32_mips64

2
qemu/mips64el.h
View file

@ -1458,8 +1458,6 @@
#define helper_neon_abdl_u16 helper_neon_abdl_u16_mips64el
#define helper_neon_abdl_u32 helper_neon_abdl_u32_mips64el
#define helper_neon_abdl_u64 helper_neon_abdl_u64_mips64el
#define helper_neon_abs_s16 helper_neon_abs_s16_mips64el
#define helper_neon_abs_s8 helper_neon_abs_s8_mips64el
#define helper_neon_acge_f32 helper_neon_acge_f32_mips64el
#define helper_neon_acge_f64 helper_neon_acge_f64_mips64el
#define helper_neon_acgt_f32 helper_neon_acgt_f32_mips64el

2
qemu/mipsel.h
View file

@ -1458,8 +1458,6 @@
#define helper_neon_abdl_u16 helper_neon_abdl_u16_mipsel
#define helper_neon_abdl_u32 helper_neon_abdl_u32_mipsel
#define helper_neon_abdl_u64 helper_neon_abdl_u64_mipsel
#define helper_neon_abs_s16 helper_neon_abs_s16_mipsel
#define helper_neon_abs_s8 helper_neon_abs_s8_mipsel
#define helper_neon_acge_f32 helper_neon_acge_f32_mipsel
#define helper_neon_acge_f64 helper_neon_acge_f64_mipsel
#define helper_neon_acgt_f32 helper_neon_acgt_f32_mipsel

2
qemu/powerpc.h
View file

@ -1458,8 +1458,6 @@
#define helper_neon_abdl_u16 helper_neon_abdl_u16_powerpc
#define helper_neon_abdl_u32 helper_neon_abdl_u32_powerpc
#define helper_neon_abdl_u64 helper_neon_abdl_u64_powerpc
#define helper_neon_abs_s16 helper_neon_abs_s16_powerpc
#define helper_neon_abs_s8 helper_neon_abs_s8_powerpc
#define helper_neon_acge_f32 helper_neon_acge_f32_powerpc
#define helper_neon_acge_f64 helper_neon_acge_f64_powerpc
#define helper_neon_acgt_f32 helper_neon_acgt_f32_powerpc

2
qemu/riscv32.h
View file

@ -1458,8 +1458,6 @@
#define helper_neon_abdl_u16 helper_neon_abdl_u16_riscv32
#define helper_neon_abdl_u32 helper_neon_abdl_u32_riscv32
#define helper_neon_abdl_u64 helper_neon_abdl_u64_riscv32
#define helper_neon_abs_s16 helper_neon_abs_s16_riscv32
#define helper_neon_abs_s8 helper_neon_abs_s8_riscv32
#define helper_neon_acge_f32 helper_neon_acge_f32_riscv32
#define helper_neon_acge_f64 helper_neon_acge_f64_riscv32
#define helper_neon_acgt_f32 helper_neon_acgt_f32_riscv32

2
qemu/riscv64.h
View file

@ -1458,8 +1458,6 @@
#define helper_neon_abdl_u16 helper_neon_abdl_u16_riscv64
#define helper_neon_abdl_u32 helper_neon_abdl_u32_riscv64
#define helper_neon_abdl_u64 helper_neon_abdl_u64_riscv64
#define helper_neon_abs_s16 helper_neon_abs_s16_riscv64
#define helper_neon_abs_s8 helper_neon_abs_s8_riscv64
#define helper_neon_acge_f32 helper_neon_acge_f32_riscv64
#define helper_neon_acge_f64 helper_neon_acge_f64_riscv64
#define helper_neon_acgt_f32 helper_neon_acgt_f32_riscv64

2
qemu/sparc.h
View file

@ -1458,8 +1458,6 @@
#define helper_neon_abdl_u16 helper_neon_abdl_u16_sparc
#define helper_neon_abdl_u32 helper_neon_abdl_u32_sparc
#define helper_neon_abdl_u64 helper_neon_abdl_u64_sparc
#define helper_neon_abs_s16 helper_neon_abs_s16_sparc
#define helper_neon_abs_s8 helper_neon_abs_s8_sparc
#define helper_neon_acge_f32 helper_neon_acge_f32_sparc
#define helper_neon_acge_f64 helper_neon_acge_f64_sparc
#define helper_neon_acgt_f32 helper_neon_acgt_f32_sparc

2
qemu/sparc64.h
View file

@ -1458,8 +1458,6 @@
#define helper_neon_abdl_u16 helper_neon_abdl_u16_sparc64
#define helper_neon_abdl_u32 helper_neon_abdl_u32_sparc64
#define helper_neon_abdl_u64 helper_neon_abdl_u64_sparc64
#define helper_neon_abs_s16 helper_neon_abs_s16_sparc64
#define helper_neon_abs_s8 helper_neon_abs_s8_sparc64
#define helper_neon_acge_f32 helper_neon_acge_f32_sparc64
#define helper_neon_acge_f64 helper_neon_acge_f64_sparc64
#define helper_neon_acgt_f32 helper_neon_acgt_f32_sparc64

2
qemu/target/arm/helper.h
View file

@ -354,8 +354,6 @@ DEF_HELPER_2(neon_ceq_u8, i32, i32, i32)
DEF_HELPER_2(neon_ceq_u16, i32, i32, i32)
DEF_HELPER_2(neon_ceq_u32, i32, i32, i32)
DEF_HELPER_1(neon_abs_s8, i32, i32)
DEF_HELPER_1(neon_abs_s16, i32, i32)
DEF_HELPER_1(neon_clz_u8, i32, i32)
DEF_HELPER_1(neon_clz_u16, i32, i32)
DEF_HELPER_1(neon_cls_s8, i32, i32)

5
qemu/target/arm/neon_helper.c
View file

@ -1240,11 +1240,6 @@ NEON_VOP(ceq_u16, neon_u16, 2)
NEON_VOP(ceq_u32, neon_u32, 1)
#undef NEON_FN
#define NEON_FN(dest, src, dummy) dest = (src < 0) ? -src : src
NEON_VOP1(abs_s8, neon_s8, 4)
NEON_VOP1(abs_s16, neon_s16, 2)
#undef NEON_FN
/* Count Leading Sign/Zero Bits. */
static inline int do_clz8(uint8_t x)
{

41
qemu/target/arm/translate-a64.c
View file

@ -9629,11 +9629,7 @@ static void handle_2misc_64(DisasContext *s, int opcode, bool u,
if (u) {
tcg_gen_neg_i64(tcg_ctx, tcg_rd, tcg_rn);
} else {
TCGv_i64 tcg_zero = tcg_const_i64(tcg_ctx, 0);
tcg_gen_neg_i64(tcg_ctx, tcg_rd, tcg_rn);
tcg_gen_movcond_i64(tcg_ctx, TCG_COND_GT, tcg_rd, tcg_rn, tcg_zero,
tcg_rn, tcg_rd);
tcg_temp_free_i64(tcg_ctx, tcg_zero);
tcg_gen_abs_i64(tcg_ctx, tcg_rd, tcg_rn);
}
break;
case 0x2f: /* FABS */
@ -12552,11 +12548,12 @@ static void disas_simd_two_reg_misc(DisasContext *s, uint32_t insn)
}
break;
case 0xb:
if (u) { /* NEG */
if (u) { /* ABS, NEG */
gen_gvec_fn2(s, is_q, rd, rn, tcg_gen_gvec_neg, size);
return;
} else {
gen_gvec_fn2(s, is_q, rd, rn, tcg_gen_gvec_abs, size);
}
break;
return;
}
if (size == 3) {
@ -12624,17 +12621,6 @@ static void disas_simd_two_reg_misc(DisasContext *s, uint32_t insn)
gen_helper_neon_qabs_s32(tcg_ctx, tcg_res, tcg_ctx->cpu_env, tcg_op);
}
break;
case 0xb: /* ABS, NEG */
if (u) {
tcg_gen_neg_i32(tcg_ctx, tcg_res, tcg_op);
} else {
TCGv_i32 tcg_zero = tcg_const_i32(tcg_ctx, 0);
tcg_gen_neg_i32(tcg_ctx, tcg_res, tcg_op);
tcg_gen_movcond_i32(tcg_ctx, TCG_COND_GT, tcg_res, tcg_op,
tcg_zero, tcg_op, tcg_res);
tcg_temp_free_i32(tcg_ctx, tcg_zero);
}
break;
case 0x2f: /* FABS */
gen_helper_vfp_abss(tcg_ctx, tcg_res, tcg_op);
break;
@ -12747,23 +12733,6 @@ static void disas_simd_two_reg_misc(DisasContext *s, uint32_t insn)
tcg_temp_free_i32(tcg_ctx, tcg_zero);
break;
}
case 0xb: /* ABS, NEG */
if (u) {
TCGv_i32 tcg_zero = tcg_const_i32(tcg_ctx, 0);
if (size) {
gen_helper_neon_sub_u16(tcg_ctx, tcg_res, tcg_zero, tcg_op);
} else {
gen_helper_neon_sub_u8(tcg_ctx, tcg_res, tcg_zero, tcg_op);
}
tcg_temp_free_i32(tcg_ctx, tcg_zero);
} else {
if (size) {
gen_helper_neon_abs_s16(tcg_ctx, tcg_res, tcg_op);
} else {
gen_helper_neon_abs_s8(tcg_ctx, tcg_res, tcg_op);
}
}
break;
case 0x4: /* CLS, CLZ */
if (u) {
if (size == 0) {

11
qemu/target/arm/translate.c
View file

@ -8275,6 +8275,9 @@ static int disas_neon_data_insn(DisasContext *s, uint32_t insn)
case NEON_2RM_VNEG:
tcg_gen_gvec_neg(tcg_ctx, size, rd_ofs, rm_ofs, vec_size, vec_size);
break;
case NEON_2RM_VABS:
tcg_gen_gvec_abs(tcg_ctx, size, rd_ofs, rm_ofs, vec_size, vec_size);
break;
default:
elementwise:
@ -8380,14 +8383,6 @@ static int disas_neon_data_insn(DisasContext *s, uint32_t insn)
}
tcg_temp_free_i32(tcg_ctx, tmp2);
break;
case NEON_2RM_VABS:
switch(size) {
case 0: gen_helper_neon_abs_s8(tcg_ctx, tmp, tmp); break;
case 1: gen_helper_neon_abs_s16(tcg_ctx, tmp, tmp); break;
case 2: tcg_gen_abs_i32(tcg_ctx, tmp, tmp); break;
default: abort();
}
break;
case NEON_2RM_VCGT0_F:
{
TCGv_ptr fpstatus = get_fpstatus_ptr(s, 1);

2
qemu/x86_64.h
View file

@ -1458,8 +1458,6 @@
#define helper_neon_abdl_u16 helper_neon_abdl_u16_x86_64
#define helper_neon_abdl_u32 helper_neon_abdl_u32_x86_64
#define helper_neon_abdl_u64 helper_neon_abdl_u64_x86_64
#define helper_neon_abs_s16 helper_neon_abs_s16_x86_64
#define helper_neon_abs_s8 helper_neon_abs_s8_x86_64
#define helper_neon_acge_f32 helper_neon_acge_f32_x86_64
#define helper_neon_acge_f64 helper_neon_acge_f64_x86_64
#define helper_neon_acgt_f32 helper_neon_acgt_f32_x86_64