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target-i386: Fix addr16 prefix

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While ADDSEG will only be false in 16-bit mode for LEA, it can be
false even in other cases when 16-bit addresses are obtained via
the 67h prefix in 32-bit mode. In this case, gen_lea_v_seg forgets
to add a nonzero FS or GS base if CS/DS/ES/SS are all zero. This
case is pretty rare but happens when booting Windows 95/98, and
this patch fixes it.

The bug is visible since commit d6a291498, but it was introduced
together with gen_lea_v_seg and it probably could be reproduced
with a "addr16 gs movsb" instruction as early as in commit
ca2f29f555805d07fb0b9ebfbbfc4e3656530977.

Backports commit e2e02a820741ec4d96b8f313b06a2a7ed5e94fbd from qemu
This commit is contained in:
Paolo Bonzini 2018-02-21 21:21:02 -05:00 committed by Lioncash
parent 085a3c9aab
commit 55c2a21fe8
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GPG key ID: 4E3C3CC1031BA9C7
1 changed files with 7 additions and 7 deletions
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12
qemu/target-i386/translate.c
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@ -556,15 +556,15 @@ static void gen_lea_v_seg(DisasContext *s, TCGMemOp aflag, TCGv a0,
break; break;
case MO_16: case MO_16:
/* 16 bit address */ /* 16 bit address */
if (ovr_seg < 0) {
ovr_seg = def_seg;
}
tcg_gen_ext16u_tl(tcg_ctx, cpu_A0, a0); tcg_gen_ext16u_tl(tcg_ctx, cpu_A0, a0);
/* ADDSEG will only be false in 16-bit mode for LEA. */ a0 = cpu_A0;
if (!s->addseg) { if (ovr_seg < 0) {
if (s->addseg) {
ovr_seg = def_seg;
} else {
return; return;
} }
a0 = cpu_A0; }
break; break;
default: default:
tcg_abort(); tcg_abort();