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tcg: Expand vector minmax using cmp+cmpsel
Provide a generic fallback for the min/max operations. Backports commit 72b4c792c7a576d9246207a8e9a940ed9e191722 from qemu
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56d35e80aa
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@ -121,6 +121,10 @@ bool tcg_can_emit_vecop_list(const TCGOpcode *list,
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}
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break;
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case INDEX_op_cmpsel_vec:
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case INDEX_op_smin_vec:
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case INDEX_op_smax_vec:
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case INDEX_op_umin_vec:
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case INDEX_op_umax_vec:
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if (tcg_can_emit_vec_op(INDEX_op_cmp_vec, type, vece)) {
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continue;
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}
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@ -633,24 +637,32 @@ void tcg_gen_ussub_vec(TCGContext *s, unsigned vece, TCGv_vec r, TCGv_vec a, TCG
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do_op3_nofail(s, vece, r, a, b, INDEX_op_ussub_vec);
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}
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static void do_minmax(TCGContext *s, unsigned vece, TCGv_vec r, TCGv_vec a,
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TCGv_vec b, TCGOpcode opc, TCGCond cond)
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{
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if (!do_op3(s, vece, r, a, b, opc)) {
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tcg_gen_cmpsel_vec(s, cond, vece, r, a, b, a, b);
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}
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}
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void tcg_gen_smin_vec(TCGContext *s, unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b)
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{
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do_op3_nofail(s, vece, r, a, b, INDEX_op_smin_vec);
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do_minmax(s, vece, r, a, b, INDEX_op_smin_vec, TCG_COND_LT);
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}
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void tcg_gen_umin_vec(TCGContext *s, unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b)
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{
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do_op3_nofail(s, vece, r, a, b, INDEX_op_umin_vec);
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do_minmax(s, vece, r, a, b, INDEX_op_umin_vec, TCG_COND_LTU);
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}
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void tcg_gen_smax_vec(TCGContext *s, unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b)
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{
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do_op3_nofail(s, vece, r, a, b, INDEX_op_smax_vec);
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do_minmax(s, vece, r, a, b, INDEX_op_smax_vec, TCG_COND_GT);
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}
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void tcg_gen_umax_vec(TCGContext *s, unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b)
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{
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do_op3_nofail(s, vece, r, a, b, INDEX_op_umax_vec);
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do_minmax(s, vece, r, a, b, INDEX_op_umax_vec, TCG_COND_GTU);
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}
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void tcg_gen_shlv_vec(TCGContext *s, unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b)
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