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Merge pull request #361 from farmdve/fix_bugs2

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Remove more instances of tcg_register_jit.
This commit is contained in:
Nguyen Anh Quynh 2016-01-07 22:48:25 +07:00
parent bfeb08d1ba 2304bbfc96
commit 57cf585d4c
6 changed files with 0 additions and 215 deletions
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43
qemu/tcg/aarch64/tcg-target.c
View file

@ -1811,47 +1811,4 @@ static void tcg_target_qemu_prologue(TCGContext *s)
tcg_out_insn(s, 3207, RET, TCG_REG_LR);
}
typedef struct {
DebugFrameHeader h;
uint8_t fde_def_cfa[4];
uint8_t fde_reg_ofs[24];
} DebugFrame;
#define ELF_HOST_MACHINE EM_AARCH64
static const DebugFrame debug_frame = {
.h.cie.len = sizeof(DebugFrameCIE)-4, /* length after .len member */
.h.cie.id = -1,
.h.cie.version = 1,
.h.cie.code_align = 1,
.h.cie.data_align = 0x78, /* sleb128 -8 */
.h.cie.return_column = TCG_REG_LR,
/* Total FDE size does not include the "len" member. */
.h.fde.len = sizeof(DebugFrame) - offsetof(DebugFrame, h.fde.cie_offset),
.fde_def_cfa = {
12, TCG_REG_SP, /* DW_CFA_def_cfa sp, ... */
(FRAME_SIZE & 0x7f) | 0x80, /* ... uleb128 FRAME_SIZE */
(FRAME_SIZE >> 7)
},
.fde_reg_ofs = {
0x80 + 28, 1, /* DW_CFA_offset, x28, -8 */
0x80 + 27, 2, /* DW_CFA_offset, x27, -16 */
0x80 + 26, 3, /* DW_CFA_offset, x26, -24 */
0x80 + 25, 4, /* DW_CFA_offset, x25, -32 */
0x80 + 24, 5, /* DW_CFA_offset, x24, -40 */
0x80 + 23, 6, /* DW_CFA_offset, x23, -48 */
0x80 + 22, 7, /* DW_CFA_offset, x22, -56 */
0x80 + 21, 8, /* DW_CFA_offset, x21, -64 */
0x80 + 20, 9, /* DW_CFA_offset, x20, -72 */
0x80 + 19, 10, /* DW_CFA_offset, x1p, -80 */
0x80 + 30, 11, /* DW_CFA_offset, lr, -88 */
0x80 + 29, 12, /* DW_CFA_offset, fp, -96 */
}
};
void tcg_register_jit(void *buf, size_t buf_size)
{
tcg_register_jit_int(buf, buf_size, &debug_frame, sizeof(debug_frame));
}

44
qemu/tcg/arm/tcg-target.c
View file

@ -2076,48 +2076,4 @@ static void tcg_target_qemu_prologue(TCGContext *s)
tcg_out32(s, (COND_AL << 28) | 0x08bd8ff0);
}
typedef struct {
DebugFrameHeader h;
uint8_t fde_def_cfa[4];
uint8_t fde_reg_ofs[18];
} DebugFrame;
#define ELF_HOST_MACHINE EM_ARM
/* We're expecting a 2 byte uleb128 encoded value. */
QEMU_BUILD_BUG_ON(FRAME_SIZE >= (1 << 14));
static const DebugFrame debug_frame = {
.h.cie.len = sizeof(DebugFrameCIE)-4, /* length after .len member */
.h.cie.id = -1,
.h.cie.version = 1,
.h.cie.code_align = 1,
.h.cie.data_align = 0x7c, /* sleb128 -4 */
.h.cie.return_column = 14,
/* Total FDE size does not include the "len" member. */
.h.fde.len = sizeof(DebugFrame) - offsetof(DebugFrame, h.fde.cie_offset),
.fde_def_cfa = {
12, 13, /* DW_CFA_def_cfa sp, ... */
(FRAME_SIZE & 0x7f) | 0x80, /* ... uleb128 FRAME_SIZE */
(FRAME_SIZE >> 7)
},
.fde_reg_ofs = {
/* The following must match the stmdb in the prologue. */
0x8e, 1, /* DW_CFA_offset, lr, -4 */
0x8b, 2, /* DW_CFA_offset, r11, -8 */
0x8a, 3, /* DW_CFA_offset, r10, -12 */
0x89, 4, /* DW_CFA_offset, r9, -16 */
0x88, 5, /* DW_CFA_offset, r8, -20 */
0x87, 6, /* DW_CFA_offset, r7, -24 */
0x86, 7, /* DW_CFA_offset, r6, -28 */
0x85, 8, /* DW_CFA_offset, r5, -32 */
0x84, 9, /* DW_CFA_offset, r4, -36 */
}
};
void tcg_register_jit(void *buf, size_t buf_size)
{
tcg_register_jit_int(buf, buf_size, &debug_frame, sizeof(debug_frame));
}

48
qemu/tcg/ppc/tcg-target.c
View file

@ -2568,59 +2568,11 @@ static void tcg_target_init(TCGContext *s)
}
#ifdef __ELF__
typedef struct {
DebugFrameCIE cie;
DebugFrameFDEHeader fde;
uint8_t fde_def_cfa[4];
uint8_t fde_reg_ofs[ARRAY_SIZE(tcg_target_callee_save_regs) * 2 + 3];
} DebugFrame;
/* We're expecting a 2 byte uleb128 encoded value. */
QEMU_BUILD_BUG_ON(FRAME_SIZE >= (1 << 14));
#if TCG_TARGET_REG_BITS == 64
# define ELF_HOST_MACHINE EM_PPC64
#else
# define ELF_HOST_MACHINE EM_PPC
#endif
static DebugFrame debug_frame = {
.cie.len = sizeof(DebugFrameCIE)-4, /* length after .len member */
.cie.id = -1,
.cie.version = 1,
.cie.code_align = 1,
.cie.data_align = (-SZR & 0x7f), /* sleb128 -SZR */
.cie.return_column = 65,
/* Total FDE size does not include the "len" member. */
.fde.len = sizeof(DebugFrame) - offsetof(DebugFrame, fde.cie_offset),
.fde_def_cfa = {
12, TCG_REG_R1, /* DW_CFA_def_cfa r1, ... */
(FRAME_SIZE & 0x7f) | 0x80, /* ... uleb128 FRAME_SIZE */
(FRAME_SIZE >> 7)
},
.fde_reg_ofs = {
/* DW_CFA_offset_extended_sf, lr, LR_OFFSET */
0x11, 65, (LR_OFFSET / -SZR) & 0x7f,
}
};
void tcg_register_jit(void *buf, size_t buf_size)
{
uint8_t *p = &debug_frame.fde_reg_ofs[3];
int i;
for (i = 0; i < ARRAY_SIZE(tcg_target_callee_save_regs); ++i, p += 2) {
p[0] = 0x80 + tcg_target_callee_save_regs[i];
p[1] = (FRAME_SIZE - (REG_SAVE_BOT + i * SZR)) / SZR;
}
debug_frame.fde.func_start = (uintptr_t)buf;
debug_frame.fde.func_len = buf_size;
tcg_register_jit_int(buf, buf_size, &debug_frame, sizeof(debug_frame));
}
#endif /* __ELF__ */
static size_t dcache_bsize = 16;

43
qemu/tcg/s390/tcg-target.c
View file

@ -2343,47 +2343,4 @@ static void tcg_target_qemu_prologue(TCGContext *s)
tcg_out_insn(s, RR, BCR, S390_CC_ALWAYS, TCG_REG_R14);
}
typedef struct {
DebugFrameHeader h;
uint8_t fde_def_cfa[4];
uint8_t fde_reg_ofs[18];
} DebugFrame;
/* We're expecting a 2 byte uleb128 encoded value. */
QEMU_BUILD_BUG_ON(FRAME_SIZE >= (1 << 14));
#define ELF_HOST_MACHINE EM_S390
static const DebugFrame debug_frame = {
.h.cie.len = sizeof(DebugFrameCIE)-4, /* length after .len member */
.h.cie.id = -1,
.h.cie.version = 1,
.h.cie.code_align = 1,
.h.cie.data_align = 8, /* sleb128 8 */
.h.cie.return_column = TCG_REG_R14,
/* Total FDE size does not include the "len" member. */
.h.fde.len = sizeof(DebugFrame) - offsetof(DebugFrame, h.fde.cie_offset),
.fde_def_cfa = {
12, TCG_REG_CALL_STACK, /* DW_CFA_def_cfa %r15, ... */
(FRAME_SIZE & 0x7f) | 0x80, /* ... uleb128 FRAME_SIZE */
(FRAME_SIZE >> 7)
},
.fde_reg_ofs = {
0x86, 6, /* DW_CFA_offset, %r6, 48 */
0x87, 7, /* DW_CFA_offset, %r7, 56 */
0x88, 8, /* DW_CFA_offset, %r8, 64 */
0x89, 9, /* DW_CFA_offset, %r92, 72 */
0x8a, 10, /* DW_CFA_offset, %r10, 80 */
0x8b, 11, /* DW_CFA_offset, %r11, 88 */
0x8c, 12, /* DW_CFA_offset, %r12, 96 */
0x8d, 13, /* DW_CFA_offset, %r13, 104 */
0x8e, 14, /* DW_CFA_offset, %r14, 112 */
}
};
void tcg_register_jit(void *buf, size_t buf_size)
{
tcg_register_jit_int(buf, buf_size, &debug_frame, sizeof(debug_frame));
}

35
qemu/tcg/sparc/tcg-target.c
View file

@ -1599,41 +1599,6 @@ static void tcg_target_init(TCGContext *s)
# define ELF_HOST_FLAGS EF_SPARC_32PLUS
#endif
typedef struct {
DebugFrameHeader h;
uint8_t fde_def_cfa[SPARC64 ? 4 : 2];
uint8_t fde_win_save;
uint8_t fde_ret_save[3];
} DebugFrame;
static const DebugFrame debug_frame = {
.h.cie.len = sizeof(DebugFrameCIE)-4, /* length after .len member */
.h.cie.id = -1,
.h.cie.version = 1,
.h.cie.code_align = 1,
.h.cie.data_align = -sizeof(void *) & 0x7f,
.h.cie.return_column = 15, /* o7 */
/* Total FDE size does not include the "len" member. */
.h.fde.len = sizeof(DebugFrame) - offsetof(DebugFrame, h.fde.cie_offset),
.fde_def_cfa = {
#if SPARC64
12, 30, /* DW_CFA_def_cfa i6, 2047 */
(2047 & 0x7f) | 0x80, (2047 >> 7)
#else
13, 30 /* DW_CFA_def_cfa_register i6 */
#endif
},
.fde_win_save = 0x2d, /* DW_CFA_GNU_window_save */
.fde_ret_save = { 9, 15, 31 }, /* DW_CFA_register o7, i7 */
};
void tcg_register_jit(void *buf, size_t buf_size)
{
tcg_register_jit_int(buf, buf_size, &debug_frame, sizeof(debug_frame));
}
void tb_set_jmp_target1(uintptr_t jmp_addr, uintptr_t addr)
{
uint32_t *ptr = (uint32_t *)jmp_addr;

2
qemu/tcg/tcg.h
View file

@ -936,8 +936,6 @@ static inline size_t tcg_current_code_size(TCGContext *s)
((uintptr_t (*)(void *, void *))tcg_ctx->code_gen_prologue)(env, tb_ptr)
#endif
void tcg_register_jit(void *buf, size_t buf_size);
/*
* Memory helpers that will be used by TCG generated code.
*/