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target/arm: Implement fp16 for Neon VMLA, VMLS operations
Convert the Neon floating-point VMLA and VMLS insns over to using a gvec helper, and use this to implement the fp16 case. Backports e5adc70665ecaf4009c2fb8d66775ea718a85abd
This commit is contained in:
Peter Maydell
Lioncash
parent
0068d12355
commit
587c3549b7
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@ -1295,6 +1295,8 @@
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#define helper_gvec_fmin_s helper_gvec_fmin_s_aarch64
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#define helper_gvec_fminnum_h helper_gvec_fminnum_h_aarch64
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#define helper_gvec_fminnum_s helper_gvec_fminnum_s_aarch64
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#define helper_gvec_fmla_h helper_gvec_fmla_h_aarch64
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#define helper_gvec_fmla_s helper_gvec_fmla_s_aarch64
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#define helper_gvec_fmla_idx_d helper_gvec_fmla_idx_d_aarch64
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#define helper_gvec_fmla_idx_h helper_gvec_fmla_idx_h_aarch64
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#define helper_gvec_fmla_idx_s helper_gvec_fmla_idx_s_aarch64
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@ -1302,6 +1304,8 @@
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#define helper_gvec_fmlal_a64 helper_gvec_fmlal_a64_aarch64
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#define helper_gvec_fmlal_idx_a32 helper_gvec_fmlal_idx_a32_aarch64
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#define helper_gvec_fmlal_idx_a64 helper_gvec_fmlal_idx_a64_aarch64
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#define helper_gvec_fmls_h helper_gvec_fmls_h_aarch64
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#define helper_gvec_fmls_s helper_gvec_fmls_s_aarch64
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#define helper_gvec_fmul_d helper_gvec_fmul_d_aarch64
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#define helper_gvec_fmul_h helper_gvec_fmul_h_aarch64
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#define helper_gvec_fmul_s helper_gvec_fmul_s_aarch64
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@ -1295,6 +1295,8 @@
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#define helper_gvec_fmin_s helper_gvec_fmin_s_aarch64eb
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#define helper_gvec_fminnum_h helper_gvec_fminnum_h_aarch64eb
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#define helper_gvec_fminnum_s helper_gvec_fminnum_s_aarch64eb
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#define helper_gvec_fmla_h helper_gvec_fmla_h_aarch64eb
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#define helper_gvec_fmla_s helper_gvec_fmla_s_aarch64eb
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#define helper_gvec_fmla_idx_d helper_gvec_fmla_idx_d_aarch64eb
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#define helper_gvec_fmla_idx_h helper_gvec_fmla_idx_h_aarch64eb
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#define helper_gvec_fmla_idx_s helper_gvec_fmla_idx_s_aarch64eb
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@ -1302,6 +1304,8 @@
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#define helper_gvec_fmlal_a64 helper_gvec_fmlal_a64_aarch64eb
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#define helper_gvec_fmlal_idx_a32 helper_gvec_fmlal_idx_a32_aarch64eb
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#define helper_gvec_fmlal_idx_a64 helper_gvec_fmlal_idx_a64_aarch64eb
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#define helper_gvec_fmls_h helper_gvec_fmls_h_aarch64eb
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#define helper_gvec_fmls_s helper_gvec_fmls_s_aarch64eb
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#define helper_gvec_fmul_d helper_gvec_fmul_d_aarch64eb
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#define helper_gvec_fmul_h helper_gvec_fmul_h_aarch64eb
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#define helper_gvec_fmul_s helper_gvec_fmul_s_aarch64eb
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@ -1295,6 +1295,8 @@
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#define helper_gvec_fmin_s helper_gvec_fmin_s_arm
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#define helper_gvec_fminnum_h helper_gvec_fminnum_h_arm
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#define helper_gvec_fminnum_s helper_gvec_fminnum_s_arm
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#define helper_gvec_fmla_h helper_gvec_fmla_h_arm
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#define helper_gvec_fmla_s helper_gvec_fmla_s_arm
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#define helper_gvec_fmla_idx_d helper_gvec_fmla_idx_d_arm
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#define helper_gvec_fmla_idx_h helper_gvec_fmla_idx_h_arm
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#define helper_gvec_fmla_idx_s helper_gvec_fmla_idx_s_arm
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@ -1302,6 +1304,8 @@
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#define helper_gvec_fmlal_a64 helper_gvec_fmlal_a64_arm
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#define helper_gvec_fmlal_idx_a32 helper_gvec_fmlal_idx_a32_arm
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#define helper_gvec_fmlal_idx_a64 helper_gvec_fmlal_idx_a64_arm
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#define helper_gvec_fmls_h helper_gvec_fmls_h_arm
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#define helper_gvec_fmls_s helper_gvec_fmls_s_arm
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#define helper_gvec_fmul_d helper_gvec_fmul_d_arm
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#define helper_gvec_fmul_h helper_gvec_fmul_h_arm
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#define helper_gvec_fmul_s helper_gvec_fmul_s_arm
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@ -1295,6 +1295,8 @@
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#define helper_gvec_fmin_s helper_gvec_fmin_s_armeb
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#define helper_gvec_fminnum_h helper_gvec_fminnum_h_armeb
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#define helper_gvec_fminnum_s helper_gvec_fminnum_s_armeb
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#define helper_gvec_fmla_h helper_gvec_fmla_h_armeb
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#define helper_gvec_fmla_s helper_gvec_fmla_s_armeb
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#define helper_gvec_fmla_idx_d helper_gvec_fmla_idx_d_armeb
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#define helper_gvec_fmla_idx_h helper_gvec_fmla_idx_h_armeb
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#define helper_gvec_fmla_idx_s helper_gvec_fmla_idx_s_armeb
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#define helper_gvec_fmlal_a64 helper_gvec_fmlal_a64_armeb
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#define helper_gvec_fmlal_idx_a32 helper_gvec_fmlal_idx_a32_armeb
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#define helper_gvec_fmlal_idx_a64 helper_gvec_fmlal_idx_a64_armeb
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#define helper_gvec_fmls_h helper_gvec_fmls_h_armeb
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#define helper_gvec_fmls_s helper_gvec_fmls_s_armeb
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#define helper_gvec_fmul_d helper_gvec_fmul_d_armeb
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#define helper_gvec_fmul_h helper_gvec_fmul_h_armeb
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#define helper_gvec_fmul_s helper_gvec_fmul_s_armeb
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@ -1301,6 +1301,8 @@ symbols = (
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'helper_gvec_fmin_s',
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'helper_gvec_fminnum_h',
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'helper_gvec_fminnum_s',
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'helper_gvec_fmla_h',
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'helper_gvec_fmla_s',
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'helper_gvec_fmla_idx_d',
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'helper_gvec_fmla_idx_h',
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'helper_gvec_fmla_idx_s',
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@ -1308,6 +1310,8 @@ symbols = (
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'helper_gvec_fmlal_a64',
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'helper_gvec_fmlal_idx_a32',
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'helper_gvec_fmlal_idx_a64',
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'helper_gvec_fmls_h',
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'helper_gvec_fmls_s',
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'helper_gvec_fmul_d',
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'helper_gvec_fmul_h',
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'helper_gvec_fmul_s',
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@ -1295,6 +1295,8 @@
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#define helper_gvec_fmin_s helper_gvec_fmin_s_m68k
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#define helper_gvec_fminnum_h helper_gvec_fminnum_h_m68k
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#define helper_gvec_fminnum_s helper_gvec_fminnum_s_m68k
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#define helper_gvec_fmla_h helper_gvec_fmla_h_m68k
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#define helper_gvec_fmla_s helper_gvec_fmla_s_m68k
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#define helper_gvec_fmla_idx_d helper_gvec_fmla_idx_d_m68k
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#define helper_gvec_fmla_idx_h helper_gvec_fmla_idx_h_m68k
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#define helper_gvec_fmla_idx_s helper_gvec_fmla_idx_s_m68k
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#define helper_gvec_fmlal_a64 helper_gvec_fmlal_a64_m68k
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#define helper_gvec_fmlal_idx_a32 helper_gvec_fmlal_idx_a32_m68k
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#define helper_gvec_fmlal_idx_a64 helper_gvec_fmlal_idx_a64_m68k
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#define helper_gvec_fmls_h helper_gvec_fmls_h_m68k
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#define helper_gvec_fmls_s helper_gvec_fmls_s_m68k
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#define helper_gvec_fmul_d helper_gvec_fmul_d_m68k
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#define helper_gvec_fmul_h helper_gvec_fmul_h_m68k
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#define helper_gvec_fmul_s helper_gvec_fmul_s_m68k
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#define helper_gvec_fmin_s helper_gvec_fmin_s_mips
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#define helper_gvec_fminnum_h helper_gvec_fminnum_h_mips
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#define helper_gvec_fminnum_s helper_gvec_fminnum_s_mips
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#define helper_gvec_fmla_h helper_gvec_fmla_h_mips
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#define helper_gvec_fmla_s helper_gvec_fmla_s_mips
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#define helper_gvec_fmla_idx_d helper_gvec_fmla_idx_d_mips
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#define helper_gvec_fmla_idx_h helper_gvec_fmla_idx_h_mips
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#define helper_gvec_fmla_idx_s helper_gvec_fmla_idx_s_mips
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#define helper_gvec_fmlal_a64 helper_gvec_fmlal_a64_mips
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#define helper_gvec_fmlal_idx_a32 helper_gvec_fmlal_idx_a32_mips
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#define helper_gvec_fmlal_idx_a64 helper_gvec_fmlal_idx_a64_mips
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#define helper_gvec_fmls_h helper_gvec_fmls_h_mips
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#define helper_gvec_fmls_s helper_gvec_fmls_s_mips
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#define helper_gvec_fmul_d helper_gvec_fmul_d_mips
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#define helper_gvec_fmul_h helper_gvec_fmul_h_mips
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#define helper_gvec_fmul_s helper_gvec_fmul_s_mips
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#define helper_gvec_fmin_s helper_gvec_fmin_s_mips64
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#define helper_gvec_fminnum_h helper_gvec_fminnum_h_mips64
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#define helper_gvec_fminnum_s helper_gvec_fminnum_s_mips64
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#define helper_gvec_fmla_h helper_gvec_fmla_h_mips64
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#define helper_gvec_fmla_s helper_gvec_fmla_s_mips64
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#define helper_gvec_fmla_idx_d helper_gvec_fmla_idx_d_mips64
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#define helper_gvec_fmla_idx_h helper_gvec_fmla_idx_h_mips64
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#define helper_gvec_fmla_idx_s helper_gvec_fmla_idx_s_mips64
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#define helper_gvec_fmlal_a64 helper_gvec_fmlal_a64_mips64
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#define helper_gvec_fmlal_idx_a32 helper_gvec_fmlal_idx_a32_mips64
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#define helper_gvec_fmlal_idx_a64 helper_gvec_fmlal_idx_a64_mips64
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#define helper_gvec_fmls_h helper_gvec_fmls_h_mips64
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#define helper_gvec_fmls_s helper_gvec_fmls_s_mips64
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#define helper_gvec_fmul_d helper_gvec_fmul_d_mips64
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#define helper_gvec_fmul_h helper_gvec_fmul_h_mips64
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#define helper_gvec_fmul_s helper_gvec_fmul_s_mips64
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#define helper_gvec_fmin_s helper_gvec_fmin_s_mips64el
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#define helper_gvec_fminnum_h helper_gvec_fminnum_h_mips64el
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#define helper_gvec_fminnum_s helper_gvec_fminnum_s_mips64el
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#define helper_gvec_fmla_h helper_gvec_fmla_h_mips64el
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#define helper_gvec_fmla_s helper_gvec_fmla_s_mips64el
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#define helper_gvec_fmla_idx_d helper_gvec_fmla_idx_d_mips64el
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#define helper_gvec_fmla_idx_h helper_gvec_fmla_idx_h_mips64el
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#define helper_gvec_fmla_idx_s helper_gvec_fmla_idx_s_mips64el
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#define helper_gvec_fmlal_a64 helper_gvec_fmlal_a64_mips64el
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#define helper_gvec_fmlal_idx_a32 helper_gvec_fmlal_idx_a32_mips64el
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#define helper_gvec_fmlal_idx_a64 helper_gvec_fmlal_idx_a64_mips64el
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#define helper_gvec_fmls_h helper_gvec_fmls_h_mips64el
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#define helper_gvec_fmls_s helper_gvec_fmls_s_mips64el
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#define helper_gvec_fmul_d helper_gvec_fmul_d_mips64el
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#define helper_gvec_fmul_h helper_gvec_fmul_h_mips64el
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#define helper_gvec_fmul_s helper_gvec_fmul_s_mips64el
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#define helper_gvec_fmin_s helper_gvec_fmin_s_mipsel
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#define helper_gvec_fminnum_h helper_gvec_fminnum_h_mipsel
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#define helper_gvec_fminnum_s helper_gvec_fminnum_s_mipsel
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#define helper_gvec_fmla_h helper_gvec_fmla_h_mipsel
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#define helper_gvec_fmla_s helper_gvec_fmla_s_mipsel
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#define helper_gvec_fmla_idx_d helper_gvec_fmla_idx_d_mipsel
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#define helper_gvec_fmla_idx_h helper_gvec_fmla_idx_h_mipsel
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#define helper_gvec_fmla_idx_s helper_gvec_fmla_idx_s_mipsel
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#define helper_gvec_fmlal_a64 helper_gvec_fmlal_a64_mipsel
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#define helper_gvec_fmlal_idx_a32 helper_gvec_fmlal_idx_a32_mipsel
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#define helper_gvec_fmlal_idx_a64 helper_gvec_fmlal_idx_a64_mipsel
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#define helper_gvec_fmls_h helper_gvec_fmls_h_mipsel
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#define helper_gvec_fmls_s helper_gvec_fmls_s_mipsel
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#define helper_gvec_fmul_d helper_gvec_fmul_d_mipsel
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#define helper_gvec_fmul_h helper_gvec_fmul_h_mipsel
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#define helper_gvec_fmul_s helper_gvec_fmul_s_mipsel
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#define helper_gvec_fmin_s helper_gvec_fmin_s_powerpc
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#define helper_gvec_fminnum_h helper_gvec_fminnum_h_powerpc
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#define helper_gvec_fminnum_s helper_gvec_fminnum_s_powerpc
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#define helper_gvec_fmla_h helper_gvec_fmla_h_powerpc
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#define helper_gvec_fmla_s helper_gvec_fmla_s_powerpc
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#define helper_gvec_fmla_idx_d helper_gvec_fmla_idx_d_powerpc
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#define helper_gvec_fmla_idx_h helper_gvec_fmla_idx_h_powerpc
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#define helper_gvec_fmla_idx_s helper_gvec_fmla_idx_s_powerpc
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#define helper_gvec_fmlal_a64 helper_gvec_fmlal_a64_powerpc
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#define helper_gvec_fmlal_idx_a32 helper_gvec_fmlal_idx_a32_powerpc
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#define helper_gvec_fmlal_idx_a64 helper_gvec_fmlal_idx_a64_powerpc
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#define helper_gvec_fmls_h helper_gvec_fmls_h_powerpc
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#define helper_gvec_fmls_s helper_gvec_fmls_s_powerpc
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#define helper_gvec_fmul_d helper_gvec_fmul_d_powerpc
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#define helper_gvec_fmul_h helper_gvec_fmul_h_powerpc
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#define helper_gvec_fmul_s helper_gvec_fmul_s_powerpc
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#define helper_gvec_fmin_s helper_gvec_fmin_s_riscv32
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#define helper_gvec_fminnum_h helper_gvec_fminnum_h_riscv32
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#define helper_gvec_fminnum_s helper_gvec_fminnum_s_riscv32
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#define helper_gvec_fmla_h helper_gvec_fmla_h_riscv32
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#define helper_gvec_fmla_s helper_gvec_fmla_s_riscv32
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#define helper_gvec_fmla_idx_d helper_gvec_fmla_idx_d_riscv32
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#define helper_gvec_fmla_idx_h helper_gvec_fmla_idx_h_riscv32
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#define helper_gvec_fmla_idx_s helper_gvec_fmla_idx_s_riscv32
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#define helper_gvec_fmlal_a64 helper_gvec_fmlal_a64_riscv32
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#define helper_gvec_fmlal_idx_a32 helper_gvec_fmlal_idx_a32_riscv32
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#define helper_gvec_fmlal_idx_a64 helper_gvec_fmlal_idx_a64_riscv32
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#define helper_gvec_fmls_h helper_gvec_fmls_h_riscv32
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#define helper_gvec_fmls_s helper_gvec_fmls_s_riscv32
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#define helper_gvec_fmul_d helper_gvec_fmul_d_riscv32
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#define helper_gvec_fmul_h helper_gvec_fmul_h_riscv32
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#define helper_gvec_fmul_s helper_gvec_fmul_s_riscv32
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#define helper_gvec_fmin_s helper_gvec_fmin_s_riscv64
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#define helper_gvec_fminnum_h helper_gvec_fminnum_h_riscv64
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#define helper_gvec_fminnum_s helper_gvec_fminnum_s_riscv64
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#define helper_gvec_fmla_h helper_gvec_fmla_h_riscv64
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#define helper_gvec_fmla_s helper_gvec_fmla_s_riscv64
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#define helper_gvec_fmla_idx_d helper_gvec_fmla_idx_d_riscv64
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#define helper_gvec_fmla_idx_h helper_gvec_fmla_idx_h_riscv64
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#define helper_gvec_fmla_idx_s helper_gvec_fmla_idx_s_riscv64
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#define helper_gvec_fmlal_a64 helper_gvec_fmlal_a64_riscv64
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#define helper_gvec_fmlal_idx_a32 helper_gvec_fmlal_idx_a32_riscv64
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#define helper_gvec_fmlal_idx_a64 helper_gvec_fmlal_idx_a64_riscv64
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#define helper_gvec_fmls_h helper_gvec_fmls_h_riscv64
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#define helper_gvec_fmls_s helper_gvec_fmls_s_riscv64
|
||||
#define helper_gvec_fmul_d helper_gvec_fmul_d_riscv64
|
||||
#define helper_gvec_fmul_h helper_gvec_fmul_h_riscv64
|
||||
#define helper_gvec_fmul_s helper_gvec_fmul_s_riscv64
|
||||
|
|
|
|||
|
|
@ -1295,6 +1295,8 @@
|
|||
#define helper_gvec_fmin_s helper_gvec_fmin_s_sparc
|
||||
#define helper_gvec_fminnum_h helper_gvec_fminnum_h_sparc
|
||||
#define helper_gvec_fminnum_s helper_gvec_fminnum_s_sparc
|
||||
#define helper_gvec_fmla_h helper_gvec_fmla_h_sparc
|
||||
#define helper_gvec_fmla_s helper_gvec_fmla_s_sparc
|
||||
#define helper_gvec_fmla_idx_d helper_gvec_fmla_idx_d_sparc
|
||||
#define helper_gvec_fmla_idx_h helper_gvec_fmla_idx_h_sparc
|
||||
#define helper_gvec_fmla_idx_s helper_gvec_fmla_idx_s_sparc
|
||||
|
|
@ -1302,6 +1304,8 @@
|
|||
#define helper_gvec_fmlal_a64 helper_gvec_fmlal_a64_sparc
|
||||
#define helper_gvec_fmlal_idx_a32 helper_gvec_fmlal_idx_a32_sparc
|
||||
#define helper_gvec_fmlal_idx_a64 helper_gvec_fmlal_idx_a64_sparc
|
||||
#define helper_gvec_fmls_h helper_gvec_fmls_h_sparc
|
||||
#define helper_gvec_fmls_s helper_gvec_fmls_s_sparc
|
||||
#define helper_gvec_fmul_d helper_gvec_fmul_d_sparc
|
||||
#define helper_gvec_fmul_h helper_gvec_fmul_h_sparc
|
||||
#define helper_gvec_fmul_s helper_gvec_fmul_s_sparc
|
||||
|
|
|
|||
|
|
@ -1295,6 +1295,8 @@
|
|||
#define helper_gvec_fmin_s helper_gvec_fmin_s_sparc64
|
||||
#define helper_gvec_fminnum_h helper_gvec_fminnum_h_sparc64
|
||||
#define helper_gvec_fminnum_s helper_gvec_fminnum_s_sparc64
|
||||
#define helper_gvec_fmla_h helper_gvec_fmla_h_sparc64
|
||||
#define helper_gvec_fmla_s helper_gvec_fmla_s_sparc64
|
||||
#define helper_gvec_fmla_idx_d helper_gvec_fmla_idx_d_sparc64
|
||||
#define helper_gvec_fmla_idx_h helper_gvec_fmla_idx_h_sparc64
|
||||
#define helper_gvec_fmla_idx_s helper_gvec_fmla_idx_s_sparc64
|
||||
|
|
@ -1302,6 +1304,8 @@
|
|||
#define helper_gvec_fmlal_a64 helper_gvec_fmlal_a64_sparc64
|
||||
#define helper_gvec_fmlal_idx_a32 helper_gvec_fmlal_idx_a32_sparc64
|
||||
#define helper_gvec_fmlal_idx_a64 helper_gvec_fmlal_idx_a64_sparc64
|
||||
#define helper_gvec_fmls_h helper_gvec_fmls_h_sparc64
|
||||
#define helper_gvec_fmls_s helper_gvec_fmls_s_sparc64
|
||||
#define helper_gvec_fmul_d helper_gvec_fmul_d_sparc64
|
||||
#define helper_gvec_fmul_h helper_gvec_fmul_h_sparc64
|
||||
#define helper_gvec_fmul_s helper_gvec_fmul_s_sparc64
|
||||
|
|
|
|||
|
|
@ -657,6 +657,12 @@ DEF_HELPER_FLAGS_5(gvec_fmaxnum_s, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, ptr, i3
|
|||
DEF_HELPER_FLAGS_5(gvec_fminnum_h, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, ptr, i32)
|
||||
DEF_HELPER_FLAGS_5(gvec_fminnum_s, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, ptr, i32)
|
||||
|
||||
DEF_HELPER_FLAGS_5(gvec_fmla_h, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, ptr, i32)
|
||||
DEF_HELPER_FLAGS_5(gvec_fmla_s, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, ptr, i32)
|
||||
|
||||
DEF_HELPER_FLAGS_5(gvec_fmls_h, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, ptr, i32)
|
||||
DEF_HELPER_FLAGS_5(gvec_fmls_s, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, ptr, i32)
|
||||
|
||||
DEF_HELPER_FLAGS_5(gvec_ftsmul_h, TCG_CALL_NO_RWG,
|
||||
void, ptr, ptr, ptr, ptr, i32)
|
||||
DEF_HELPER_FLAGS_5(gvec_ftsmul_s, TCG_CALL_NO_RWG,
|
||||
|
|
|
|||
|
|
@ -1138,37 +1138,8 @@ DO_3S_FP_GVEC(VACGE, gen_helper_gvec_facge_s, gen_helper_gvec_facge_h)
|
|||
DO_3S_FP_GVEC(VACGT, gen_helper_gvec_facgt_s, gen_helper_gvec_facgt_h)
|
||||
DO_3S_FP_GVEC(VMAX, gen_helper_gvec_fmax_s, gen_helper_gvec_fmax_h)
|
||||
DO_3S_FP_GVEC(VMIN, gen_helper_gvec_fmin_s, gen_helper_gvec_fmin_h)
|
||||
|
||||
/*
|
||||
* For all the functions using this macro, size == 1 means fp16,
|
||||
* which is an architecture extension we don't implement yet.
|
||||
*/
|
||||
#define DO_3S_FP(INSN,FUNC,READS_VD) \
|
||||
static bool trans_##INSN##_fp_3s(DisasContext *s, arg_3same *a) \
|
||||
{ \
|
||||
if (a->size != 0) { \
|
||||
/* TODO fp16 support */ \
|
||||
return false; \
|
||||
} \
|
||||
return do_3same_fp(s, a, FUNC, READS_VD); \
|
||||
}
|
||||
|
||||
static void gen_VMLA_fp_3s(TCGContext *s, TCGv_i32 vd, TCGv_i32 vn, TCGv_i32 vm,
|
||||
TCGv_ptr fpstatus)
|
||||
{
|
||||
gen_helper_vfp_muls(s, vn, vn, vm, fpstatus);
|
||||
gen_helper_vfp_adds(s, vd, vd, vn, fpstatus);
|
||||
}
|
||||
|
||||
static void gen_VMLS_fp_3s(TCGContext *s, TCGv_i32 vd, TCGv_i32 vn, TCGv_i32 vm,
|
||||
TCGv_ptr fpstatus)
|
||||
{
|
||||
gen_helper_vfp_muls(s, vn, vn, vm, fpstatus);
|
||||
gen_helper_vfp_subs(s, vd, vd, vn, fpstatus);
|
||||
}
|
||||
|
||||
DO_3S_FP(VMLA, gen_VMLA_fp_3s, true)
|
||||
DO_3S_FP(VMLS, gen_VMLS_fp_3s, true)
|
||||
DO_3S_FP_GVEC(VMLA, gen_helper_gvec_fmla_s, gen_helper_gvec_fmla_h)
|
||||
DO_3S_FP_GVEC(VMLS, gen_helper_gvec_fmls_s, gen_helper_gvec_fmls_h)
|
||||
|
||||
WRAP_FP_GVEC(gen_VMAXNM_fp32_3s, FPST_STD, gen_helper_gvec_fmaxnum_s)
|
||||
WRAP_FP_GVEC(gen_VMAXNM_fp16_3s, FPST_STD_F16, gen_helper_gvec_fmaxnum_h)
|
||||
|
|
|
|||
|
|
@ -843,6 +843,48 @@ DO_3OP(gvec_rsqrts_d, helper_rsqrtsf_f64, float64)
|
|||
#endif
|
||||
#undef DO_3OP
|
||||
|
||||
/* Non-fused multiply-add (unlike float16_muladd etc, which are fused) */
|
||||
static float16 float16_muladd_nf(float16 dest, float16 op1, float16 op2,
|
||||
float_status *stat)
|
||||
{
|
||||
return float16_add(dest, float16_mul(op1, op2, stat), stat);
|
||||
}
|
||||
|
||||
static float32 float32_muladd_nf(float32 dest, float32 op1, float32 op2,
|
||||
float_status *stat)
|
||||
{
|
||||
return float32_add(dest, float32_mul(op1, op2, stat), stat);
|
||||
}
|
||||
|
||||
static float16 float16_mulsub_nf(float16 dest, float16 op1, float16 op2,
|
||||
float_status *stat)
|
||||
{
|
||||
return float16_sub(dest, float16_mul(op1, op2, stat), stat);
|
||||
}
|
||||
|
||||
static float32 float32_mulsub_nf(float32 dest, float32 op1, float32 op2,
|
||||
float_status *stat)
|
||||
{
|
||||
return float32_sub(dest, float32_mul(op1, op2, stat), stat);
|
||||
}
|
||||
|
||||
#define DO_MULADD(NAME, FUNC, TYPE) \
|
||||
void HELPER(NAME)(void *vd, void *vn, void *vm, void *stat, uint32_t desc) \
|
||||
{ \
|
||||
intptr_t i, oprsz = simd_oprsz(desc); \
|
||||
TYPE *d = vd, *n = vn, *m = vm; \
|
||||
for (i = 0; i < oprsz / sizeof(TYPE); i++) { \
|
||||
d[i] = FUNC(d[i], n[i], m[i], stat); \
|
||||
} \
|
||||
clear_tail(d, oprsz, simd_maxsz(desc)); \
|
||||
}
|
||||
|
||||
DO_MULADD(gvec_fmla_h, float16_muladd_nf, float16)
|
||||
DO_MULADD(gvec_fmla_s, float32_muladd_nf, float32)
|
||||
|
||||
DO_MULADD(gvec_fmls_h, float16_mulsub_nf, float16)
|
||||
DO_MULADD(gvec_fmls_s, float32_mulsub_nf, float32)
|
||||
|
||||
/* For the indexed ops, SVE applies the index per 128-bit vector segment.
|
||||
* For AdvSIMD, there is of course only one such vector segment.
|
||||
*/
|
||||
|
|
|
|||
|
|
@ -1295,6 +1295,8 @@
|
|||
#define helper_gvec_fmin_s helper_gvec_fmin_s_x86_64
|
||||
#define helper_gvec_fminnum_h helper_gvec_fminnum_h_x86_64
|
||||
#define helper_gvec_fminnum_s helper_gvec_fminnum_s_x86_64
|
||||
#define helper_gvec_fmla_h helper_gvec_fmla_h_x86_64
|
||||
#define helper_gvec_fmla_s helper_gvec_fmla_s_x86_64
|
||||
#define helper_gvec_fmla_idx_d helper_gvec_fmla_idx_d_x86_64
|
||||
#define helper_gvec_fmla_idx_h helper_gvec_fmla_idx_h_x86_64
|
||||
#define helper_gvec_fmla_idx_s helper_gvec_fmla_idx_s_x86_64
|
||||
|
|
@ -1302,6 +1304,8 @@
|
|||
#define helper_gvec_fmlal_a64 helper_gvec_fmlal_a64_x86_64
|
||||
#define helper_gvec_fmlal_idx_a32 helper_gvec_fmlal_idx_a32_x86_64
|
||||
#define helper_gvec_fmlal_idx_a64 helper_gvec_fmlal_idx_a64_x86_64
|
||||
#define helper_gvec_fmls_h helper_gvec_fmls_h_x86_64
|
||||
#define helper_gvec_fmls_s helper_gvec_fmls_s_x86_64
|
||||
#define helper_gvec_fmul_d helper_gvec_fmul_d_x86_64
|
||||
#define helper_gvec_fmul_h helper_gvec_fmul_h_x86_64
|
||||
#define helper_gvec_fmul_s helper_gvec_fmul_s_x86_64
|
||||
|
|
|
|||
Loading…
Reference in a new issue