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cpu_defs: Simplify CPUTLB padding logic
There was a complicated subtractive arithmetic for determining the padding on the CPUTLBEntry structure. Simplify this with a union. Backports commit b4a4b8d0e0767c85946fd8fc404643bf5766351a from qemu
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@ -105,36 +105,18 @@ typedef struct CPUTLBEntry {
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bit 3 : indicates that the entry is invalid
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bit 2..0 : zero
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*/
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target_ulong addr_read;
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target_ulong addr_write;
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target_ulong addr_code;
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/* Addend to virtual address to get host address. IO accesses
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use the corresponding iotlb value. */
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uintptr_t addend;
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/* padding to get a power of two size */
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#ifdef _MSC_VER
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# define TARGET_ULONG_SIZE (TARGET_LONG_BITS/8)
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# ifdef _WIN64
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# define UINTPTR_SIZE 8
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# else
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# define UINTPTR_SIZE 4
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# endif
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#define DUMMY_SIZE (1 << CPU_TLB_ENTRY_BITS) - \
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(TARGET_ULONG_SIZE * 3 + \
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((-TARGET_ULONG_SIZE * 3) & (UINTPTR_SIZE - 1)) + \
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UINTPTR_SIZE)
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#if DUMMY_SIZE > 0
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uint8_t dummy[DUMMY_SIZE];
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#endif
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#else // _MSC_VER
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uint8_t dummy[(1 << CPU_TLB_ENTRY_BITS) -
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(sizeof(target_ulong) * 3 +
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((-sizeof(target_ulong) * 3) & (sizeof(uintptr_t) - 1)) +
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sizeof(uintptr_t))];
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#endif // _MSC_VER
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union {
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struct {
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target_ulong addr_read;
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target_ulong addr_write;
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target_ulong addr_code;
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/* Addend to virtual address to get host address. IO accesses
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use the corresponding iotlb value. */
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uintptr_t addend;
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};
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/* padding to get a power of two size */
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uint8_t dummy[1 << CPU_TLB_ENTRY_BITS];
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};
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} CPUTLBEntry;
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QEMU_BUILD_BUG_ON(sizeof(CPUTLBEntry) != (1 << CPU_TLB_ENTRY_BITS));
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