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target/arm: Simplify and correct thumb instruction tracing

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This wasn't subtracting the size of the instruction off the PC like how
the ARM mode tracing was performing the tracing. This simplifies it and
makes the behavior identical.
This commit is contained in:
Lioncash 2019-04-18 05:56:37 -04:00
parent 5d6ddec7fb
commit 5b062dacf2
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GPG key ID: 4E3C3CC1031BA9C7
1 changed files with 9 additions and 19 deletions
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28
qemu/target/arm/translate.c
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@ -12606,25 +12606,6 @@ static void disas_thumb_insn(DisasContext *s, uint32_t insn)
TCGv_i32 tmp2;
TCGv_i32 addr;
// Unicorn: trace this instruction on request
if (HOOK_EXISTS_BOUNDED(s->uc, UC_HOOK_CODE, s->pc)) {
// determine instruction size (Thumb/Thumb2)
switch(insn & 0xf800) {
// Thumb2: 32-bit
case 0xe800:
case 0xf000:
case 0xf800:
gen_uc_tracecode(tcg_ctx, 4, UC_HOOK_CODE_IDX, s->uc, s->pc - 4);
break;
// Thumb: 16-bit
default:
gen_uc_tracecode(tcg_ctx, 2, UC_HOOK_CODE_IDX, s->uc, s->pc - 2);
break;
}
// the callback might want to stop emulation immediately
check_exit_request(tcg_ctx);
}
switch (insn >> 12) {
case 0: case 1:
@ -13755,6 +13736,7 @@ static void thumb_tr_translate_insn(DisasContextBase *dcbase, CPUState *cpu)
{
DisasContext *dc = container_of(dcbase, DisasContext, base);
CPUARMState *env = cpu->env_ptr;
TCGContext *tcg_ctx = dc->uc->tcg_ctx;
uint32_t insn;
bool is_16bit;
@ -13781,6 +13763,14 @@ static void thumb_tr_translate_insn(DisasContextBase *dcbase, CPUState *cpu)
}
}
// Unicorn: trace this instruction on request
const uint32_t insn_size = is_16bit ? 2 : 4;
if (HOOK_EXISTS_BOUNDED(dc->uc, UC_HOOK_CODE, dc->pc - insn_size)) {
gen_uc_tracecode(tcg_ctx, insn_size, UC_HOOK_CODE_IDX, dc->uc, dc->pc - insn_size);
// the callback might want to stop emulation immediately
check_exit_request(tcg_ctx);
}
if (is_16bit) {
disas_thumb_insn(dc, insn);
} else {