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target/arm: Make MPU_MAIR0, MPU_MAIR1 registers banked for v8M

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Make the MPU registers MPU_MAIR0 and MPU_MAIR1 banked if v8M security
extensions are enabled.

Backports commit 4125e6feb71c810ca38f0d8e66e748b472a9cc54 from qemu
This commit is contained in:
Peter Maydell 2018-03-04 21:02:50 -05:00 committed by Lioncash
parent 3e35eee327
commit 5b6e1e2150
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GPG key ID: 4E3C3CC1031BA9C7
2 changed files with 6 additions and 4 deletions
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6
qemu/target/arm/cpu.c
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@ -248,8 +248,10 @@ static void arm_cpu_reset(CPUState *s)
}
}
env->pmsav7.rnr = 0;
env->pmsav8.mair0 = 0;
env->pmsav8.mair1 = 0;
env->pmsav8.mair0[M_REG_NS] = 0;
env->pmsav8.mair0[M_REG_S] = 0;
env->pmsav8.mair1[M_REG_NS] = 0;
env->pmsav8.mair1[M_REG_S] = 0;
}
set_flush_to_zero(1, &env->vfp.standard_fp_status);

4
qemu/target/arm/cpu.h
View file

@ -550,8 +550,8 @@ typedef struct CPUARMState {
*/
uint32_t *rbar;
uint32_t *rlar;
uint32_t mair0;
uint32_t mair1;
uint32_t mair0[2];
uint32_t mair1[2];
} pmsav8;
void *nvic;