armv7m: Simpler and faster exception start

All the places in armv7m_cpu_do_interrupt() which pend an
exception in the NVIC are doing so for synchronous
exceptions. We know that we will always take some
exception in this case, so we can just acknowledge it
immediately, rather than returning and then immediately
being called again because the NVIC has raised its outbound
IRQ line.

Backports commit a25dc805e2e63a55029e787a52335e12dabf07dc from qemu
This commit is contained in:
Michael Davidsaver 2018-03-02 19:51:55 -05:00 committed by Lioncash
parent 43ba76cb28
commit 5b9f53bd27
No known key found for this signature in database
GPG key ID: 4E3C3CC1031BA9C7

View file

@ -5457,15 +5457,15 @@ void arm_v7m_cpu_do_interrupt(CPUState *cs)
case EXCP_UDEF:
//armv7m_nvic_set_pending(env->nvic, ARMV7M_EXCP_USAGE);
env->v7m.cfsr |= R_V7M_CFSR_UNDEFINSTR_MASK;
return;
break;
case EXCP_NOCP:
//armv7m_nvic_set_pending(env->nvic, ARMV7M_EXCP_USAGE);
env->v7m.cfsr |= R_V7M_CFSR_NOCP_MASK;
return;
break;
case EXCP_SWI:
/* The PC already points to the next instruction. */
//armv7m_nvic_set_pending(env->nvic, ARMV7M_EXCP_SVC);
return;
break;
case EXCP_PREFETCH_ABORT:
case EXCP_DATA_ABORT:
/* Note that for M profile we don't have a guest facing FSR, but
@ -5513,7 +5513,7 @@ void arm_v7m_cpu_do_interrupt(CPUState *cs)
//armv7m_nvic_set_pending(env->nvic, ARMV7M_EXCP_MEM);
break;
}
return;
break;
case EXCP_BKPT:
#if 0
if (semihosting_enabled) {
@ -5530,9 +5530,8 @@ void arm_v7m_cpu_do_interrupt(CPUState *cs)
}
#endif
//armv7m_nvic_set_pending(env->nvic, ARMV7M_EXCP_DEBUG);
return;
break;
case EXCP_IRQ:
//env->v7m.exception = armv7m_nvic_acknowledge_irq(env->nvic);
break;
case EXCP_EXCEPTION_EXIT:
do_v7m_exception_exit(env);
@ -5542,6 +5541,11 @@ void arm_v7m_cpu_do_interrupt(CPUState *cs)
return; /* Never happens. Keep compiler happy. */
}
// Unicorn: commented out
//armv7m_nvic_acknowledge_irq(env->nvic);
qemu_log_mask(CPU_LOG_INT, "... as %d\n", env->v7m.exception);
/* Align stack pointer if the guest wants that */
if ((env->regs[13] & 4) && (env->v7m.ccr & R_V7M_CCR_STKALIGN_MASK)) {
env->regs[13] -= 4;