tcg: Add atomic helpers

Add all of cmpxchg, op_fetch, fetch_op, and xchg.
Handle both endian-ness, and sizes up to 8.
Handle expanding non-atomically, when emulating in serial.

Backports commit c482cb117cc418115ca9c6d21a7a2315414c0a40 from qemu

qemu/Makefile.objs

@@ -28,6 +28,5 @@ endif
 
 #######################################################################
 # Target-independent parts used in system and user emulation
-common-obj-y += tcg-runtime.o
 common-obj-y += hw/
 common-obj-y += qom/

qemu/Makefile.target

@@ -47,6 +47,7 @@ obj-y += tcg/tcg.o tcg/tcg-op.o tcg/optimize.o
 obj-y += tcg/tcg-common.o
 obj-y += fpu/softfloat.o
 obj-y += target-$(TARGET_BASE_ARCH)/
+obj-y += tcg-runtime.o
 
 #########################################################
 # System emulator target

qemu/aarch64.h

@@ -1372,6 +1372,149 @@
 #define helper_add_saturate helper_add_saturate_aarch64
 #define helper_add_setq helper_add_setq_aarch64
 #define helper_add_usaturate helper_add_usaturate_aarch64
+#define helper_atomic_add_fetchb helper_atomic_add_fetchb_aarch64
+#define helper_atomic_add_fetchb_mmu helper_atomic_add_fetchb_mmu_aarch64
+#define helper_atomic_add_fetchl_be helper_atomic_add_fetchl_be_aarch64
+#define helper_atomic_add_fetchl_be_mmu helper_atomic_add_fetchl_be_mmu_aarch64
+#define helper_atomic_add_fetchl_le helper_atomic_add_fetchl_le_aarch64
+#define helper_atomic_add_fetchl_le_mmu helper_atomic_add_fetchl_le_mmu_aarch64
+#define helper_atomic_add_fetchq_be helper_atomic_add_fetchq_be_aarch64
+#define helper_atomic_add_fetchq_be_mmu helper_atomic_add_fetchq_be_mmu_aarch64
+#define helper_atomic_add_fetchq_le helper_atomic_add_fetchq_le_aarch64
+#define helper_atomic_add_fetchq_le_mmu helper_atomic_add_fetchq_le_mmu_aarch64
+#define helper_atomic_add_fetchw_be helper_atomic_add_fetchw_be_aarch64
+#define helper_atomic_add_fetchw_be_mmu helper_atomic_add_fetchw_be_mmu_aarch64
+#define helper_atomic_add_fetchw_le helper_atomic_add_fetchw_le_aarch64
+#define helper_atomic_add_fetchw_le_mmu helper_atomic_add_fetchw_le_mmu_aarch64
+#define helper_atomic_and_fetchb helper_atomic_and_fetchb_aarch64
+#define helper_atomic_and_fetchb_le_mmu helper_atomic_and_fetchb_le_mmu_aarch64
+#define helper_atomic_and_fetchb_mmu helper_atomic_and_fetchb_mmu_aarch64
+#define helper_atomic_and_fetchl_be helper_atomic_and_fetchl_be_aarch64
+#define helper_atomic_and_fetchl_be_mmu helper_atomic_and_fetchl_be_mmu_aarch64
+#define helper_atomic_and_fetchl_le helper_atomic_and_fetchl_le_aarch64
+#define helper_atomic_and_fetchl_le_mmu helper_atomic_and_fetchl_le_mmu_aarch64
+#define helper_atomic_and_fetchq_be helper_atomic_and_fetchq_be_aarch64
+#define helper_atomic_and_fetchq_be_mmu helper_atomic_and_fetchq_be_mmu_aarch64
+#define helper_atomic_and_fetchq_le helper_atomic_and_fetchq_le_aarch64
+#define helper_atomic_and_fetchq_le_mmu helper_atomic_and_fetchq_le_mmu_aarch64
+#define helper_atomic_and_fetchw_be helper_atomic_and_fetchw_be_aarch64
+#define helper_atomic_and_fetchw_be_mmu helper_atomic_and_fetchw_be_mmu_aarch64
+#define helper_atomic_and_fetchw_le helper_atomic_and_fetchw_le_aarch64
+#define helper_atomic_and_fetchw_le_mmu helper_atomic_and_fetchw_le_mmu_aarch64
+#define helper_atomic_cmpxchgb helper_atomic_cmpxchgb_aarch64
+#define helper_atomic_cmpxchgb helper_atomic_cmpxchgb_aarch64
+#define helper_atomic_cmpxchgb_mmu helper_atomic_cmpxchgb_mmu_aarch64
+#define helper_atomic_cmpxchgl_be helper_atomic_cmpxchgl_be_aarch64
+#define helper_atomic_cmpxchgl_be_mmu helper_atomic_cmpxchgl_be_mmu_aarch64
+#define helper_atomic_cmpxchgl_le helper_atomic_cmpxchgl_le_aarch64
+#define helper_atomic_cmpxchgl_le_mmu helper_atomic_cmpxchgl_le_mmu_aarch64
+#define helper_atomic_cmpxchgq_be helper_atomic_cmpxchgq_be_aarch64
+#define helper_atomic_cmpxchgq_be_mmu helper_atomic_cmpxchgq_be_mmu_aarch64
+#define helper_atomic_cmpxchgq_le helper_atomic_cmpxchgq_le_aarch64
+#define helper_atomic_cmpxchgq_le_mmu helper_atomic_cmpxchgq_le_mmu_aarch64
+#define helper_atomic_cmpxchgw_be helper_atomic_cmpxchgw_be_aarch64
+#define helper_atomic_cmpxchgw_be_mmu helper_atomic_cmpxchgw_be_mmu_aarch64
+#define helper_atomic_cmpxchgw_le helper_atomic_cmpxchgw_le_aarch64
+#define helper_atomic_cmpxchgw_le_mmu helper_atomic_cmpxchgw_le_mmu_aarch64
+#define helper_atomic_fetch_addb helper_atomic_fetch_addb_aarch64
+#define helper_atomic_fetch_addb_mmu helper_atomic_fetch_addb_mmu_aarch64
+#define helper_atomic_fetch_addl_be helper_atomic_fetch_addl_be_aarch64
+#define helper_atomic_fetch_addl_be_mmu helper_atomic_fetch_addl_be_mmu_aarch64
+#define helper_atomic_fetch_addl_le helper_atomic_fetch_addl_le_aarch64
+#define helper_atomic_fetch_addl_le_mmu helper_atomic_fetch_addl_le_mmu_aarch64
+#define helper_atomic_fetch_addq_be helper_atomic_fetch_addq_be_aarch64
+#define helper_atomic_fetch_addq_be_mmu helper_atomic_fetch_addq_be_mmu_aarch64
+#define helper_atomic_fetch_addq_le helper_atomic_fetch_addq_le_aarch64
+#define helper_atomic_fetch_addq_le_mmu helper_atomic_fetch_addq_le_mmu_aarch64
+#define helper_atomic_fetch_addw_be helper_atomic_fetch_addw_be_aarch64
+#define helper_atomic_fetch_addw_be_mmu helper_atomic_fetch_addw_be_mmu_aarch64
+#define helper_atomic_fetch_addw_le helper_atomic_fetch_addw_le_aarch64
+#define helper_atomic_fetch_addw_le_mmu helper_atomic_fetch_addw_le_mmu_aarch64
+#define helper_atomic_fetch_andb helper_atomic_fetch_andb_aarch64
+#define helper_atomic_fetch_andb_mmu helper_atomic_fetch_andb_mmu_aarch64
+#define helper_atomic_fetch_andl_be helper_atomic_fetch_andl_be_aarch64
+#define helper_atomic_fetch_andl_be_mmu helper_atomic_fetch_andl_be_mmu_aarch64
+#define helper_atomic_fetch_andl_le helper_atomic_fetch_andl_le_aarch64
+#define helper_atomic_fetch_andl_le_mmu helper_atomic_fetch_andl_le_mmu_aarch64
+#define helper_atomic_fetch_andq_be helper_atomic_fetch_andq_be_aarch64
+#define helper_atomic_fetch_andq_be_mmu helper_atomic_fetch_andq_be_mmu_aarch64
+#define helper_atomic_fetch_andq_le helper_atomic_fetch_andq_le_aarch64
+#define helper_atomic_fetch_andq_le_mmu helper_atomic_fetch_andq_le_mmu_aarch64
+#define helper_atomic_fetch_andw_be helper_atomic_fetch_andw_be_aarch64
+#define helper_atomic_fetch_andw_be_mmu helper_atomic_fetch_andw_be_mmu_aarch64
+#define helper_atomic_fetch_andw_le helper_atomic_fetch_andw_le_aarch64
+#define helper_atomic_fetch_andw_le_mmu helper_atomic_fetch_andw_le_mmu_aarch64
+#define helper_atomic_fetch_orb helper_atomic_fetch_orb_aarch64
+#define helper_atomic_fetch_orb_mmu helper_atomic_fetch_orb_mmu_aarch64
+#define helper_atomic_fetch_orl_be helper_atomic_fetch_orl_be_aarch64
+#define helper_atomic_fetch_orl_be_mmu helper_atomic_fetch_orl_be_mmu_aarch64
+#define helper_atomic_fetch_orl_le helper_atomic_fetch_orl_le_aarch64
+#define helper_atomic_fetch_orl_le_mmu helper_atomic_fetch_orl_le_mmu_aarch64
+#define helper_atomic_fetch_orq_be helper_atomic_fetch_orq_be_aarch64
+#define helper_atomic_fetch_orq_be_mmu helper_atomic_fetch_orq_be_mmu_aarch64
+#define helper_atomic_fetch_orq_le helper_atomic_fetch_orq_le_aarch64
+#define helper_atomic_fetch_orq_le_mmu helper_atomic_fetch_orq_le_mmu_aarch64
+#define helper_atomic_fetch_orw_be helper_atomic_fetch_orw_be_aarch64
+#define helper_atomic_fetch_orw_be_mmu helper_atomic_fetch_orw_be_mmu_aarch64
+#define helper_atomic_fetch_orw_le helper_atomic_fetch_orw_le_aarch64
+#define helper_atomic_fetch_orw_le_mmu helper_atomic_fetch_orw_le_mmu_aarch64
+#define helper_atomic_fetch_xorb helper_atomic_fetch_xorb_aarch64
+#define helper_atomic_fetch_xorb_mmu helper_atomic_fetch_xorb_mmu_aarch64
+#define helper_atomic_fetch_xorl_be helper_atomic_fetch_xorl_be_aarch64
+#define helper_atomic_fetch_xorl_be_mmu helper_atomic_fetch_xorl_be_mmu_aarch64
+#define helper_atomic_fetch_xorl_le helper_atomic_fetch_xorl_le_aarch64
+#define helper_atomic_fetch_xorl_le_mmu helper_atomic_fetch_xorl_le_mmu_aarch64
+#define helper_atomic_fetch_xorq_be helper_atomic_fetch_xorq_be_aarch64
+#define helper_atomic_fetch_xorq_be_mmu helper_atomic_fetch_xorq_be_mmu_aarch64
+#define helper_atomic_fetch_xorq_le helper_atomic_fetch_xorq_le_aarch64
+#define helper_atomic_fetch_xorq_le_mmu helper_atomic_fetch_xorq_le_mmu_aarch64
+#define helper_atomic_fetch_xorw_be helper_atomic_fetch_xorw_be_aarch64
+#define helper_atomic_fetch_xorw_be_mmu helper_atomic_fetch_xorw_be_mmu_aarch64
+#define helper_atomic_fetch_xorw_le helper_atomic_fetch_xorw_le_aarch64
+#define helper_atomic_fetch_xorw_le_mmu helper_atomic_fetch_xorw_le_mmu_aarch64
+#define helper_atomic_or_fetchb helper_atomic_or_fetchb_aarch64
+#define helper_atomic_or_fetchb_mmu helper_atomic_or_fetchb_mmu_aarch64
+#define helper_atomic_or_fetchl_be helper_atomic_or_fetchl_be_aarch64
+#define helper_atomic_or_fetchl_be_mmu helper_atomic_or_fetchl_be_mmu_aarch64
+#define helper_atomic_or_fetchl_le helper_atomic_or_fetchl_le_aarch64
+#define helper_atomic_or_fetchl_le_mmu helper_atomic_or_fetchl_le_mmu_aarch64
+#define helper_atomic_or_fetchq_be helper_atomic_or_fetchq_be_aarch64
+#define helper_atomic_or_fetchq_be_mmu helper_atomic_or_fetchq_be_mmu_aarch64
+#define helper_atomic_or_fetchq_le helper_atomic_or_fetchq_le_aarch64
+#define helper_atomic_or_fetchq_le_mmu helper_atomic_or_fetchq_le_mmu_aarch64
+#define helper_atomic_or_fetchw_be helper_atomic_or_fetchw_be_aarch64
+#define helper_atomic_or_fetchw_be_mmu helper_atomic_or_fetchw_be_mmu_aarch64
+#define helper_atomic_or_fetchw_le helper_atomic_or_fetchw_le_aarch64
+#define helper_atomic_or_fetchw_le_mmu helper_atomic_or_fetchw_le_mmu_aarch64
+#define helper_atomic_xchgb helper_atomic_xchgb_aarch64
+#define helper_atomic_xchgb helper_atomic_xchgb_aarch64
+#define helper_atomic_xchgb_mmu helper_atomic_xchgb_mmu_aarch64
+#define helper_atomic_xchgl_be helper_atomic_xchgl_be_aarch64
+#define helper_atomic_xchgl_be_mmu helper_atomic_xchgl_be_mmu_aarch64
+#define helper_atomic_xchgl_le helper_atomic_xchgl_le_aarch64
+#define helper_atomic_xchgl_le_mmu helper_atomic_xchgl_le_mmu_aarch64
+#define helper_atomic_xchgq_be helper_atomic_xchgq_be_aarch64
+#define helper_atomic_xchgq_be_mmu helper_atomic_xchgq_be_mmu_aarch64
+#define helper_atomic_xchgq_le helper_atomic_xchgq_le_aarch64
+#define helper_atomic_xchgq_le_mmu helper_atomic_xchgq_le_mmu_aarch64
+#define helper_atomic_xchgw_be helper_atomic_xchgw_be_aarch64
+#define helper_atomic_xchgw_be_mmu helper_atomic_xchgw_be_mmu_aarch64
+#define helper_atomic_xchgw_le helper_atomic_xchgw_le_aarch64
+#define helper_atomic_xchgw_le_mmu helper_atomic_xchgw_le_mmu_aarch64
+#define helper_atomic_xor_fetchb helper_atomic_xor_fetchb_aarch64
+#define helper_atomic_xor_fetchb_mmu helper_atomic_xor_fetchb_mmu_aarch64
+#define helper_atomic_xor_fetchl_be helper_atomic_xor_fetchl_be_aarch64
+#define helper_atomic_xor_fetchl_be_mmu helper_atomic_xor_fetchl_be_mmu_aarch64
+#define helper_atomic_xor_fetchl_le helper_atomic_xor_fetchl_le_aarch64
+#define helper_atomic_xor_fetchl_le_mmu helper_atomic_xor_fetchl_le_mmu_aarch64
+#define helper_atomic_xor_fetchq_be helper_atomic_xor_fetchq_be_aarch64
+#define helper_atomic_xor_fetchq_be_mmu helper_atomic_xor_fetchq_be_mmu_aarch64
+#define helper_atomic_xor_fetchq_le helper_atomic_xor_fetchq_le_aarch64
+#define helper_atomic_xor_fetchq_le_mmu helper_atomic_xor_fetchq_le_mmu_aarch64
+#define helper_atomic_xor_fetchw_be helper_atomic_xor_fetchw_be_aarch64
+#define helper_atomic_xor_fetchw_be_mmu helper_atomic_xor_fetchw_be_mmu_aarch64
+#define helper_atomic_xor_fetchw_le helper_atomic_xor_fetchw_le_aarch64
+#define helper_atomic_xor_fetchw_le_mmu helper_atomic_xor_fetchw_le_mmu_aarch64
 #define helper_be_ldl_cmmu helper_be_ldl_cmmu_aarch64
 #define helper_be_ldq_cmmu helper_be_ldq_cmmu_aarch64
 #define helper_be_ldq_mmu helper_be_ldq_mmu_aarch64
@@ -1400,6 +1543,10 @@
 #define helper_crypto_sha256su0 helper_crypto_sha256su0_aarch64
 #define helper_crypto_sha256su1 helper_crypto_sha256su1_aarch64
 #define helper_dc_zva helper_dc_zva_aarch64
+#define helper_div_i32 helper_div_i32_aarch64
+#define helper_div_i64 helper_div_i64_aarch64
+#define helper_divu_i32 helper_divu_i32_aarch64
+#define helper_divu_i64 helper_divu_i64_aarch64
 #define helper_double_saturate helper_double_saturate_aarch64
 #define helper_exception_internal helper_exception_internal_aarch64
 #define helper_exception_return helper_exception_return_aarch64
@@ -1532,6 +1679,10 @@
 #define helper_le_stl_mmu helper_le_stl_mmu_aarch64
 #define helper_le_stq_mmu helper_le_stq_mmu_aarch64
 #define helper_le_stw_mmu helper_le_stw_mmu_aarch64
+#define helper_mulsh_i32 helper_mulsh_i32_aarch64
+#define helper_mulsh_i64 helper_mulsh_i64_aarch64
+#define helper_muluh_i32 helper_muluh_i32_aarch64
+#define helper_muluh_i64 helper_muluh_i64_aarch64
 #define helper_mrs_banked helper_mrs_banked_aarch64
 #define helper_msa_ld_b helper_msa_ld_b_aarch64
 #define helper_msa_ld_d helper_msa_ld_d_aarch64
@@ -1773,6 +1924,10 @@
 #define helper_recpe_f64 helper_recpe_f64_aarch64
 #define helper_recpe_u32 helper_recpe_u32_aarch64
 #define helper_recps_f32 helper_recps_f32_aarch64
+#define helper_rem_i32 helper_rem_i32_aarch64
+#define helper_rem_i64 helper_rem_i64_aarch64
+#define helper_remu_i32 helper_remu_i32_aarch64
+#define helper_remu_i64 helper_remu_i64_aarch64
 #define helper_ret_ldb_cmmu helper_ret_ldb_cmmu_aarch64
 #define helper_ret_ldsb_mmu helper_ret_ldsb_mmu_aarch64
 #define helper_ret_ldub_mmu helper_ret_ldub_mmu_aarch64
@@ -1790,6 +1945,8 @@
 #define helper_sadd8 helper_sadd8_aarch64
 #define helper_saddsubx helper_saddsubx_aarch64
 #define helper_sar_cc helper_sar_cc_aarch64
+#define helper_sar_i32 helper_sar_i32_aarch64
+#define helper_sar_i64 helper_sar_i64_aarch64
 #define helper_sdiv helper_sdiv_aarch64
 #define helper_sel_flags helper_sel_flags_aarch64
 #define helper_set_cp_reg helper_set_cp_reg_aarch64
@@ -1803,7 +1960,10 @@
 #define helper_shadd8 helper_shadd8_aarch64
 #define helper_shaddsubx helper_shaddsubx_aarch64
 #define helper_shl_cc helper_shl_cc_aarch64
+#define helper_shl_i64 helper_shl_i64_aarch64
 #define helper_shr_cc helper_shr_cc_aarch64
+#define helper_shr_i32 helper_shr_i32_aarch64
+#define helper_shr_i64 helper_shr_i64_aarch64
 #define helper_shsub16 helper_shsub16_aarch64
 #define helper_shsub8 helper_shsub8_aarch64
 #define helper_shsubaddx helper_shsubaddx_aarch64
@@ -2756,6 +2916,26 @@
 #define tcg_gen_andc_i64 tcg_gen_andc_i64_aarch64
 #define tcg_gen_andi_i32 tcg_gen_andi_i32_aarch64
 #define tcg_gen_andi_i64 tcg_gen_andi_i64_aarch64
+#define tcg_gen_atomic_add_fetch_i32 tcg_gen_atomic_add_fetch_i32_aarch64
+#define tcg_gen_atomic_add_fetch_i64 tcg_gen_atomic_add_fetch_i64_aarch64
+#define tcg_gen_atomic_and_fetch_i32 tcg_gen_atomic_and_fetch_i32_aarch64
+#define tcg_gen_atomic_and_fetch_i64 tcg_gen_atomic_and_fetch_i64_aarch64
+#define tcg_gen_atomic_cmpxchg_i32 tcg_gen_atomic_cmpxchg_i32_aarch64
+#define tcg_gen_atomic_cmpxchg_i64 tcg_gen_atomic_cmpxchg_i64_aarch64
+#define tcg_gen_atomic_fetch_add_i32 tcg_gen_atomic_fetch_add_i32_aarch64
+#define tcg_gen_atomic_fetch_add_i64 tcg_gen_atomic_fetch_add_i64_aarch64
+#define tcg_gen_atomic_fetch_and_i32 tcg_gen_atomic_fetch_and_i32_aarch64
+#define tcg_gen_atomic_fetch_and_i64 tcg_gen_atomic_fetch_and_i64_aarch64
+#define tcg_gen_atomic_fetch_or_i32 tcg_gen_atomic_fetch_or_i32_aarch64
+#define tcg_gen_atomic_fetch_or_i64 tcg_gen_atomic_fetch_or_i64_aarch64
+#define tcg_gen_atomic_fetch_xor_i32 tcg_gen_atomic_fetch_xor_i32_aarch64
+#define tcg_gen_atomic_fetch_xor_i64 tcg_gen_atomic_fetch_xor_i64_aarch64
+#define tcg_gen_atomic_or_fetch_i32 tcg_gen_atomic_or_fetch_i32_aarch64
+#define tcg_gen_atomic_or_fetch_i64 tcg_gen_atomic_or_fetch_i64_aarch64
+#define tcg_gen_atomic_xchg_i32 tcg_gen_atomic_xchg_i32_aarch64
+#define tcg_gen_atomic_xchg_i64 tcg_gen_atomic_xchg_i64_aarch64
+#define tcg_gen_atomic_xor_fetch_i32 tcg_gen_atomic_xor_fetch_i32_aarch64
+#define tcg_gen_atomic_xor_fetch_i64 tcg_gen_atomic_xor_fetch_i64_aarch64
 #define tcg_gen_br tcg_gen_br_aarch64
 #define tcg_gen_brcond_i32 tcg_gen_brcond_i32_aarch64
 #define tcg_gen_brcond_i64 tcg_gen_brcond_i64_aarch64

qemu/aarch64eb.h

@@ -1372,6 +1372,149 @@
 #define helper_add_saturate helper_add_saturate_aarch64eb
 #define helper_add_setq helper_add_setq_aarch64eb
 #define helper_add_usaturate helper_add_usaturate_aarch64eb
+#define helper_atomic_add_fetchb helper_atomic_add_fetchb_aarch64eb
+#define helper_atomic_add_fetchb_mmu helper_atomic_add_fetchb_mmu_aarch64eb
+#define helper_atomic_add_fetchl_be helper_atomic_add_fetchl_be_aarch64eb
+#define helper_atomic_add_fetchl_be_mmu helper_atomic_add_fetchl_be_mmu_aarch64eb
+#define helper_atomic_add_fetchl_le helper_atomic_add_fetchl_le_aarch64eb
+#define helper_atomic_add_fetchl_le_mmu helper_atomic_add_fetchl_le_mmu_aarch64eb
+#define helper_atomic_add_fetchq_be helper_atomic_add_fetchq_be_aarch64eb
+#define helper_atomic_add_fetchq_be_mmu helper_atomic_add_fetchq_be_mmu_aarch64eb
+#define helper_atomic_add_fetchq_le helper_atomic_add_fetchq_le_aarch64eb
+#define helper_atomic_add_fetchq_le_mmu helper_atomic_add_fetchq_le_mmu_aarch64eb
+#define helper_atomic_add_fetchw_be helper_atomic_add_fetchw_be_aarch64eb
+#define helper_atomic_add_fetchw_be_mmu helper_atomic_add_fetchw_be_mmu_aarch64eb
+#define helper_atomic_add_fetchw_le helper_atomic_add_fetchw_le_aarch64eb
+#define helper_atomic_add_fetchw_le_mmu helper_atomic_add_fetchw_le_mmu_aarch64eb
+#define helper_atomic_and_fetchb helper_atomic_and_fetchb_aarch64eb
+#define helper_atomic_and_fetchb_le_mmu helper_atomic_and_fetchb_le_mmu_aarch64eb
+#define helper_atomic_and_fetchb_mmu helper_atomic_and_fetchb_mmu_aarch64eb
+#define helper_atomic_and_fetchl_be helper_atomic_and_fetchl_be_aarch64eb
+#define helper_atomic_and_fetchl_be_mmu helper_atomic_and_fetchl_be_mmu_aarch64eb
+#define helper_atomic_and_fetchl_le helper_atomic_and_fetchl_le_aarch64eb
+#define helper_atomic_and_fetchl_le_mmu helper_atomic_and_fetchl_le_mmu_aarch64eb
+#define helper_atomic_and_fetchq_be helper_atomic_and_fetchq_be_aarch64eb
+#define helper_atomic_and_fetchq_be_mmu helper_atomic_and_fetchq_be_mmu_aarch64eb
+#define helper_atomic_and_fetchq_le helper_atomic_and_fetchq_le_aarch64eb
+#define helper_atomic_and_fetchq_le_mmu helper_atomic_and_fetchq_le_mmu_aarch64eb
+#define helper_atomic_and_fetchw_be helper_atomic_and_fetchw_be_aarch64eb
+#define helper_atomic_and_fetchw_be_mmu helper_atomic_and_fetchw_be_mmu_aarch64eb
+#define helper_atomic_and_fetchw_le helper_atomic_and_fetchw_le_aarch64eb
+#define helper_atomic_and_fetchw_le_mmu helper_atomic_and_fetchw_le_mmu_aarch64eb
+#define helper_atomic_cmpxchgb helper_atomic_cmpxchgb_aarch64eb
+#define helper_atomic_cmpxchgb helper_atomic_cmpxchgb_aarch64eb
+#define helper_atomic_cmpxchgb_mmu helper_atomic_cmpxchgb_mmu_aarch64eb
+#define helper_atomic_cmpxchgl_be helper_atomic_cmpxchgl_be_aarch64eb
+#define helper_atomic_cmpxchgl_be_mmu helper_atomic_cmpxchgl_be_mmu_aarch64eb
+#define helper_atomic_cmpxchgl_le helper_atomic_cmpxchgl_le_aarch64eb
+#define helper_atomic_cmpxchgl_le_mmu helper_atomic_cmpxchgl_le_mmu_aarch64eb
+#define helper_atomic_cmpxchgq_be helper_atomic_cmpxchgq_be_aarch64eb
+#define helper_atomic_cmpxchgq_be_mmu helper_atomic_cmpxchgq_be_mmu_aarch64eb
+#define helper_atomic_cmpxchgq_le helper_atomic_cmpxchgq_le_aarch64eb
+#define helper_atomic_cmpxchgq_le_mmu helper_atomic_cmpxchgq_le_mmu_aarch64eb
+#define helper_atomic_cmpxchgw_be helper_atomic_cmpxchgw_be_aarch64eb
+#define helper_atomic_cmpxchgw_be_mmu helper_atomic_cmpxchgw_be_mmu_aarch64eb
+#define helper_atomic_cmpxchgw_le helper_atomic_cmpxchgw_le_aarch64eb
+#define helper_atomic_cmpxchgw_le_mmu helper_atomic_cmpxchgw_le_mmu_aarch64eb
+#define helper_atomic_fetch_addb helper_atomic_fetch_addb_aarch64eb
+#define helper_atomic_fetch_addb_mmu helper_atomic_fetch_addb_mmu_aarch64eb
+#define helper_atomic_fetch_addl_be helper_atomic_fetch_addl_be_aarch64eb
+#define helper_atomic_fetch_addl_be_mmu helper_atomic_fetch_addl_be_mmu_aarch64eb
+#define helper_atomic_fetch_addl_le helper_atomic_fetch_addl_le_aarch64eb
+#define helper_atomic_fetch_addl_le_mmu helper_atomic_fetch_addl_le_mmu_aarch64eb
+#define helper_atomic_fetch_addq_be helper_atomic_fetch_addq_be_aarch64eb
+#define helper_atomic_fetch_addq_be_mmu helper_atomic_fetch_addq_be_mmu_aarch64eb
+#define helper_atomic_fetch_addq_le helper_atomic_fetch_addq_le_aarch64eb
+#define helper_atomic_fetch_addq_le_mmu helper_atomic_fetch_addq_le_mmu_aarch64eb
+#define helper_atomic_fetch_addw_be helper_atomic_fetch_addw_be_aarch64eb
+#define helper_atomic_fetch_addw_be_mmu helper_atomic_fetch_addw_be_mmu_aarch64eb
+#define helper_atomic_fetch_addw_le helper_atomic_fetch_addw_le_aarch64eb
+#define helper_atomic_fetch_addw_le_mmu helper_atomic_fetch_addw_le_mmu_aarch64eb
+#define helper_atomic_fetch_andb helper_atomic_fetch_andb_aarch64eb
+#define helper_atomic_fetch_andb_mmu helper_atomic_fetch_andb_mmu_aarch64eb
+#define helper_atomic_fetch_andl_be helper_atomic_fetch_andl_be_aarch64eb
+#define helper_atomic_fetch_andl_be_mmu helper_atomic_fetch_andl_be_mmu_aarch64eb
+#define helper_atomic_fetch_andl_le helper_atomic_fetch_andl_le_aarch64eb
+#define helper_atomic_fetch_andl_le_mmu helper_atomic_fetch_andl_le_mmu_aarch64eb
+#define helper_atomic_fetch_andq_be helper_atomic_fetch_andq_be_aarch64eb
+#define helper_atomic_fetch_andq_be_mmu helper_atomic_fetch_andq_be_mmu_aarch64eb
+#define helper_atomic_fetch_andq_le helper_atomic_fetch_andq_le_aarch64eb
+#define helper_atomic_fetch_andq_le_mmu helper_atomic_fetch_andq_le_mmu_aarch64eb
+#define helper_atomic_fetch_andw_be helper_atomic_fetch_andw_be_aarch64eb
+#define helper_atomic_fetch_andw_be_mmu helper_atomic_fetch_andw_be_mmu_aarch64eb
+#define helper_atomic_fetch_andw_le helper_atomic_fetch_andw_le_aarch64eb
+#define helper_atomic_fetch_andw_le_mmu helper_atomic_fetch_andw_le_mmu_aarch64eb
+#define helper_atomic_fetch_orb helper_atomic_fetch_orb_aarch64eb
+#define helper_atomic_fetch_orb_mmu helper_atomic_fetch_orb_mmu_aarch64eb
+#define helper_atomic_fetch_orl_be helper_atomic_fetch_orl_be_aarch64eb
+#define helper_atomic_fetch_orl_be_mmu helper_atomic_fetch_orl_be_mmu_aarch64eb
+#define helper_atomic_fetch_orl_le helper_atomic_fetch_orl_le_aarch64eb
+#define helper_atomic_fetch_orl_le_mmu helper_atomic_fetch_orl_le_mmu_aarch64eb
+#define helper_atomic_fetch_orq_be helper_atomic_fetch_orq_be_aarch64eb
+#define helper_atomic_fetch_orq_be_mmu helper_atomic_fetch_orq_be_mmu_aarch64eb
+#define helper_atomic_fetch_orq_le helper_atomic_fetch_orq_le_aarch64eb
+#define helper_atomic_fetch_orq_le_mmu helper_atomic_fetch_orq_le_mmu_aarch64eb
+#define helper_atomic_fetch_orw_be helper_atomic_fetch_orw_be_aarch64eb
+#define helper_atomic_fetch_orw_be_mmu helper_atomic_fetch_orw_be_mmu_aarch64eb
+#define helper_atomic_fetch_orw_le helper_atomic_fetch_orw_le_aarch64eb
+#define helper_atomic_fetch_orw_le_mmu helper_atomic_fetch_orw_le_mmu_aarch64eb
+#define helper_atomic_fetch_xorb helper_atomic_fetch_xorb_aarch64eb
+#define helper_atomic_fetch_xorb_mmu helper_atomic_fetch_xorb_mmu_aarch64eb
+#define helper_atomic_fetch_xorl_be helper_atomic_fetch_xorl_be_aarch64eb
+#define helper_atomic_fetch_xorl_be_mmu helper_atomic_fetch_xorl_be_mmu_aarch64eb
+#define helper_atomic_fetch_xorl_le helper_atomic_fetch_xorl_le_aarch64eb
+#define helper_atomic_fetch_xorl_le_mmu helper_atomic_fetch_xorl_le_mmu_aarch64eb
+#define helper_atomic_fetch_xorq_be helper_atomic_fetch_xorq_be_aarch64eb
+#define helper_atomic_fetch_xorq_be_mmu helper_atomic_fetch_xorq_be_mmu_aarch64eb
+#define helper_atomic_fetch_xorq_le helper_atomic_fetch_xorq_le_aarch64eb
+#define helper_atomic_fetch_xorq_le_mmu helper_atomic_fetch_xorq_le_mmu_aarch64eb
+#define helper_atomic_fetch_xorw_be helper_atomic_fetch_xorw_be_aarch64eb
+#define helper_atomic_fetch_xorw_be_mmu helper_atomic_fetch_xorw_be_mmu_aarch64eb
+#define helper_atomic_fetch_xorw_le helper_atomic_fetch_xorw_le_aarch64eb
+#define helper_atomic_fetch_xorw_le_mmu helper_atomic_fetch_xorw_le_mmu_aarch64eb
+#define helper_atomic_or_fetchb helper_atomic_or_fetchb_aarch64eb
+#define helper_atomic_or_fetchb_mmu helper_atomic_or_fetchb_mmu_aarch64eb
+#define helper_atomic_or_fetchl_be helper_atomic_or_fetchl_be_aarch64eb
+#define helper_atomic_or_fetchl_be_mmu helper_atomic_or_fetchl_be_mmu_aarch64eb
+#define helper_atomic_or_fetchl_le helper_atomic_or_fetchl_le_aarch64eb
+#define helper_atomic_or_fetchl_le_mmu helper_atomic_or_fetchl_le_mmu_aarch64eb
+#define helper_atomic_or_fetchq_be helper_atomic_or_fetchq_be_aarch64eb
+#define helper_atomic_or_fetchq_be_mmu helper_atomic_or_fetchq_be_mmu_aarch64eb
+#define helper_atomic_or_fetchq_le helper_atomic_or_fetchq_le_aarch64eb
+#define helper_atomic_or_fetchq_le_mmu helper_atomic_or_fetchq_le_mmu_aarch64eb
+#define helper_atomic_or_fetchw_be helper_atomic_or_fetchw_be_aarch64eb
+#define helper_atomic_or_fetchw_be_mmu helper_atomic_or_fetchw_be_mmu_aarch64eb
+#define helper_atomic_or_fetchw_le helper_atomic_or_fetchw_le_aarch64eb
+#define helper_atomic_or_fetchw_le_mmu helper_atomic_or_fetchw_le_mmu_aarch64eb
+#define helper_atomic_xchgb helper_atomic_xchgb_aarch64eb
+#define helper_atomic_xchgb helper_atomic_xchgb_aarch64eb
+#define helper_atomic_xchgb_mmu helper_atomic_xchgb_mmu_aarch64eb
+#define helper_atomic_xchgl_be helper_atomic_xchgl_be_aarch64eb
+#define helper_atomic_xchgl_be_mmu helper_atomic_xchgl_be_mmu_aarch64eb
+#define helper_atomic_xchgl_le helper_atomic_xchgl_le_aarch64eb
+#define helper_atomic_xchgl_le_mmu helper_atomic_xchgl_le_mmu_aarch64eb
+#define helper_atomic_xchgq_be helper_atomic_xchgq_be_aarch64eb
+#define helper_atomic_xchgq_be_mmu helper_atomic_xchgq_be_mmu_aarch64eb
+#define helper_atomic_xchgq_le helper_atomic_xchgq_le_aarch64eb
+#define helper_atomic_xchgq_le_mmu helper_atomic_xchgq_le_mmu_aarch64eb
+#define helper_atomic_xchgw_be helper_atomic_xchgw_be_aarch64eb
+#define helper_atomic_xchgw_be_mmu helper_atomic_xchgw_be_mmu_aarch64eb
+#define helper_atomic_xchgw_le helper_atomic_xchgw_le_aarch64eb
+#define helper_atomic_xchgw_le_mmu helper_atomic_xchgw_le_mmu_aarch64eb
+#define helper_atomic_xor_fetchb helper_atomic_xor_fetchb_aarch64eb
+#define helper_atomic_xor_fetchb_mmu helper_atomic_xor_fetchb_mmu_aarch64eb
+#define helper_atomic_xor_fetchl_be helper_atomic_xor_fetchl_be_aarch64eb
+#define helper_atomic_xor_fetchl_be_mmu helper_atomic_xor_fetchl_be_mmu_aarch64eb
+#define helper_atomic_xor_fetchl_le helper_atomic_xor_fetchl_le_aarch64eb
+#define helper_atomic_xor_fetchl_le_mmu helper_atomic_xor_fetchl_le_mmu_aarch64eb
+#define helper_atomic_xor_fetchq_be helper_atomic_xor_fetchq_be_aarch64eb
+#define helper_atomic_xor_fetchq_be_mmu helper_atomic_xor_fetchq_be_mmu_aarch64eb
+#define helper_atomic_xor_fetchq_le helper_atomic_xor_fetchq_le_aarch64eb
+#define helper_atomic_xor_fetchq_le_mmu helper_atomic_xor_fetchq_le_mmu_aarch64eb
+#define helper_atomic_xor_fetchw_be helper_atomic_xor_fetchw_be_aarch64eb
+#define helper_atomic_xor_fetchw_be_mmu helper_atomic_xor_fetchw_be_mmu_aarch64eb
+#define helper_atomic_xor_fetchw_le helper_atomic_xor_fetchw_le_aarch64eb
+#define helper_atomic_xor_fetchw_le_mmu helper_atomic_xor_fetchw_le_mmu_aarch64eb
 #define helper_be_ldl_cmmu helper_be_ldl_cmmu_aarch64eb
 #define helper_be_ldq_cmmu helper_be_ldq_cmmu_aarch64eb
 #define helper_be_ldq_mmu helper_be_ldq_mmu_aarch64eb
@@ -1400,6 +1543,10 @@
 #define helper_crypto_sha256su0 helper_crypto_sha256su0_aarch64eb
 #define helper_crypto_sha256su1 helper_crypto_sha256su1_aarch64eb
 #define helper_dc_zva helper_dc_zva_aarch64eb
+#define helper_div_i32 helper_div_i32_aarch64eb
+#define helper_div_i64 helper_div_i64_aarch64eb
+#define helper_divu_i32 helper_divu_i32_aarch64eb
+#define helper_divu_i64 helper_divu_i64_aarch64eb
 #define helper_double_saturate helper_double_saturate_aarch64eb
 #define helper_exception_internal helper_exception_internal_aarch64eb
 #define helper_exception_return helper_exception_return_aarch64eb
@@ -1532,6 +1679,10 @@
 #define helper_le_stl_mmu helper_le_stl_mmu_aarch64eb
 #define helper_le_stq_mmu helper_le_stq_mmu_aarch64eb
 #define helper_le_stw_mmu helper_le_stw_mmu_aarch64eb
+#define helper_mulsh_i32 helper_mulsh_i32_aarch64eb
+#define helper_mulsh_i64 helper_mulsh_i64_aarch64eb
+#define helper_muluh_i32 helper_muluh_i32_aarch64eb
+#define helper_muluh_i64 helper_muluh_i64_aarch64eb
 #define helper_mrs_banked helper_mrs_banked_aarch64eb
 #define helper_msa_ld_b helper_msa_ld_b_aarch64eb
 #define helper_msa_ld_d helper_msa_ld_d_aarch64eb
@@ -1773,6 +1924,10 @@
 #define helper_recpe_f64 helper_recpe_f64_aarch64eb
 #define helper_recpe_u32 helper_recpe_u32_aarch64eb
 #define helper_recps_f32 helper_recps_f32_aarch64eb
+#define helper_rem_i32 helper_rem_i32_aarch64eb
+#define helper_rem_i64 helper_rem_i64_aarch64eb
+#define helper_remu_i32 helper_remu_i32_aarch64eb
+#define helper_remu_i64 helper_remu_i64_aarch64eb
 #define helper_ret_ldb_cmmu helper_ret_ldb_cmmu_aarch64eb
 #define helper_ret_ldsb_mmu helper_ret_ldsb_mmu_aarch64eb
 #define helper_ret_ldub_mmu helper_ret_ldub_mmu_aarch64eb
@@ -1790,6 +1945,8 @@
 #define helper_sadd8 helper_sadd8_aarch64eb
 #define helper_saddsubx helper_saddsubx_aarch64eb
 #define helper_sar_cc helper_sar_cc_aarch64eb
+#define helper_sar_i32 helper_sar_i32_aarch64eb
+#define helper_sar_i64 helper_sar_i64_aarch64eb
 #define helper_sdiv helper_sdiv_aarch64eb
 #define helper_sel_flags helper_sel_flags_aarch64eb
 #define helper_set_cp_reg helper_set_cp_reg_aarch64eb
@@ -1803,7 +1960,10 @@
 #define helper_shadd8 helper_shadd8_aarch64eb
 #define helper_shaddsubx helper_shaddsubx_aarch64eb
 #define helper_shl_cc helper_shl_cc_aarch64eb
+#define helper_shl_i64 helper_shl_i64_aarch64eb
 #define helper_shr_cc helper_shr_cc_aarch64eb
+#define helper_shr_i32 helper_shr_i32_aarch64eb
+#define helper_shr_i64 helper_shr_i64_aarch64eb
 #define helper_shsub16 helper_shsub16_aarch64eb
 #define helper_shsub8 helper_shsub8_aarch64eb
 #define helper_shsubaddx helper_shsubaddx_aarch64eb
@@ -2756,6 +2916,26 @@
 #define tcg_gen_andc_i64 tcg_gen_andc_i64_aarch64eb
 #define tcg_gen_andi_i32 tcg_gen_andi_i32_aarch64eb
 #define tcg_gen_andi_i64 tcg_gen_andi_i64_aarch64eb
+#define tcg_gen_atomic_add_fetch_i32 tcg_gen_atomic_add_fetch_i32_aarch64eb
+#define tcg_gen_atomic_add_fetch_i64 tcg_gen_atomic_add_fetch_i64_aarch64eb
+#define tcg_gen_atomic_and_fetch_i32 tcg_gen_atomic_and_fetch_i32_aarch64eb
+#define tcg_gen_atomic_and_fetch_i64 tcg_gen_atomic_and_fetch_i64_aarch64eb
+#define tcg_gen_atomic_cmpxchg_i32 tcg_gen_atomic_cmpxchg_i32_aarch64eb
+#define tcg_gen_atomic_cmpxchg_i64 tcg_gen_atomic_cmpxchg_i64_aarch64eb
+#define tcg_gen_atomic_fetch_add_i32 tcg_gen_atomic_fetch_add_i32_aarch64eb
+#define tcg_gen_atomic_fetch_add_i64 tcg_gen_atomic_fetch_add_i64_aarch64eb
+#define tcg_gen_atomic_fetch_and_i32 tcg_gen_atomic_fetch_and_i32_aarch64eb
+#define tcg_gen_atomic_fetch_and_i64 tcg_gen_atomic_fetch_and_i64_aarch64eb
+#define tcg_gen_atomic_fetch_or_i32 tcg_gen_atomic_fetch_or_i32_aarch64eb
+#define tcg_gen_atomic_fetch_or_i64 tcg_gen_atomic_fetch_or_i64_aarch64eb
+#define tcg_gen_atomic_fetch_xor_i32 tcg_gen_atomic_fetch_xor_i32_aarch64eb
+#define tcg_gen_atomic_fetch_xor_i64 tcg_gen_atomic_fetch_xor_i64_aarch64eb
+#define tcg_gen_atomic_or_fetch_i32 tcg_gen_atomic_or_fetch_i32_aarch64eb
+#define tcg_gen_atomic_or_fetch_i64 tcg_gen_atomic_or_fetch_i64_aarch64eb
+#define tcg_gen_atomic_xchg_i32 tcg_gen_atomic_xchg_i32_aarch64eb
+#define tcg_gen_atomic_xchg_i64 tcg_gen_atomic_xchg_i64_aarch64eb
+#define tcg_gen_atomic_xor_fetch_i32 tcg_gen_atomic_xor_fetch_i32_aarch64eb
+#define tcg_gen_atomic_xor_fetch_i64 tcg_gen_atomic_xor_fetch_i64_aarch64eb
 #define tcg_gen_br tcg_gen_br_aarch64eb
 #define tcg_gen_brcond_i32 tcg_gen_brcond_i32_aarch64eb
 #define tcg_gen_brcond_i64 tcg_gen_brcond_i64_aarch64eb

qemu/arm.h

@@ -1372,6 +1372,149 @@
 #define helper_add_saturate helper_add_saturate_arm
 #define helper_add_setq helper_add_setq_arm
 #define helper_add_usaturate helper_add_usaturate_arm
+#define helper_atomic_add_fetchb helper_atomic_add_fetchb_arm
+#define helper_atomic_add_fetchb_mmu helper_atomic_add_fetchb_mmu_arm
+#define helper_atomic_add_fetchl_be helper_atomic_add_fetchl_be_arm
+#define helper_atomic_add_fetchl_be_mmu helper_atomic_add_fetchl_be_mmu_arm
+#define helper_atomic_add_fetchl_le helper_atomic_add_fetchl_le_arm
+#define helper_atomic_add_fetchl_le_mmu helper_atomic_add_fetchl_le_mmu_arm
+#define helper_atomic_add_fetchq_be helper_atomic_add_fetchq_be_arm
+#define helper_atomic_add_fetchq_be_mmu helper_atomic_add_fetchq_be_mmu_arm
+#define helper_atomic_add_fetchq_le helper_atomic_add_fetchq_le_arm
+#define helper_atomic_add_fetchq_le_mmu helper_atomic_add_fetchq_le_mmu_arm
+#define helper_atomic_add_fetchw_be helper_atomic_add_fetchw_be_arm
+#define helper_atomic_add_fetchw_be_mmu helper_atomic_add_fetchw_be_mmu_arm
+#define helper_atomic_add_fetchw_le helper_atomic_add_fetchw_le_arm
+#define helper_atomic_add_fetchw_le_mmu helper_atomic_add_fetchw_le_mmu_arm
+#define helper_atomic_and_fetchb helper_atomic_and_fetchb_arm
+#define helper_atomic_and_fetchb_le_mmu helper_atomic_and_fetchb_le_mmu_arm
+#define helper_atomic_and_fetchb_mmu helper_atomic_and_fetchb_mmu_arm
+#define helper_atomic_and_fetchl_be helper_atomic_and_fetchl_be_arm
+#define helper_atomic_and_fetchl_be_mmu helper_atomic_and_fetchl_be_mmu_arm
+#define helper_atomic_and_fetchl_le helper_atomic_and_fetchl_le_arm
+#define helper_atomic_and_fetchl_le_mmu helper_atomic_and_fetchl_le_mmu_arm
+#define helper_atomic_and_fetchq_be helper_atomic_and_fetchq_be_arm
+#define helper_atomic_and_fetchq_be_mmu helper_atomic_and_fetchq_be_mmu_arm
+#define helper_atomic_and_fetchq_le helper_atomic_and_fetchq_le_arm
+#define helper_atomic_and_fetchq_le_mmu helper_atomic_and_fetchq_le_mmu_arm
+#define helper_atomic_and_fetchw_be helper_atomic_and_fetchw_be_arm
+#define helper_atomic_and_fetchw_be_mmu helper_atomic_and_fetchw_be_mmu_arm
+#define helper_atomic_and_fetchw_le helper_atomic_and_fetchw_le_arm
+#define helper_atomic_and_fetchw_le_mmu helper_atomic_and_fetchw_le_mmu_arm
+#define helper_atomic_cmpxchgb helper_atomic_cmpxchgb_arm
+#define helper_atomic_cmpxchgb helper_atomic_cmpxchgb_arm
+#define helper_atomic_cmpxchgb_mmu helper_atomic_cmpxchgb_mmu_arm
+#define helper_atomic_cmpxchgl_be helper_atomic_cmpxchgl_be_arm
+#define helper_atomic_cmpxchgl_be_mmu helper_atomic_cmpxchgl_be_mmu_arm
+#define helper_atomic_cmpxchgl_le helper_atomic_cmpxchgl_le_arm
+#define helper_atomic_cmpxchgl_le_mmu helper_atomic_cmpxchgl_le_mmu_arm
+#define helper_atomic_cmpxchgq_be helper_atomic_cmpxchgq_be_arm
+#define helper_atomic_cmpxchgq_be_mmu helper_atomic_cmpxchgq_be_mmu_arm
+#define helper_atomic_cmpxchgq_le helper_atomic_cmpxchgq_le_arm
+#define helper_atomic_cmpxchgq_le_mmu helper_atomic_cmpxchgq_le_mmu_arm
+#define helper_atomic_cmpxchgw_be helper_atomic_cmpxchgw_be_arm
+#define helper_atomic_cmpxchgw_be_mmu helper_atomic_cmpxchgw_be_mmu_arm
+#define helper_atomic_cmpxchgw_le helper_atomic_cmpxchgw_le_arm
+#define helper_atomic_cmpxchgw_le_mmu helper_atomic_cmpxchgw_le_mmu_arm
+#define helper_atomic_fetch_addb helper_atomic_fetch_addb_arm
+#define helper_atomic_fetch_addb_mmu helper_atomic_fetch_addb_mmu_arm
+#define helper_atomic_fetch_addl_be helper_atomic_fetch_addl_be_arm
+#define helper_atomic_fetch_addl_be_mmu helper_atomic_fetch_addl_be_mmu_arm
+#define helper_atomic_fetch_addl_le helper_atomic_fetch_addl_le_arm
+#define helper_atomic_fetch_addl_le_mmu helper_atomic_fetch_addl_le_mmu_arm
+#define helper_atomic_fetch_addq_be helper_atomic_fetch_addq_be_arm
+#define helper_atomic_fetch_addq_be_mmu helper_atomic_fetch_addq_be_mmu_arm
+#define helper_atomic_fetch_addq_le helper_atomic_fetch_addq_le_arm
+#define helper_atomic_fetch_addq_le_mmu helper_atomic_fetch_addq_le_mmu_arm
+#define helper_atomic_fetch_addw_be helper_atomic_fetch_addw_be_arm
+#define helper_atomic_fetch_addw_be_mmu helper_atomic_fetch_addw_be_mmu_arm
+#define helper_atomic_fetch_addw_le helper_atomic_fetch_addw_le_arm
+#define helper_atomic_fetch_addw_le_mmu helper_atomic_fetch_addw_le_mmu_arm
+#define helper_atomic_fetch_andb helper_atomic_fetch_andb_arm
+#define helper_atomic_fetch_andb_mmu helper_atomic_fetch_andb_mmu_arm
+#define helper_atomic_fetch_andl_be helper_atomic_fetch_andl_be_arm
+#define helper_atomic_fetch_andl_be_mmu helper_atomic_fetch_andl_be_mmu_arm
+#define helper_atomic_fetch_andl_le helper_atomic_fetch_andl_le_arm
+#define helper_atomic_fetch_andl_le_mmu helper_atomic_fetch_andl_le_mmu_arm
+#define helper_atomic_fetch_andq_be helper_atomic_fetch_andq_be_arm
+#define helper_atomic_fetch_andq_be_mmu helper_atomic_fetch_andq_be_mmu_arm
+#define helper_atomic_fetch_andq_le helper_atomic_fetch_andq_le_arm
+#define helper_atomic_fetch_andq_le_mmu helper_atomic_fetch_andq_le_mmu_arm
+#define helper_atomic_fetch_andw_be helper_atomic_fetch_andw_be_arm
+#define helper_atomic_fetch_andw_be_mmu helper_atomic_fetch_andw_be_mmu_arm
+#define helper_atomic_fetch_andw_le helper_atomic_fetch_andw_le_arm
+#define helper_atomic_fetch_andw_le_mmu helper_atomic_fetch_andw_le_mmu_arm
+#define helper_atomic_fetch_orb helper_atomic_fetch_orb_arm
+#define helper_atomic_fetch_orb_mmu helper_atomic_fetch_orb_mmu_arm
+#define helper_atomic_fetch_orl_be helper_atomic_fetch_orl_be_arm
+#define helper_atomic_fetch_orl_be_mmu helper_atomic_fetch_orl_be_mmu_arm
+#define helper_atomic_fetch_orl_le helper_atomic_fetch_orl_le_arm
+#define helper_atomic_fetch_orl_le_mmu helper_atomic_fetch_orl_le_mmu_arm
+#define helper_atomic_fetch_orq_be helper_atomic_fetch_orq_be_arm
+#define helper_atomic_fetch_orq_be_mmu helper_atomic_fetch_orq_be_mmu_arm
+#define helper_atomic_fetch_orq_le helper_atomic_fetch_orq_le_arm
+#define helper_atomic_fetch_orq_le_mmu helper_atomic_fetch_orq_le_mmu_arm
+#define helper_atomic_fetch_orw_be helper_atomic_fetch_orw_be_arm
+#define helper_atomic_fetch_orw_be_mmu helper_atomic_fetch_orw_be_mmu_arm
+#define helper_atomic_fetch_orw_le helper_atomic_fetch_orw_le_arm
+#define helper_atomic_fetch_orw_le_mmu helper_atomic_fetch_orw_le_mmu_arm
+#define helper_atomic_fetch_xorb helper_atomic_fetch_xorb_arm
+#define helper_atomic_fetch_xorb_mmu helper_atomic_fetch_xorb_mmu_arm
+#define helper_atomic_fetch_xorl_be helper_atomic_fetch_xorl_be_arm
+#define helper_atomic_fetch_xorl_be_mmu helper_atomic_fetch_xorl_be_mmu_arm
+#define helper_atomic_fetch_xorl_le helper_atomic_fetch_xorl_le_arm
+#define helper_atomic_fetch_xorl_le_mmu helper_atomic_fetch_xorl_le_mmu_arm
+#define helper_atomic_fetch_xorq_be helper_atomic_fetch_xorq_be_arm
+#define helper_atomic_fetch_xorq_be_mmu helper_atomic_fetch_xorq_be_mmu_arm
+#define helper_atomic_fetch_xorq_le helper_atomic_fetch_xorq_le_arm
+#define helper_atomic_fetch_xorq_le_mmu helper_atomic_fetch_xorq_le_mmu_arm
+#define helper_atomic_fetch_xorw_be helper_atomic_fetch_xorw_be_arm
+#define helper_atomic_fetch_xorw_be_mmu helper_atomic_fetch_xorw_be_mmu_arm
+#define helper_atomic_fetch_xorw_le helper_atomic_fetch_xorw_le_arm
+#define helper_atomic_fetch_xorw_le_mmu helper_atomic_fetch_xorw_le_mmu_arm
+#define helper_atomic_or_fetchb helper_atomic_or_fetchb_arm
+#define helper_atomic_or_fetchb_mmu helper_atomic_or_fetchb_mmu_arm
+#define helper_atomic_or_fetchl_be helper_atomic_or_fetchl_be_arm
+#define helper_atomic_or_fetchl_be_mmu helper_atomic_or_fetchl_be_mmu_arm
+#define helper_atomic_or_fetchl_le helper_atomic_or_fetchl_le_arm
+#define helper_atomic_or_fetchl_le_mmu helper_atomic_or_fetchl_le_mmu_arm
+#define helper_atomic_or_fetchq_be helper_atomic_or_fetchq_be_arm
+#define helper_atomic_or_fetchq_be_mmu helper_atomic_or_fetchq_be_mmu_arm
+#define helper_atomic_or_fetchq_le helper_atomic_or_fetchq_le_arm
+#define helper_atomic_or_fetchq_le_mmu helper_atomic_or_fetchq_le_mmu_arm
+#define helper_atomic_or_fetchw_be helper_atomic_or_fetchw_be_arm
+#define helper_atomic_or_fetchw_be_mmu helper_atomic_or_fetchw_be_mmu_arm
+#define helper_atomic_or_fetchw_le helper_atomic_or_fetchw_le_arm
+#define helper_atomic_or_fetchw_le_mmu helper_atomic_or_fetchw_le_mmu_arm
+#define helper_atomic_xchgb helper_atomic_xchgb_arm
+#define helper_atomic_xchgb helper_atomic_xchgb_arm
+#define helper_atomic_xchgb_mmu helper_atomic_xchgb_mmu_arm
+#define helper_atomic_xchgl_be helper_atomic_xchgl_be_arm
+#define helper_atomic_xchgl_be_mmu helper_atomic_xchgl_be_mmu_arm
+#define helper_atomic_xchgl_le helper_atomic_xchgl_le_arm
+#define helper_atomic_xchgl_le_mmu helper_atomic_xchgl_le_mmu_arm
+#define helper_atomic_xchgq_be helper_atomic_xchgq_be_arm
+#define helper_atomic_xchgq_be_mmu helper_atomic_xchgq_be_mmu_arm
+#define helper_atomic_xchgq_le helper_atomic_xchgq_le_arm
+#define helper_atomic_xchgq_le_mmu helper_atomic_xchgq_le_mmu_arm
+#define helper_atomic_xchgw_be helper_atomic_xchgw_be_arm
+#define helper_atomic_xchgw_be_mmu helper_atomic_xchgw_be_mmu_arm
+#define helper_atomic_xchgw_le helper_atomic_xchgw_le_arm
+#define helper_atomic_xchgw_le_mmu helper_atomic_xchgw_le_mmu_arm
+#define helper_atomic_xor_fetchb helper_atomic_xor_fetchb_arm
+#define helper_atomic_xor_fetchb_mmu helper_atomic_xor_fetchb_mmu_arm
+#define helper_atomic_xor_fetchl_be helper_atomic_xor_fetchl_be_arm
+#define helper_atomic_xor_fetchl_be_mmu helper_atomic_xor_fetchl_be_mmu_arm
+#define helper_atomic_xor_fetchl_le helper_atomic_xor_fetchl_le_arm
+#define helper_atomic_xor_fetchl_le_mmu helper_atomic_xor_fetchl_le_mmu_arm
+#define helper_atomic_xor_fetchq_be helper_atomic_xor_fetchq_be_arm
+#define helper_atomic_xor_fetchq_be_mmu helper_atomic_xor_fetchq_be_mmu_arm
+#define helper_atomic_xor_fetchq_le helper_atomic_xor_fetchq_le_arm
+#define helper_atomic_xor_fetchq_le_mmu helper_atomic_xor_fetchq_le_mmu_arm
+#define helper_atomic_xor_fetchw_be helper_atomic_xor_fetchw_be_arm
+#define helper_atomic_xor_fetchw_be_mmu helper_atomic_xor_fetchw_be_mmu_arm
+#define helper_atomic_xor_fetchw_le helper_atomic_xor_fetchw_le_arm
+#define helper_atomic_xor_fetchw_le_mmu helper_atomic_xor_fetchw_le_mmu_arm
 #define helper_be_ldl_cmmu helper_be_ldl_cmmu_arm
 #define helper_be_ldq_cmmu helper_be_ldq_cmmu_arm
 #define helper_be_ldq_mmu helper_be_ldq_mmu_arm
@@ -1400,6 +1543,10 @@
 #define helper_crypto_sha256su0 helper_crypto_sha256su0_arm
 #define helper_crypto_sha256su1 helper_crypto_sha256su1_arm
 #define helper_dc_zva helper_dc_zva_arm
+#define helper_div_i32 helper_div_i32_arm
+#define helper_div_i64 helper_div_i64_arm
+#define helper_divu_i32 helper_divu_i32_arm
+#define helper_divu_i64 helper_divu_i64_arm
 #define helper_double_saturate helper_double_saturate_arm
 #define helper_exception_internal helper_exception_internal_arm
 #define helper_exception_return helper_exception_return_arm
@@ -1532,6 +1679,10 @@
 #define helper_le_stl_mmu helper_le_stl_mmu_arm
 #define helper_le_stq_mmu helper_le_stq_mmu_arm
 #define helper_le_stw_mmu helper_le_stw_mmu_arm
+#define helper_mulsh_i32 helper_mulsh_i32_arm
+#define helper_mulsh_i64 helper_mulsh_i64_arm
+#define helper_muluh_i32 helper_muluh_i32_arm
+#define helper_muluh_i64 helper_muluh_i64_arm
 #define helper_mrs_banked helper_mrs_banked_arm
 #define helper_msa_ld_b helper_msa_ld_b_arm
 #define helper_msa_ld_d helper_msa_ld_d_arm
@@ -1773,6 +1924,10 @@
 #define helper_recpe_f64 helper_recpe_f64_arm
 #define helper_recpe_u32 helper_recpe_u32_arm
 #define helper_recps_f32 helper_recps_f32_arm
+#define helper_rem_i32 helper_rem_i32_arm
+#define helper_rem_i64 helper_rem_i64_arm
+#define helper_remu_i32 helper_remu_i32_arm
+#define helper_remu_i64 helper_remu_i64_arm
 #define helper_ret_ldb_cmmu helper_ret_ldb_cmmu_arm
 #define helper_ret_ldsb_mmu helper_ret_ldsb_mmu_arm
 #define helper_ret_ldub_mmu helper_ret_ldub_mmu_arm
@@ -1790,6 +1945,8 @@
 #define helper_sadd8 helper_sadd8_arm
 #define helper_saddsubx helper_saddsubx_arm
 #define helper_sar_cc helper_sar_cc_arm
+#define helper_sar_i32 helper_sar_i32_arm
+#define helper_sar_i64 helper_sar_i64_arm
 #define helper_sdiv helper_sdiv_arm
 #define helper_sel_flags helper_sel_flags_arm
 #define helper_set_cp_reg helper_set_cp_reg_arm
@@ -1803,7 +1960,10 @@
 #define helper_shadd8 helper_shadd8_arm
 #define helper_shaddsubx helper_shaddsubx_arm
 #define helper_shl_cc helper_shl_cc_arm
+#define helper_shl_i64 helper_shl_i64_arm
 #define helper_shr_cc helper_shr_cc_arm
+#define helper_shr_i32 helper_shr_i32_arm
+#define helper_shr_i64 helper_shr_i64_arm
 #define helper_shsub16 helper_shsub16_arm
 #define helper_shsub8 helper_shsub8_arm
 #define helper_shsubaddx helper_shsubaddx_arm
@@ -2756,6 +2916,26 @@
 #define tcg_gen_andc_i64 tcg_gen_andc_i64_arm
 #define tcg_gen_andi_i32 tcg_gen_andi_i32_arm
 #define tcg_gen_andi_i64 tcg_gen_andi_i64_arm
+#define tcg_gen_atomic_add_fetch_i32 tcg_gen_atomic_add_fetch_i32_arm
+#define tcg_gen_atomic_add_fetch_i64 tcg_gen_atomic_add_fetch_i64_arm
+#define tcg_gen_atomic_and_fetch_i32 tcg_gen_atomic_and_fetch_i32_arm
+#define tcg_gen_atomic_and_fetch_i64 tcg_gen_atomic_and_fetch_i64_arm
+#define tcg_gen_atomic_cmpxchg_i32 tcg_gen_atomic_cmpxchg_i32_arm
+#define tcg_gen_atomic_cmpxchg_i64 tcg_gen_atomic_cmpxchg_i64_arm
+#define tcg_gen_atomic_fetch_add_i32 tcg_gen_atomic_fetch_add_i32_arm
+#define tcg_gen_atomic_fetch_add_i64 tcg_gen_atomic_fetch_add_i64_arm
+#define tcg_gen_atomic_fetch_and_i32 tcg_gen_atomic_fetch_and_i32_arm
+#define tcg_gen_atomic_fetch_and_i64 tcg_gen_atomic_fetch_and_i64_arm
+#define tcg_gen_atomic_fetch_or_i32 tcg_gen_atomic_fetch_or_i32_arm
+#define tcg_gen_atomic_fetch_or_i64 tcg_gen_atomic_fetch_or_i64_arm
+#define tcg_gen_atomic_fetch_xor_i32 tcg_gen_atomic_fetch_xor_i32_arm
+#define tcg_gen_atomic_fetch_xor_i64 tcg_gen_atomic_fetch_xor_i64_arm
+#define tcg_gen_atomic_or_fetch_i32 tcg_gen_atomic_or_fetch_i32_arm
+#define tcg_gen_atomic_or_fetch_i64 tcg_gen_atomic_or_fetch_i64_arm
+#define tcg_gen_atomic_xchg_i32 tcg_gen_atomic_xchg_i32_arm
+#define tcg_gen_atomic_xchg_i64 tcg_gen_atomic_xchg_i64_arm
+#define tcg_gen_atomic_xor_fetch_i32 tcg_gen_atomic_xor_fetch_i32_arm
+#define tcg_gen_atomic_xor_fetch_i64 tcg_gen_atomic_xor_fetch_i64_arm
 #define tcg_gen_br tcg_gen_br_arm
 #define tcg_gen_brcond_i32 tcg_gen_brcond_i32_arm
 #define tcg_gen_brcond_i64 tcg_gen_brcond_i64_arm

qemu/armeb.h

@@ -1372,6 +1372,149 @@
 #define helper_add_saturate helper_add_saturate_armeb
 #define helper_add_setq helper_add_setq_armeb
 #define helper_add_usaturate helper_add_usaturate_armeb
+#define helper_atomic_add_fetchb helper_atomic_add_fetchb_armeb
+#define helper_atomic_add_fetchb_mmu helper_atomic_add_fetchb_mmu_armeb
+#define helper_atomic_add_fetchl_be helper_atomic_add_fetchl_be_armeb
+#define helper_atomic_add_fetchl_be_mmu helper_atomic_add_fetchl_be_mmu_armeb
+#define helper_atomic_add_fetchl_le helper_atomic_add_fetchl_le_armeb
+#define helper_atomic_add_fetchl_le_mmu helper_atomic_add_fetchl_le_mmu_armeb
+#define helper_atomic_add_fetchq_be helper_atomic_add_fetchq_be_armeb
+#define helper_atomic_add_fetchq_be_mmu helper_atomic_add_fetchq_be_mmu_armeb
+#define helper_atomic_add_fetchq_le helper_atomic_add_fetchq_le_armeb
+#define helper_atomic_add_fetchq_le_mmu helper_atomic_add_fetchq_le_mmu_armeb
+#define helper_atomic_add_fetchw_be helper_atomic_add_fetchw_be_armeb
+#define helper_atomic_add_fetchw_be_mmu helper_atomic_add_fetchw_be_mmu_armeb
+#define helper_atomic_add_fetchw_le helper_atomic_add_fetchw_le_armeb
+#define helper_atomic_add_fetchw_le_mmu helper_atomic_add_fetchw_le_mmu_armeb
+#define helper_atomic_and_fetchb helper_atomic_and_fetchb_armeb
+#define helper_atomic_and_fetchb_le_mmu helper_atomic_and_fetchb_le_mmu_armeb
+#define helper_atomic_and_fetchb_mmu helper_atomic_and_fetchb_mmu_armeb
+#define helper_atomic_and_fetchl_be helper_atomic_and_fetchl_be_armeb
+#define helper_atomic_and_fetchl_be_mmu helper_atomic_and_fetchl_be_mmu_armeb
+#define helper_atomic_and_fetchl_le helper_atomic_and_fetchl_le_armeb
+#define helper_atomic_and_fetchl_le_mmu helper_atomic_and_fetchl_le_mmu_armeb
+#define helper_atomic_and_fetchq_be helper_atomic_and_fetchq_be_armeb
+#define helper_atomic_and_fetchq_be_mmu helper_atomic_and_fetchq_be_mmu_armeb
+#define helper_atomic_and_fetchq_le helper_atomic_and_fetchq_le_armeb
+#define helper_atomic_and_fetchq_le_mmu helper_atomic_and_fetchq_le_mmu_armeb
+#define helper_atomic_and_fetchw_be helper_atomic_and_fetchw_be_armeb
+#define helper_atomic_and_fetchw_be_mmu helper_atomic_and_fetchw_be_mmu_armeb
+#define helper_atomic_and_fetchw_le helper_atomic_and_fetchw_le_armeb
+#define helper_atomic_and_fetchw_le_mmu helper_atomic_and_fetchw_le_mmu_armeb
+#define helper_atomic_cmpxchgb helper_atomic_cmpxchgb_armeb
+#define helper_atomic_cmpxchgb helper_atomic_cmpxchgb_armeb
+#define helper_atomic_cmpxchgb_mmu helper_atomic_cmpxchgb_mmu_armeb
+#define helper_atomic_cmpxchgl_be helper_atomic_cmpxchgl_be_armeb
+#define helper_atomic_cmpxchgl_be_mmu helper_atomic_cmpxchgl_be_mmu_armeb
+#define helper_atomic_cmpxchgl_le helper_atomic_cmpxchgl_le_armeb
+#define helper_atomic_cmpxchgl_le_mmu helper_atomic_cmpxchgl_le_mmu_armeb
+#define helper_atomic_cmpxchgq_be helper_atomic_cmpxchgq_be_armeb
+#define helper_atomic_cmpxchgq_be_mmu helper_atomic_cmpxchgq_be_mmu_armeb
+#define helper_atomic_cmpxchgq_le helper_atomic_cmpxchgq_le_armeb
+#define helper_atomic_cmpxchgq_le_mmu helper_atomic_cmpxchgq_le_mmu_armeb
+#define helper_atomic_cmpxchgw_be helper_atomic_cmpxchgw_be_armeb
+#define helper_atomic_cmpxchgw_be_mmu helper_atomic_cmpxchgw_be_mmu_armeb
+#define helper_atomic_cmpxchgw_le helper_atomic_cmpxchgw_le_armeb
+#define helper_atomic_cmpxchgw_le_mmu helper_atomic_cmpxchgw_le_mmu_armeb
+#define helper_atomic_fetch_addb helper_atomic_fetch_addb_armeb
+#define helper_atomic_fetch_addb_mmu helper_atomic_fetch_addb_mmu_armeb
+#define helper_atomic_fetch_addl_be helper_atomic_fetch_addl_be_armeb
+#define helper_atomic_fetch_addl_be_mmu helper_atomic_fetch_addl_be_mmu_armeb
+#define helper_atomic_fetch_addl_le helper_atomic_fetch_addl_le_armeb
+#define helper_atomic_fetch_addl_le_mmu helper_atomic_fetch_addl_le_mmu_armeb
+#define helper_atomic_fetch_addq_be helper_atomic_fetch_addq_be_armeb
+#define helper_atomic_fetch_addq_be_mmu helper_atomic_fetch_addq_be_mmu_armeb
+#define helper_atomic_fetch_addq_le helper_atomic_fetch_addq_le_armeb
+#define helper_atomic_fetch_addq_le_mmu helper_atomic_fetch_addq_le_mmu_armeb
+#define helper_atomic_fetch_addw_be helper_atomic_fetch_addw_be_armeb
+#define helper_atomic_fetch_addw_be_mmu helper_atomic_fetch_addw_be_mmu_armeb
+#define helper_atomic_fetch_addw_le helper_atomic_fetch_addw_le_armeb
+#define helper_atomic_fetch_addw_le_mmu helper_atomic_fetch_addw_le_mmu_armeb
+#define helper_atomic_fetch_andb helper_atomic_fetch_andb_armeb
+#define helper_atomic_fetch_andb_mmu helper_atomic_fetch_andb_mmu_armeb
+#define helper_atomic_fetch_andl_be helper_atomic_fetch_andl_be_armeb
+#define helper_atomic_fetch_andl_be_mmu helper_atomic_fetch_andl_be_mmu_armeb
+#define helper_atomic_fetch_andl_le helper_atomic_fetch_andl_le_armeb
+#define helper_atomic_fetch_andl_le_mmu helper_atomic_fetch_andl_le_mmu_armeb
+#define helper_atomic_fetch_andq_be helper_atomic_fetch_andq_be_armeb
+#define helper_atomic_fetch_andq_be_mmu helper_atomic_fetch_andq_be_mmu_armeb
+#define helper_atomic_fetch_andq_le helper_atomic_fetch_andq_le_armeb
+#define helper_atomic_fetch_andq_le_mmu helper_atomic_fetch_andq_le_mmu_armeb
+#define helper_atomic_fetch_andw_be helper_atomic_fetch_andw_be_armeb
+#define helper_atomic_fetch_andw_be_mmu helper_atomic_fetch_andw_be_mmu_armeb
+#define helper_atomic_fetch_andw_le helper_atomic_fetch_andw_le_armeb
+#define helper_atomic_fetch_andw_le_mmu helper_atomic_fetch_andw_le_mmu_armeb
+#define helper_atomic_fetch_orb helper_atomic_fetch_orb_armeb
+#define helper_atomic_fetch_orb_mmu helper_atomic_fetch_orb_mmu_armeb
+#define helper_atomic_fetch_orl_be helper_atomic_fetch_orl_be_armeb
+#define helper_atomic_fetch_orl_be_mmu helper_atomic_fetch_orl_be_mmu_armeb
+#define helper_atomic_fetch_orl_le helper_atomic_fetch_orl_le_armeb
+#define helper_atomic_fetch_orl_le_mmu helper_atomic_fetch_orl_le_mmu_armeb
+#define helper_atomic_fetch_orq_be helper_atomic_fetch_orq_be_armeb
+#define helper_atomic_fetch_orq_be_mmu helper_atomic_fetch_orq_be_mmu_armeb
+#define helper_atomic_fetch_orq_le helper_atomic_fetch_orq_le_armeb
+#define helper_atomic_fetch_orq_le_mmu helper_atomic_fetch_orq_le_mmu_armeb
+#define helper_atomic_fetch_orw_be helper_atomic_fetch_orw_be_armeb
+#define helper_atomic_fetch_orw_be_mmu helper_atomic_fetch_orw_be_mmu_armeb
+#define helper_atomic_fetch_orw_le helper_atomic_fetch_orw_le_armeb
+#define helper_atomic_fetch_orw_le_mmu helper_atomic_fetch_orw_le_mmu_armeb
+#define helper_atomic_fetch_xorb helper_atomic_fetch_xorb_armeb
+#define helper_atomic_fetch_xorb_mmu helper_atomic_fetch_xorb_mmu_armeb
+#define helper_atomic_fetch_xorl_be helper_atomic_fetch_xorl_be_armeb
+#define helper_atomic_fetch_xorl_be_mmu helper_atomic_fetch_xorl_be_mmu_armeb
+#define helper_atomic_fetch_xorl_le helper_atomic_fetch_xorl_le_armeb
+#define helper_atomic_fetch_xorl_le_mmu helper_atomic_fetch_xorl_le_mmu_armeb
+#define helper_atomic_fetch_xorq_be helper_atomic_fetch_xorq_be_armeb
+#define helper_atomic_fetch_xorq_be_mmu helper_atomic_fetch_xorq_be_mmu_armeb
+#define helper_atomic_fetch_xorq_le helper_atomic_fetch_xorq_le_armeb
+#define helper_atomic_fetch_xorq_le_mmu helper_atomic_fetch_xorq_le_mmu_armeb
+#define helper_atomic_fetch_xorw_be helper_atomic_fetch_xorw_be_armeb
+#define helper_atomic_fetch_xorw_be_mmu helper_atomic_fetch_xorw_be_mmu_armeb
+#define helper_atomic_fetch_xorw_le helper_atomic_fetch_xorw_le_armeb
+#define helper_atomic_fetch_xorw_le_mmu helper_atomic_fetch_xorw_le_mmu_armeb
+#define helper_atomic_or_fetchb helper_atomic_or_fetchb_armeb
+#define helper_atomic_or_fetchb_mmu helper_atomic_or_fetchb_mmu_armeb
+#define helper_atomic_or_fetchl_be helper_atomic_or_fetchl_be_armeb
+#define helper_atomic_or_fetchl_be_mmu helper_atomic_or_fetchl_be_mmu_armeb
+#define helper_atomic_or_fetchl_le helper_atomic_or_fetchl_le_armeb
+#define helper_atomic_or_fetchl_le_mmu helper_atomic_or_fetchl_le_mmu_armeb
+#define helper_atomic_or_fetchq_be helper_atomic_or_fetchq_be_armeb
+#define helper_atomic_or_fetchq_be_mmu helper_atomic_or_fetchq_be_mmu_armeb
+#define helper_atomic_or_fetchq_le helper_atomic_or_fetchq_le_armeb
+#define helper_atomic_or_fetchq_le_mmu helper_atomic_or_fetchq_le_mmu_armeb
+#define helper_atomic_or_fetchw_be helper_atomic_or_fetchw_be_armeb
+#define helper_atomic_or_fetchw_be_mmu helper_atomic_or_fetchw_be_mmu_armeb
+#define helper_atomic_or_fetchw_le helper_atomic_or_fetchw_le_armeb
+#define helper_atomic_or_fetchw_le_mmu helper_atomic_or_fetchw_le_mmu_armeb
+#define helper_atomic_xchgb helper_atomic_xchgb_armeb
+#define helper_atomic_xchgb helper_atomic_xchgb_armeb
+#define helper_atomic_xchgb_mmu helper_atomic_xchgb_mmu_armeb
+#define helper_atomic_xchgl_be helper_atomic_xchgl_be_armeb
+#define helper_atomic_xchgl_be_mmu helper_atomic_xchgl_be_mmu_armeb
+#define helper_atomic_xchgl_le helper_atomic_xchgl_le_armeb
+#define helper_atomic_xchgl_le_mmu helper_atomic_xchgl_le_mmu_armeb
+#define helper_atomic_xchgq_be helper_atomic_xchgq_be_armeb
+#define helper_atomic_xchgq_be_mmu helper_atomic_xchgq_be_mmu_armeb
+#define helper_atomic_xchgq_le helper_atomic_xchgq_le_armeb
+#define helper_atomic_xchgq_le_mmu helper_atomic_xchgq_le_mmu_armeb
+#define helper_atomic_xchgw_be helper_atomic_xchgw_be_armeb
+#define helper_atomic_xchgw_be_mmu helper_atomic_xchgw_be_mmu_armeb
+#define helper_atomic_xchgw_le helper_atomic_xchgw_le_armeb
+#define helper_atomic_xchgw_le_mmu helper_atomic_xchgw_le_mmu_armeb
+#define helper_atomic_xor_fetchb helper_atomic_xor_fetchb_armeb
+#define helper_atomic_xor_fetchb_mmu helper_atomic_xor_fetchb_mmu_armeb
+#define helper_atomic_xor_fetchl_be helper_atomic_xor_fetchl_be_armeb
+#define helper_atomic_xor_fetchl_be_mmu helper_atomic_xor_fetchl_be_mmu_armeb
+#define helper_atomic_xor_fetchl_le helper_atomic_xor_fetchl_le_armeb
+#define helper_atomic_xor_fetchl_le_mmu helper_atomic_xor_fetchl_le_mmu_armeb
+#define helper_atomic_xor_fetchq_be helper_atomic_xor_fetchq_be_armeb
+#define helper_atomic_xor_fetchq_be_mmu helper_atomic_xor_fetchq_be_mmu_armeb
+#define helper_atomic_xor_fetchq_le helper_atomic_xor_fetchq_le_armeb
+#define helper_atomic_xor_fetchq_le_mmu helper_atomic_xor_fetchq_le_mmu_armeb
+#define helper_atomic_xor_fetchw_be helper_atomic_xor_fetchw_be_armeb
+#define helper_atomic_xor_fetchw_be_mmu helper_atomic_xor_fetchw_be_mmu_armeb
+#define helper_atomic_xor_fetchw_le helper_atomic_xor_fetchw_le_armeb
+#define helper_atomic_xor_fetchw_le_mmu helper_atomic_xor_fetchw_le_mmu_armeb
 #define helper_be_ldl_cmmu helper_be_ldl_cmmu_armeb
 #define helper_be_ldq_cmmu helper_be_ldq_cmmu_armeb
 #define helper_be_ldq_mmu helper_be_ldq_mmu_armeb
@@ -1400,6 +1543,10 @@
 #define helper_crypto_sha256su0 helper_crypto_sha256su0_armeb
 #define helper_crypto_sha256su1 helper_crypto_sha256su1_armeb
 #define helper_dc_zva helper_dc_zva_armeb
+#define helper_div_i32 helper_div_i32_armeb
+#define helper_div_i64 helper_div_i64_armeb
+#define helper_divu_i32 helper_divu_i32_armeb
+#define helper_divu_i64 helper_divu_i64_armeb
 #define helper_double_saturate helper_double_saturate_armeb
 #define helper_exception_internal helper_exception_internal_armeb
 #define helper_exception_return helper_exception_return_armeb
@@ -1532,6 +1679,10 @@
 #define helper_le_stl_mmu helper_le_stl_mmu_armeb
 #define helper_le_stq_mmu helper_le_stq_mmu_armeb
 #define helper_le_stw_mmu helper_le_stw_mmu_armeb
+#define helper_mulsh_i32 helper_mulsh_i32_armeb
+#define helper_mulsh_i64 helper_mulsh_i64_armeb
+#define helper_muluh_i32 helper_muluh_i32_armeb
+#define helper_muluh_i64 helper_muluh_i64_armeb
 #define helper_mrs_banked helper_mrs_banked_armeb
 #define helper_msa_ld_b helper_msa_ld_b_armeb
 #define helper_msa_ld_d helper_msa_ld_d_armeb
@@ -1773,6 +1924,10 @@
 #define helper_recpe_f64 helper_recpe_f64_armeb
 #define helper_recpe_u32 helper_recpe_u32_armeb
 #define helper_recps_f32 helper_recps_f32_armeb
+#define helper_rem_i32 helper_rem_i32_armeb
+#define helper_rem_i64 helper_rem_i64_armeb
+#define helper_remu_i32 helper_remu_i32_armeb
+#define helper_remu_i64 helper_remu_i64_armeb
 #define helper_ret_ldb_cmmu helper_ret_ldb_cmmu_armeb
 #define helper_ret_ldsb_mmu helper_ret_ldsb_mmu_armeb
 #define helper_ret_ldub_mmu helper_ret_ldub_mmu_armeb
@@ -1790,6 +1945,8 @@
 #define helper_sadd8 helper_sadd8_armeb
 #define helper_saddsubx helper_saddsubx_armeb
 #define helper_sar_cc helper_sar_cc_armeb
+#define helper_sar_i32 helper_sar_i32_armeb
+#define helper_sar_i64 helper_sar_i64_armeb
 #define helper_sdiv helper_sdiv_armeb
 #define helper_sel_flags helper_sel_flags_armeb
 #define helper_set_cp_reg helper_set_cp_reg_armeb
@@ -1803,7 +1960,10 @@
 #define helper_shadd8 helper_shadd8_armeb
 #define helper_shaddsubx helper_shaddsubx_armeb
 #define helper_shl_cc helper_shl_cc_armeb
+#define helper_shl_i64 helper_shl_i64_armeb
 #define helper_shr_cc helper_shr_cc_armeb
+#define helper_shr_i32 helper_shr_i32_armeb
+#define helper_shr_i64 helper_shr_i64_armeb
 #define helper_shsub16 helper_shsub16_armeb
 #define helper_shsub8 helper_shsub8_armeb
 #define helper_shsubaddx helper_shsubaddx_armeb
@@ -2756,6 +2916,26 @@
 #define tcg_gen_andc_i64 tcg_gen_andc_i64_armeb
 #define tcg_gen_andi_i32 tcg_gen_andi_i32_armeb
 #define tcg_gen_andi_i64 tcg_gen_andi_i64_armeb
+#define tcg_gen_atomic_add_fetch_i32 tcg_gen_atomic_add_fetch_i32_armeb
+#define tcg_gen_atomic_add_fetch_i64 tcg_gen_atomic_add_fetch_i64_armeb
+#define tcg_gen_atomic_and_fetch_i32 tcg_gen_atomic_and_fetch_i32_armeb
+#define tcg_gen_atomic_and_fetch_i64 tcg_gen_atomic_and_fetch_i64_armeb
+#define tcg_gen_atomic_cmpxchg_i32 tcg_gen_atomic_cmpxchg_i32_armeb
+#define tcg_gen_atomic_cmpxchg_i64 tcg_gen_atomic_cmpxchg_i64_armeb
+#define tcg_gen_atomic_fetch_add_i32 tcg_gen_atomic_fetch_add_i32_armeb
+#define tcg_gen_atomic_fetch_add_i64 tcg_gen_atomic_fetch_add_i64_armeb
+#define tcg_gen_atomic_fetch_and_i32 tcg_gen_atomic_fetch_and_i32_armeb
+#define tcg_gen_atomic_fetch_and_i64 tcg_gen_atomic_fetch_and_i64_armeb
+#define tcg_gen_atomic_fetch_or_i32 tcg_gen_atomic_fetch_or_i32_armeb
+#define tcg_gen_atomic_fetch_or_i64 tcg_gen_atomic_fetch_or_i64_armeb
+#define tcg_gen_atomic_fetch_xor_i32 tcg_gen_atomic_fetch_xor_i32_armeb
+#define tcg_gen_atomic_fetch_xor_i64 tcg_gen_atomic_fetch_xor_i64_armeb
+#define tcg_gen_atomic_or_fetch_i32 tcg_gen_atomic_or_fetch_i32_armeb
+#define tcg_gen_atomic_or_fetch_i64 tcg_gen_atomic_or_fetch_i64_armeb
+#define tcg_gen_atomic_xchg_i32 tcg_gen_atomic_xchg_i32_armeb
+#define tcg_gen_atomic_xchg_i64 tcg_gen_atomic_xchg_i64_armeb
+#define tcg_gen_atomic_xor_fetch_i32 tcg_gen_atomic_xor_fetch_i32_armeb
+#define tcg_gen_atomic_xor_fetch_i64 tcg_gen_atomic_xor_fetch_i64_armeb
 #define tcg_gen_br tcg_gen_br_armeb
 #define tcg_gen_brcond_i32 tcg_gen_brcond_i32_armeb
 #define tcg_gen_brcond_i64 tcg_gen_brcond_i64_armeb

qemu/atomic_template.h

@@ -0,0 +1,177 @@
+/*
+ * Atomic helper templates
+ * Included from tcg-runtime.c and cputlb.c.
+ *
+ * Copyright (c) 2016 Red Hat, Inc
+ *
+ * This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Lesser General Public
+ * License as published by the Free Software Foundation; either
+ * version 2 of the License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public
+ * License along with this library; if not, see <http://www.gnu.org/licenses/>.
+ */
+
+#if DATA_SIZE == 8
+# define SUFFIX     q
+# define DATA_TYPE  uint64_t
+# define BSWAP      bswap64
+#elif DATA_SIZE == 4
+# define SUFFIX     l
+# define DATA_TYPE  uint32_t
+# define BSWAP      bswap32
+#elif DATA_SIZE == 2
+# define SUFFIX     w
+# define DATA_TYPE  uint16_t
+# define BSWAP      bswap16
+#elif DATA_SIZE == 1
+# define SUFFIX     b
+# define DATA_TYPE  uint8_t
+# define BSWAP
+#else
+# error unsupported data size
+#endif
+
+#if DATA_SIZE >= 4
+# define ABI_TYPE  DATA_TYPE
+#else
+# define ABI_TYPE  uint32_t
+#endif
+
+/* Define host-endian atomic operations.  Note that END is used within
+   the ATOMIC_NAME macro, and redefined below.  */
+#if DATA_SIZE == 1
+# define END
+#elif defined(HOST_WORDS_BIGENDIAN)
+# define END  _be
+#else
+# define END  _le
+#endif
+
+ABI_TYPE ATOMIC_NAME(cmpxchg)(CPUArchState *env, target_ulong addr,
+                              ABI_TYPE cmpv, ABI_TYPE newv EXTRA_ARGS)
+{
+    DATA_TYPE *haddr = ATOMIC_MMU_LOOKUP;
+    return atomic_cmpxchg__nocheck(haddr, cmpv, newv);
+}
+
+ABI_TYPE ATOMIC_NAME(xchg)(CPUArchState *env, target_ulong addr,
+                           ABI_TYPE val EXTRA_ARGS)
+{
+    DATA_TYPE *haddr = ATOMIC_MMU_LOOKUP;
+    return atomic_xchg__nocheck(haddr, val);
+}
+
+#define GEN_ATOMIC_HELPER(X)                                        \
+ABI_TYPE ATOMIC_NAME(X)(CPUArchState *env, target_ulong addr,       \
+                 ABI_TYPE val EXTRA_ARGS)                           \
+{                                                                   \
+    DATA_TYPE *haddr = ATOMIC_MMU_LOOKUP;                           \
+    return atomic_##X(haddr, val);                                  \
+}                                                                   \
+
+GEN_ATOMIC_HELPER(fetch_add)
+GEN_ATOMIC_HELPER(fetch_and)
+GEN_ATOMIC_HELPER(fetch_or)
+GEN_ATOMIC_HELPER(fetch_xor)
+GEN_ATOMIC_HELPER(add_fetch)
+GEN_ATOMIC_HELPER(and_fetch)
+GEN_ATOMIC_HELPER(or_fetch)
+GEN_ATOMIC_HELPER(xor_fetch)
+
+#undef GEN_ATOMIC_HELPER
+#undef END
+
+#if DATA_SIZE > 1
+
+/* Define reverse-host-endian atomic operations.  Note that END is used
+   within the ATOMIC_NAME macro.  */
+#ifdef HOST_WORDS_BIGENDIAN
+# define END  _le
+#else
+# define END  _be
+#endif
+
+ABI_TYPE ATOMIC_NAME(cmpxchg)(CPUArchState *env, target_ulong addr,
+                              ABI_TYPE cmpv, ABI_TYPE newv EXTRA_ARGS)
+{
+    DATA_TYPE *haddr = ATOMIC_MMU_LOOKUP;
+    return BSWAP(atomic_cmpxchg__nocheck(haddr, BSWAP(cmpv), BSWAP(newv)));
+}
+
+ABI_TYPE ATOMIC_NAME(xchg)(CPUArchState *env, target_ulong addr,
+                           ABI_TYPE val EXTRA_ARGS)
+{
+    DATA_TYPE *haddr = ATOMIC_MMU_LOOKUP;
+    return BSWAP(atomic_xchg__nocheck(haddr, BSWAP(val)));
+}
+
+#define GEN_ATOMIC_HELPER(X)                                        \
+ABI_TYPE ATOMIC_NAME(X)(CPUArchState *env, target_ulong addr,       \
+                 ABI_TYPE val EXTRA_ARGS)                           \
+{                                                                   \
+    DATA_TYPE *haddr = ATOMIC_MMU_LOOKUP;                           \
+    return BSWAP(atomic_##X(haddr, BSWAP(val)));                    \
+}
+
+GEN_ATOMIC_HELPER(fetch_and)
+GEN_ATOMIC_HELPER(fetch_or)
+GEN_ATOMIC_HELPER(fetch_xor)
+GEN_ATOMIC_HELPER(and_fetch)
+GEN_ATOMIC_HELPER(or_fetch)
+GEN_ATOMIC_HELPER(xor_fetch)
+
+#undef GEN_ATOMIC_HELPER
+
+/* Note that for addition, we need to use a separate cmpxchg loop instead
+   of bswaps for the reverse-host-endian helpers.  */
+ABI_TYPE ATOMIC_NAME(fetch_add)(CPUArchState *env, target_ulong addr,
+                         ABI_TYPE val EXTRA_ARGS)
+{
+    DATA_TYPE *haddr = ATOMIC_MMU_LOOKUP;
+    DATA_TYPE ldo, ldn, ret, sto;
+
+    ldo = atomic_read__nocheck(haddr);
+    while (1) {
+        ret = BSWAP(ldo);
+        sto = BSWAP(ret + val);
+        ldn = atomic_cmpxchg__nocheck(haddr, ldo, sto);
+        if (ldn == ldo) {
+            return ret;
+        }
+        ldo = ldn;
+    }
+}
+
+ABI_TYPE ATOMIC_NAME(add_fetch)(CPUArchState *env, target_ulong addr,
+                         ABI_TYPE val EXTRA_ARGS)
+{
+    DATA_TYPE *haddr = ATOMIC_MMU_LOOKUP;
+    DATA_TYPE ldo, ldn, ret, sto;
+
+    ldo = atomic_read__nocheck(haddr);
+    while (1) {
+        ret = BSWAP(ldo) + val;
+        sto = BSWAP(ret);
+        ldn = atomic_cmpxchg__nocheck(haddr, ldo, sto);
+        if (ldn == ldo) {
+            return ret;
+        }
+        ldo = ldn;
+    }
+}
+
+#undef END
+#endif /* DATA_SIZE > 1 */
+
+#undef BSWAP
+#undef ABI_TYPE
+#undef DATA_TYPE
+#undef SUFFIX
+#undef DATA_SIZE

qemu/cputlb.c

@@ -25,13 +25,13 @@
 #include "exec/memory.h"
 #include "exec/address-spaces.h"
 #include "exec/cpu_ldst.h"
-
 #include "exec/cputlb.h"
-
 #include "exec/memory-internal.h"
 #include "exec/ram_addr.h"
 #include "exec/exec-all.h"
 #include "tcg/tcg.h"
+#include "exec/helper-proto.h"
+#include "qemu/atomic.h"
 
 #include "uc_priv.h"
 
@@ -574,6 +574,69 @@ void probe_write(CPUArchState *env, target_ulong addr, int mmu_idx,
     }
 }
 
+/* Probe for a read-modify-write atomic operation.  Do not allow unaligned
+ * operations, or io operations to proceed.  Return the host address.  */
+static void *atomic_mmu_lookup(CPUArchState *env, target_ulong addr,
+                               TCGMemOpIdx oi, uintptr_t retaddr)
+{
+    size_t mmu_idx = get_mmuidx(oi);
+    size_t index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
+    CPUTLBEntry *tlbe = &env->tlb_table[mmu_idx][index];
+    target_ulong tlb_addr = tlbe->addr_write;
+    TCGMemOp mop = get_memop(oi);
+    int a_bits = get_alignment_bits(mop);
+    int s_bits = mop & MO_SIZE;
+
+    /* Adjust the given return address.  */
+    retaddr -= GETPC_ADJ;
+
+    /* Enforce guest required alignment.  */
+    if (unlikely(a_bits > 0 && (addr & ((1 << a_bits) - 1)))) {
+        /* ??? Maybe indicate atomic op to cpu_unaligned_access */
+        cpu_unaligned_access(ENV_GET_CPU(env), addr, MMU_DATA_STORE,
+                             mmu_idx, retaddr);
+    }
+
+    /* Enforce qemu required alignment.  */
+    if (unlikely(addr & ((1 << s_bits) - 1))) {
+        /* We get here if guest alignment was not requested,
+           or was not enforced by cpu_unaligned_access above.
+           We might widen the access and emulate, but for now
+           mark an exception and exit the cpu loop.  */
+        goto stop_the_world;
+    }
+
+    /* Check TLB entry and enforce page permissions.  */
+    if ((addr & TARGET_PAGE_MASK)
+        != (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) {
+        if (!VICTIM_TLB_HIT(addr_write, addr)) {
+            tlb_fill(ENV_GET_CPU(env), addr, MMU_DATA_STORE, mmu_idx, retaddr);
+        }
+        tlb_addr = tlbe->addr_write;
+    }
+
+    /* Notice an IO access, or a notdirty page.  */
+    if (unlikely(tlb_addr & ~TARGET_PAGE_MASK)) {
+        /* There's really nothing that can be done to
+           support this apart from stop-the-world.  */
+        goto stop_the_world;
+    }
+
+    /* Let the guest notice RMW on a write-only page.  */
+    if (unlikely(tlbe->addr_read != tlb_addr)) {
+        tlb_fill(ENV_GET_CPU(env), addr, MMU_DATA_LOAD, mmu_idx, retaddr);
+        /* Since we don't support reads and writes to different addresses,
+           and we do have the proper page loaded for write, this shouldn't
+           ever return.  But just in case, handle via stop-the-world.  */
+        goto stop_the_world;
+    }
+
+    return (void *)((uintptr_t)addr + tlbe->addend);
+
+ stop_the_world:
+    cpu_loop_exit_atomic(ENV_GET_CPU(env), retaddr);
+}
+
 #ifdef TARGET_WORDS_BIGENDIAN
 # define TGT_BE(X)  (X)
 # define TGT_LE(X)  BSWAP(X)
@@ -595,8 +658,51 @@ void probe_write(CPUArchState *env, target_ulong addr, int mmu_idx,
 
 #define DATA_SIZE 8
 #include "softmmu_template.h"
-#undef MMUSUFFIX
 
+/* First set of helpers allows passing in of OI and RETADDR.  This makes
+   them callable from other helpers.  */
+
+#define EXTRA_ARGS     , TCGMemOpIdx oi, uintptr_t retaddr
+#define ATOMIC_NAME(X) \
+    HELPER(glue(glue(glue(atomic_ ## X, SUFFIX), END), _mmu))
+#define ATOMIC_MMU_LOOKUP  atomic_mmu_lookup(env, addr, oi, retaddr)
+
+#define DATA_SIZE 1
+#include "atomic_template.h"
+
+#define DATA_SIZE 2
+#include "atomic_template.h"
+
+#define DATA_SIZE 4
+#include "atomic_template.h"
+
+#define DATA_SIZE 8
+#include "atomic_template.h"
+
+/* Second set of helpers are directly callable from TCG as helpers.  */
+
+#undef EXTRA_ARGS
+#undef ATOMIC_NAME
+#undef ATOMIC_MMU_LOOKUP
+#define EXTRA_ARGS         , TCGMemOpIdx oi
+#define ATOMIC_NAME(X)     HELPER(glue(glue(atomic_ ## X, SUFFIX), END))
+#define ATOMIC_MMU_LOOKUP  atomic_mmu_lookup(env, addr, oi, GETPC())
+
+#define DATA_SIZE 1
+#include "atomic_template.h"
+
+#define DATA_SIZE 2
+#include "atomic_template.h"
+
+#define DATA_SIZE 4
+#include "atomic_template.h"
+
+#define DATA_SIZE 8
+#include "atomic_template.h"
+
+/* Code access functions.  */
+
+#undef MMUSUFFIX
 #define MMUSUFFIX _cmmu
 #undef GETPC
 #define GETPC() ((uintptr_t)0)

qemu/header_gen.py

@@ -1378,6 +1378,149 @@ symbols = (
     'helper_add_saturate',
     'helper_add_setq',
     'helper_add_usaturate',
+    'helper_atomic_add_fetchb',
+    'helper_atomic_add_fetchb_mmu',
+    'helper_atomic_add_fetchl_be',
+    'helper_atomic_add_fetchl_be_mmu',
+    'helper_atomic_add_fetchl_le',
+    'helper_atomic_add_fetchl_le_mmu',
+    'helper_atomic_add_fetchq_be',
+    'helper_atomic_add_fetchq_be_mmu',
+    'helper_atomic_add_fetchq_le',
+    'helper_atomic_add_fetchq_le_mmu',
+    'helper_atomic_add_fetchw_be',
+    'helper_atomic_add_fetchw_be_mmu',
+    'helper_atomic_add_fetchw_le',
+    'helper_atomic_add_fetchw_le_mmu',
+    'helper_atomic_and_fetchb',
+    'helper_atomic_and_fetchb_le_mmu',
+    'helper_atomic_and_fetchb_mmu',
+    'helper_atomic_and_fetchl_be',
+    'helper_atomic_and_fetchl_be_mmu',
+    'helper_atomic_and_fetchl_le',
+    'helper_atomic_and_fetchl_le_mmu',
+    'helper_atomic_and_fetchq_be',
+    'helper_atomic_and_fetchq_be_mmu',
+    'helper_atomic_and_fetchq_le',
+    'helper_atomic_and_fetchq_le_mmu',
+    'helper_atomic_and_fetchw_be',
+    'helper_atomic_and_fetchw_be_mmu',
+    'helper_atomic_and_fetchw_le',
+    'helper_atomic_and_fetchw_le_mmu',
+    'helper_atomic_cmpxchgb',
+    'helper_atomic_cmpxchgb',
+    'helper_atomic_cmpxchgb_mmu',
+    'helper_atomic_cmpxchgl_be',
+    'helper_atomic_cmpxchgl_be_mmu',
+    'helper_atomic_cmpxchgl_le',
+    'helper_atomic_cmpxchgl_le_mmu',
+    'helper_atomic_cmpxchgq_be',
+    'helper_atomic_cmpxchgq_be_mmu',
+    'helper_atomic_cmpxchgq_le',
+    'helper_atomic_cmpxchgq_le_mmu',
+    'helper_atomic_cmpxchgw_be',
+    'helper_atomic_cmpxchgw_be_mmu',
+    'helper_atomic_cmpxchgw_le',
+    'helper_atomic_cmpxchgw_le_mmu',
+    'helper_atomic_fetch_addb',
+    'helper_atomic_fetch_addb_mmu',
+    'helper_atomic_fetch_addl_be',
+    'helper_atomic_fetch_addl_be_mmu',
+    'helper_atomic_fetch_addl_le',
+    'helper_atomic_fetch_addl_le_mmu',
+    'helper_atomic_fetch_addq_be',
+    'helper_atomic_fetch_addq_be_mmu',
+    'helper_atomic_fetch_addq_le',
+    'helper_atomic_fetch_addq_le_mmu',
+    'helper_atomic_fetch_addw_be',
+    'helper_atomic_fetch_addw_be_mmu',
+    'helper_atomic_fetch_addw_le',
+    'helper_atomic_fetch_addw_le_mmu',
+    'helper_atomic_fetch_andb',
+    'helper_atomic_fetch_andb_mmu',
+    'helper_atomic_fetch_andl_be',
+    'helper_atomic_fetch_andl_be_mmu',
+    'helper_atomic_fetch_andl_le',
+    'helper_atomic_fetch_andl_le_mmu',
+    'helper_atomic_fetch_andq_be',
+    'helper_atomic_fetch_andq_be_mmu',
+    'helper_atomic_fetch_andq_le',
+    'helper_atomic_fetch_andq_le_mmu',
+    'helper_atomic_fetch_andw_be',
+    'helper_atomic_fetch_andw_be_mmu',
+    'helper_atomic_fetch_andw_le',
+    'helper_atomic_fetch_andw_le_mmu',
+    'helper_atomic_fetch_orb',
+    'helper_atomic_fetch_orb_mmu',
+    'helper_atomic_fetch_orl_be',
+    'helper_atomic_fetch_orl_be_mmu',
+    'helper_atomic_fetch_orl_le',
+    'helper_atomic_fetch_orl_le_mmu',
+    'helper_atomic_fetch_orq_be',
+    'helper_atomic_fetch_orq_be_mmu',
+    'helper_atomic_fetch_orq_le',
+    'helper_atomic_fetch_orq_le_mmu',
+    'helper_atomic_fetch_orw_be',
+    'helper_atomic_fetch_orw_be_mmu',
+    'helper_atomic_fetch_orw_le',
+    'helper_atomic_fetch_orw_le_mmu',
+    'helper_atomic_fetch_xorb',
+    'helper_atomic_fetch_xorb_mmu',
+    'helper_atomic_fetch_xorl_be',
+    'helper_atomic_fetch_xorl_be_mmu',
+    'helper_atomic_fetch_xorl_le',
+    'helper_atomic_fetch_xorl_le_mmu',
+    'helper_atomic_fetch_xorq_be',
+    'helper_atomic_fetch_xorq_be_mmu',
+    'helper_atomic_fetch_xorq_le',
+    'helper_atomic_fetch_xorq_le_mmu',
+    'helper_atomic_fetch_xorw_be',
+    'helper_atomic_fetch_xorw_be_mmu',
+    'helper_atomic_fetch_xorw_le',
+    'helper_atomic_fetch_xorw_le_mmu',
+    'helper_atomic_or_fetchb',
+    'helper_atomic_or_fetchb_mmu',
+    'helper_atomic_or_fetchl_be',
+    'helper_atomic_or_fetchl_be_mmu',
+    'helper_atomic_or_fetchl_le',
+    'helper_atomic_or_fetchl_le_mmu',
+    'helper_atomic_or_fetchq_be',
+    'helper_atomic_or_fetchq_be_mmu',
+    'helper_atomic_or_fetchq_le',
+    'helper_atomic_or_fetchq_le_mmu',
+    'helper_atomic_or_fetchw_be',
+    'helper_atomic_or_fetchw_be_mmu',
+    'helper_atomic_or_fetchw_le',
+    'helper_atomic_or_fetchw_le_mmu',
+    'helper_atomic_xchgb',
+    'helper_atomic_xchgb',
+    'helper_atomic_xchgb_mmu',
+    'helper_atomic_xchgl_be',
+    'helper_atomic_xchgl_be_mmu',
+    'helper_atomic_xchgl_le',
+    'helper_atomic_xchgl_le_mmu',
+    'helper_atomic_xchgq_be',
+    'helper_atomic_xchgq_be_mmu',
+    'helper_atomic_xchgq_le',
+    'helper_atomic_xchgq_le_mmu',
+    'helper_atomic_xchgw_be',
+    'helper_atomic_xchgw_be_mmu',
+    'helper_atomic_xchgw_le',
+    'helper_atomic_xchgw_le_mmu',
+    'helper_atomic_xor_fetchb',
+    'helper_atomic_xor_fetchb_mmu',
+    'helper_atomic_xor_fetchl_be',
+    'helper_atomic_xor_fetchl_be_mmu',
+    'helper_atomic_xor_fetchl_le',
+    'helper_atomic_xor_fetchl_le_mmu',
+    'helper_atomic_xor_fetchq_be',
+    'helper_atomic_xor_fetchq_be_mmu',
+    'helper_atomic_xor_fetchq_le',
+    'helper_atomic_xor_fetchq_le_mmu',
+    'helper_atomic_xor_fetchw_be',
+    'helper_atomic_xor_fetchw_be_mmu',
+    'helper_atomic_xor_fetchw_le',
+    'helper_atomic_xor_fetchw_le_mmu',
     'helper_be_ldl_cmmu',
     'helper_be_ldq_cmmu',
     'helper_be_ldq_mmu',
@@ -1406,6 +1549,10 @@ symbols = (
     'helper_crypto_sha256su0',
     'helper_crypto_sha256su1',
     'helper_dc_zva',
+    'helper_div_i32',
+    'helper_div_i64',
+    'helper_divu_i32',
+    'helper_divu_i64',
     'helper_double_saturate',
     'helper_exception_internal',
     'helper_exception_return',
@@ -1538,6 +1685,10 @@ symbols = (
     'helper_le_stl_mmu',
     'helper_le_stq_mmu',
     'helper_le_stw_mmu',
+    'helper_mulsh_i32',
+    'helper_mulsh_i64',
+    'helper_muluh_i32',
+    'helper_muluh_i64',
     'helper_mrs_banked',
     'helper_msa_ld_b',
     'helper_msa_ld_d',
@@ -1779,6 +1930,10 @@ symbols = (
     'helper_recpe_f64',
     'helper_recpe_u32',
     'helper_recps_f32',
+    'helper_rem_i32',
+    'helper_rem_i64',
+    'helper_remu_i32',
+    'helper_remu_i64',
     'helper_ret_ldb_cmmu',
     'helper_ret_ldsb_mmu',
     'helper_ret_ldub_mmu',
@@ -1796,6 +1951,8 @@ symbols = (
     'helper_sadd8',
     'helper_saddsubx',
     'helper_sar_cc',
+    'helper_sar_i32',
+    'helper_sar_i64',
     'helper_sdiv',
     'helper_sel_flags',
     'helper_set_cp_reg',
@@ -1809,7 +1966,10 @@ symbols = (
     'helper_shadd8',
     'helper_shaddsubx',
     'helper_shl_cc',
+    'helper_shl_i64',
     'helper_shr_cc',
+    'helper_shr_i32',
+    'helper_shr_i64',
     'helper_shsub16',
     'helper_shsub8',
     'helper_shsubaddx',
@@ -2762,6 +2922,26 @@ symbols = (
     'tcg_gen_andc_i64',
     'tcg_gen_andi_i32',
     'tcg_gen_andi_i64',
+    'tcg_gen_atomic_add_fetch_i32',
+    'tcg_gen_atomic_add_fetch_i64',
+    'tcg_gen_atomic_and_fetch_i32',
+    'tcg_gen_atomic_and_fetch_i64',
+    'tcg_gen_atomic_cmpxchg_i32',
+    'tcg_gen_atomic_cmpxchg_i64',
+    'tcg_gen_atomic_fetch_add_i32',
+    'tcg_gen_atomic_fetch_add_i64',
+    'tcg_gen_atomic_fetch_and_i32',
+    'tcg_gen_atomic_fetch_and_i64',
+    'tcg_gen_atomic_fetch_or_i32',
+    'tcg_gen_atomic_fetch_or_i64',
+    'tcg_gen_atomic_fetch_xor_i32',
+    'tcg_gen_atomic_fetch_xor_i64',
+    'tcg_gen_atomic_or_fetch_i32',
+    'tcg_gen_atomic_or_fetch_i64',
+    'tcg_gen_atomic_xchg_i32',
+    'tcg_gen_atomic_xchg_i64',
+    'tcg_gen_atomic_xor_fetch_i32',
+    'tcg_gen_atomic_xor_fetch_i64',
     'tcg_gen_br',
     'tcg_gen_brcond_i32',
     'tcg_gen_brcond_i64',

qemu/include/qemu/atomic.h

@@ -26,6 +26,48 @@ void _ReadWriteBarrier(void);
 #define barrier()   ({ asm volatile("" ::: "memory"); (void)0; })
 #endif
 
+/* The variable that receives the old value of an atomically-accessed
+ * variable must be non-qualified, because atomic builtins return values
+ * through a pointer-type argument as in __atomic_load(&var, &old, MODEL).
+ *
+ * This macro has to handle types smaller than int manually, because of
+ * implicit promotion.  int and larger types, as well as pointers, can be
+ * converted to a non-qualified type just by applying a binary operator.
+ */
+#define typeof_strip_qual(expr)                                                    \
+  typeof(                                                                          \
+    __builtin_choose_expr(                                                         \
+      __builtin_types_compatible_p(typeof(expr), bool) ||                          \
+        __builtin_types_compatible_p(typeof(expr), const bool) ||                  \
+        __builtin_types_compatible_p(typeof(expr), volatile bool) ||               \
+        __builtin_types_compatible_p(typeof(expr), const volatile bool),           \
+        (bool)1,                                                                   \
+    __builtin_choose_expr(                                                         \
+      __builtin_types_compatible_p(typeof(expr), signed char) ||                   \
+        __builtin_types_compatible_p(typeof(expr), const signed char) ||           \
+        __builtin_types_compatible_p(typeof(expr), volatile signed char) ||        \
+        __builtin_types_compatible_p(typeof(expr), const volatile signed char),    \
+        (signed char)1,                                                            \
+    __builtin_choose_expr(                                                         \
+      __builtin_types_compatible_p(typeof(expr), unsigned char) ||                 \
+        __builtin_types_compatible_p(typeof(expr), const unsigned char) ||         \
+        __builtin_types_compatible_p(typeof(expr), volatile unsigned char) ||      \
+        __builtin_types_compatible_p(typeof(expr), const volatile unsigned char),  \
+        (unsigned char)1,                                                          \
+    __builtin_choose_expr(                                                         \
+      __builtin_types_compatible_p(typeof(expr), signed short) ||                  \
+        __builtin_types_compatible_p(typeof(expr), const signed short) ||          \
+        __builtin_types_compatible_p(typeof(expr), volatile signed short) ||       \
+        __builtin_types_compatible_p(typeof(expr), const volatile signed short),   \
+        (signed short)1,                                                           \
+    __builtin_choose_expr(                                                         \
+      __builtin_types_compatible_p(typeof(expr), unsigned short) ||                \
+        __builtin_types_compatible_p(typeof(expr), const unsigned short) ||        \
+        __builtin_types_compatible_p(typeof(expr), volatile unsigned short) ||     \
+        __builtin_types_compatible_p(typeof(expr), const volatile unsigned short), \
+        (unsigned short)1,                                                         \
+      (expr)+0))))))
+
 #ifdef __ATOMIC_RELAXED
 /* For C11 atomic ops */
 
@@ -96,7 +138,7 @@ void _ReadWriteBarrier(void);
 #define atomic_rcu_read(ptr)                          \
     ({                                                \
     QEMU_BUILD_BUG_ON(sizeof(*ptr) > sizeof(void *)); \
-    typeof(*ptr) _val;                                \
+    typeof_strip_qual(*ptr) _val;                     \
     atomic_rcu_read__nocheck(ptr, &_val);             \
     _val;                                             \
     })
@@ -109,7 +151,7 @@ void _ReadWriteBarrier(void);
 #define atomic_load_acquire(ptr)                        \
     ({                                                  \
     QEMU_BUILD_BUG_ON(sizeof(*ptr) > sizeof(void *));   \
-    typeof(*ptr) _val;                                  \
+    typeof_strip_qual(*ptr) _val;                       \
     __atomic_load(ptr, &_val, __ATOMIC_ACQUIRE);        \
     _val;                                               \
     })
@@ -132,10 +174,10 @@ void _ReadWriteBarrier(void);
 
 /* Returns the eventual value, failed or not */
 #define atomic_cmpxchg__nocheck(ptr, old, new)    ({                    \
-    ({                                                                  \
+    typeof_strip_qual(*ptr) _old = (old);                               \
-    typeof(*ptr) _old = (old), _new = (new);                            \
     __atomic_compare_exchange_n(ptr, &_old, new, false,                 \
                               __ATOMIC_SEQ_CST, __ATOMIC_SEQ_CST);      \
+    _old;                                                               \
 })
 
 #define atomic_cmpxchg(ptr, old, new)    ({                             \

qemu/m68k.h

@@ -1372,6 +1372,149 @@
 #define helper_add_saturate helper_add_saturate_m68k
 #define helper_add_setq helper_add_setq_m68k
 #define helper_add_usaturate helper_add_usaturate_m68k
+#define helper_atomic_add_fetchb helper_atomic_add_fetchb_m68k
+#define helper_atomic_add_fetchb_mmu helper_atomic_add_fetchb_mmu_m68k
+#define helper_atomic_add_fetchl_be helper_atomic_add_fetchl_be_m68k
+#define helper_atomic_add_fetchl_be_mmu helper_atomic_add_fetchl_be_mmu_m68k
+#define helper_atomic_add_fetchl_le helper_atomic_add_fetchl_le_m68k
+#define helper_atomic_add_fetchl_le_mmu helper_atomic_add_fetchl_le_mmu_m68k
+#define helper_atomic_add_fetchq_be helper_atomic_add_fetchq_be_m68k
+#define helper_atomic_add_fetchq_be_mmu helper_atomic_add_fetchq_be_mmu_m68k
+#define helper_atomic_add_fetchq_le helper_atomic_add_fetchq_le_m68k
+#define helper_atomic_add_fetchq_le_mmu helper_atomic_add_fetchq_le_mmu_m68k
+#define helper_atomic_add_fetchw_be helper_atomic_add_fetchw_be_m68k
+#define helper_atomic_add_fetchw_be_mmu helper_atomic_add_fetchw_be_mmu_m68k
+#define helper_atomic_add_fetchw_le helper_atomic_add_fetchw_le_m68k
+#define helper_atomic_add_fetchw_le_mmu helper_atomic_add_fetchw_le_mmu_m68k
+#define helper_atomic_and_fetchb helper_atomic_and_fetchb_m68k
+#define helper_atomic_and_fetchb_le_mmu helper_atomic_and_fetchb_le_mmu_m68k
+#define helper_atomic_and_fetchb_mmu helper_atomic_and_fetchb_mmu_m68k
+#define helper_atomic_and_fetchl_be helper_atomic_and_fetchl_be_m68k
+#define helper_atomic_and_fetchl_be_mmu helper_atomic_and_fetchl_be_mmu_m68k
+#define helper_atomic_and_fetchl_le helper_atomic_and_fetchl_le_m68k
+#define helper_atomic_and_fetchl_le_mmu helper_atomic_and_fetchl_le_mmu_m68k
+#define helper_atomic_and_fetchq_be helper_atomic_and_fetchq_be_m68k
+#define helper_atomic_and_fetchq_be_mmu helper_atomic_and_fetchq_be_mmu_m68k
+#define helper_atomic_and_fetchq_le helper_atomic_and_fetchq_le_m68k
+#define helper_atomic_and_fetchq_le_mmu helper_atomic_and_fetchq_le_mmu_m68k
+#define helper_atomic_and_fetchw_be helper_atomic_and_fetchw_be_m68k
+#define helper_atomic_and_fetchw_be_mmu helper_atomic_and_fetchw_be_mmu_m68k
+#define helper_atomic_and_fetchw_le helper_atomic_and_fetchw_le_m68k
+#define helper_atomic_and_fetchw_le_mmu helper_atomic_and_fetchw_le_mmu_m68k
+#define helper_atomic_cmpxchgb helper_atomic_cmpxchgb_m68k
+#define helper_atomic_cmpxchgb helper_atomic_cmpxchgb_m68k
+#define helper_atomic_cmpxchgb_mmu helper_atomic_cmpxchgb_mmu_m68k
+#define helper_atomic_cmpxchgl_be helper_atomic_cmpxchgl_be_m68k
+#define helper_atomic_cmpxchgl_be_mmu helper_atomic_cmpxchgl_be_mmu_m68k
+#define helper_atomic_cmpxchgl_le helper_atomic_cmpxchgl_le_m68k
+#define helper_atomic_cmpxchgl_le_mmu helper_atomic_cmpxchgl_le_mmu_m68k
+#define helper_atomic_cmpxchgq_be helper_atomic_cmpxchgq_be_m68k
+#define helper_atomic_cmpxchgq_be_mmu helper_atomic_cmpxchgq_be_mmu_m68k
+#define helper_atomic_cmpxchgq_le helper_atomic_cmpxchgq_le_m68k
+#define helper_atomic_cmpxchgq_le_mmu helper_atomic_cmpxchgq_le_mmu_m68k
+#define helper_atomic_cmpxchgw_be helper_atomic_cmpxchgw_be_m68k
+#define helper_atomic_cmpxchgw_be_mmu helper_atomic_cmpxchgw_be_mmu_m68k
+#define helper_atomic_cmpxchgw_le helper_atomic_cmpxchgw_le_m68k
+#define helper_atomic_cmpxchgw_le_mmu helper_atomic_cmpxchgw_le_mmu_m68k
+#define helper_atomic_fetch_addb helper_atomic_fetch_addb_m68k
+#define helper_atomic_fetch_addb_mmu helper_atomic_fetch_addb_mmu_m68k
+#define helper_atomic_fetch_addl_be helper_atomic_fetch_addl_be_m68k
+#define helper_atomic_fetch_addl_be_mmu helper_atomic_fetch_addl_be_mmu_m68k
+#define helper_atomic_fetch_addl_le helper_atomic_fetch_addl_le_m68k
+#define helper_atomic_fetch_addl_le_mmu helper_atomic_fetch_addl_le_mmu_m68k
+#define helper_atomic_fetch_addq_be helper_atomic_fetch_addq_be_m68k
+#define helper_atomic_fetch_addq_be_mmu helper_atomic_fetch_addq_be_mmu_m68k
+#define helper_atomic_fetch_addq_le helper_atomic_fetch_addq_le_m68k
+#define helper_atomic_fetch_addq_le_mmu helper_atomic_fetch_addq_le_mmu_m68k
+#define helper_atomic_fetch_addw_be helper_atomic_fetch_addw_be_m68k
+#define helper_atomic_fetch_addw_be_mmu helper_atomic_fetch_addw_be_mmu_m68k
+#define helper_atomic_fetch_addw_le helper_atomic_fetch_addw_le_m68k
+#define helper_atomic_fetch_addw_le_mmu helper_atomic_fetch_addw_le_mmu_m68k
+#define helper_atomic_fetch_andb helper_atomic_fetch_andb_m68k
+#define helper_atomic_fetch_andb_mmu helper_atomic_fetch_andb_mmu_m68k
+#define helper_atomic_fetch_andl_be helper_atomic_fetch_andl_be_m68k
+#define helper_atomic_fetch_andl_be_mmu helper_atomic_fetch_andl_be_mmu_m68k
+#define helper_atomic_fetch_andl_le helper_atomic_fetch_andl_le_m68k
+#define helper_atomic_fetch_andl_le_mmu helper_atomic_fetch_andl_le_mmu_m68k
+#define helper_atomic_fetch_andq_be helper_atomic_fetch_andq_be_m68k
+#define helper_atomic_fetch_andq_be_mmu helper_atomic_fetch_andq_be_mmu_m68k
+#define helper_atomic_fetch_andq_le helper_atomic_fetch_andq_le_m68k
+#define helper_atomic_fetch_andq_le_mmu helper_atomic_fetch_andq_le_mmu_m68k
+#define helper_atomic_fetch_andw_be helper_atomic_fetch_andw_be_m68k
+#define helper_atomic_fetch_andw_be_mmu helper_atomic_fetch_andw_be_mmu_m68k
+#define helper_atomic_fetch_andw_le helper_atomic_fetch_andw_le_m68k
+#define helper_atomic_fetch_andw_le_mmu helper_atomic_fetch_andw_le_mmu_m68k
+#define helper_atomic_fetch_orb helper_atomic_fetch_orb_m68k
+#define helper_atomic_fetch_orb_mmu helper_atomic_fetch_orb_mmu_m68k
+#define helper_atomic_fetch_orl_be helper_atomic_fetch_orl_be_m68k
+#define helper_atomic_fetch_orl_be_mmu helper_atomic_fetch_orl_be_mmu_m68k
+#define helper_atomic_fetch_orl_le helper_atomic_fetch_orl_le_m68k
+#define helper_atomic_fetch_orl_le_mmu helper_atomic_fetch_orl_le_mmu_m68k
+#define helper_atomic_fetch_orq_be helper_atomic_fetch_orq_be_m68k
+#define helper_atomic_fetch_orq_be_mmu helper_atomic_fetch_orq_be_mmu_m68k
+#define helper_atomic_fetch_orq_le helper_atomic_fetch_orq_le_m68k
+#define helper_atomic_fetch_orq_le_mmu helper_atomic_fetch_orq_le_mmu_m68k
+#define helper_atomic_fetch_orw_be helper_atomic_fetch_orw_be_m68k
+#define helper_atomic_fetch_orw_be_mmu helper_atomic_fetch_orw_be_mmu_m68k
+#define helper_atomic_fetch_orw_le helper_atomic_fetch_orw_le_m68k
+#define helper_atomic_fetch_orw_le_mmu helper_atomic_fetch_orw_le_mmu_m68k
+#define helper_atomic_fetch_xorb helper_atomic_fetch_xorb_m68k
+#define helper_atomic_fetch_xorb_mmu helper_atomic_fetch_xorb_mmu_m68k
+#define helper_atomic_fetch_xorl_be helper_atomic_fetch_xorl_be_m68k
+#define helper_atomic_fetch_xorl_be_mmu helper_atomic_fetch_xorl_be_mmu_m68k
+#define helper_atomic_fetch_xorl_le helper_atomic_fetch_xorl_le_m68k
+#define helper_atomic_fetch_xorl_le_mmu helper_atomic_fetch_xorl_le_mmu_m68k
+#define helper_atomic_fetch_xorq_be helper_atomic_fetch_xorq_be_m68k
+#define helper_atomic_fetch_xorq_be_mmu helper_atomic_fetch_xorq_be_mmu_m68k
+#define helper_atomic_fetch_xorq_le helper_atomic_fetch_xorq_le_m68k
+#define helper_atomic_fetch_xorq_le_mmu helper_atomic_fetch_xorq_le_mmu_m68k
+#define helper_atomic_fetch_xorw_be helper_atomic_fetch_xorw_be_m68k
+#define helper_atomic_fetch_xorw_be_mmu helper_atomic_fetch_xorw_be_mmu_m68k
+#define helper_atomic_fetch_xorw_le helper_atomic_fetch_xorw_le_m68k
+#define helper_atomic_fetch_xorw_le_mmu helper_atomic_fetch_xorw_le_mmu_m68k
+#define helper_atomic_or_fetchb helper_atomic_or_fetchb_m68k
+#define helper_atomic_or_fetchb_mmu helper_atomic_or_fetchb_mmu_m68k
+#define helper_atomic_or_fetchl_be helper_atomic_or_fetchl_be_m68k
+#define helper_atomic_or_fetchl_be_mmu helper_atomic_or_fetchl_be_mmu_m68k
+#define helper_atomic_or_fetchl_le helper_atomic_or_fetchl_le_m68k
+#define helper_atomic_or_fetchl_le_mmu helper_atomic_or_fetchl_le_mmu_m68k
+#define helper_atomic_or_fetchq_be helper_atomic_or_fetchq_be_m68k
+#define helper_atomic_or_fetchq_be_mmu helper_atomic_or_fetchq_be_mmu_m68k
+#define helper_atomic_or_fetchq_le helper_atomic_or_fetchq_le_m68k
+#define helper_atomic_or_fetchq_le_mmu helper_atomic_or_fetchq_le_mmu_m68k
+#define helper_atomic_or_fetchw_be helper_atomic_or_fetchw_be_m68k
+#define helper_atomic_or_fetchw_be_mmu helper_atomic_or_fetchw_be_mmu_m68k
+#define helper_atomic_or_fetchw_le helper_atomic_or_fetchw_le_m68k
+#define helper_atomic_or_fetchw_le_mmu helper_atomic_or_fetchw_le_mmu_m68k
+#define helper_atomic_xchgb helper_atomic_xchgb_m68k
+#define helper_atomic_xchgb helper_atomic_xchgb_m68k
+#define helper_atomic_xchgb_mmu helper_atomic_xchgb_mmu_m68k
+#define helper_atomic_xchgl_be helper_atomic_xchgl_be_m68k
+#define helper_atomic_xchgl_be_mmu helper_atomic_xchgl_be_mmu_m68k
+#define helper_atomic_xchgl_le helper_atomic_xchgl_le_m68k
+#define helper_atomic_xchgl_le_mmu helper_atomic_xchgl_le_mmu_m68k
+#define helper_atomic_xchgq_be helper_atomic_xchgq_be_m68k
+#define helper_atomic_xchgq_be_mmu helper_atomic_xchgq_be_mmu_m68k
+#define helper_atomic_xchgq_le helper_atomic_xchgq_le_m68k
+#define helper_atomic_xchgq_le_mmu helper_atomic_xchgq_le_mmu_m68k
+#define helper_atomic_xchgw_be helper_atomic_xchgw_be_m68k
+#define helper_atomic_xchgw_be_mmu helper_atomic_xchgw_be_mmu_m68k
+#define helper_atomic_xchgw_le helper_atomic_xchgw_le_m68k
+#define helper_atomic_xchgw_le_mmu helper_atomic_xchgw_le_mmu_m68k
+#define helper_atomic_xor_fetchb helper_atomic_xor_fetchb_m68k
+#define helper_atomic_xor_fetchb_mmu helper_atomic_xor_fetchb_mmu_m68k
+#define helper_atomic_xor_fetchl_be helper_atomic_xor_fetchl_be_m68k
+#define helper_atomic_xor_fetchl_be_mmu helper_atomic_xor_fetchl_be_mmu_m68k
+#define helper_atomic_xor_fetchl_le helper_atomic_xor_fetchl_le_m68k
+#define helper_atomic_xor_fetchl_le_mmu helper_atomic_xor_fetchl_le_mmu_m68k
+#define helper_atomic_xor_fetchq_be helper_atomic_xor_fetchq_be_m68k
+#define helper_atomic_xor_fetchq_be_mmu helper_atomic_xor_fetchq_be_mmu_m68k
+#define helper_atomic_xor_fetchq_le helper_atomic_xor_fetchq_le_m68k
+#define helper_atomic_xor_fetchq_le_mmu helper_atomic_xor_fetchq_le_mmu_m68k
+#define helper_atomic_xor_fetchw_be helper_atomic_xor_fetchw_be_m68k
+#define helper_atomic_xor_fetchw_be_mmu helper_atomic_xor_fetchw_be_mmu_m68k
+#define helper_atomic_xor_fetchw_le helper_atomic_xor_fetchw_le_m68k
+#define helper_atomic_xor_fetchw_le_mmu helper_atomic_xor_fetchw_le_mmu_m68k
 #define helper_be_ldl_cmmu helper_be_ldl_cmmu_m68k
 #define helper_be_ldq_cmmu helper_be_ldq_cmmu_m68k
 #define helper_be_ldq_mmu helper_be_ldq_mmu_m68k
@@ -1400,6 +1543,10 @@
 #define helper_crypto_sha256su0 helper_crypto_sha256su0_m68k
 #define helper_crypto_sha256su1 helper_crypto_sha256su1_m68k
 #define helper_dc_zva helper_dc_zva_m68k
+#define helper_div_i32 helper_div_i32_m68k
+#define helper_div_i64 helper_div_i64_m68k
+#define helper_divu_i32 helper_divu_i32_m68k
+#define helper_divu_i64 helper_divu_i64_m68k
 #define helper_double_saturate helper_double_saturate_m68k
 #define helper_exception_internal helper_exception_internal_m68k
 #define helper_exception_return helper_exception_return_m68k
@@ -1532,6 +1679,10 @@
 #define helper_le_stl_mmu helper_le_stl_mmu_m68k
 #define helper_le_stq_mmu helper_le_stq_mmu_m68k
 #define helper_le_stw_mmu helper_le_stw_mmu_m68k
+#define helper_mulsh_i32 helper_mulsh_i32_m68k
+#define helper_mulsh_i64 helper_mulsh_i64_m68k
+#define helper_muluh_i32 helper_muluh_i32_m68k
+#define helper_muluh_i64 helper_muluh_i64_m68k
 #define helper_mrs_banked helper_mrs_banked_m68k
 #define helper_msa_ld_b helper_msa_ld_b_m68k
 #define helper_msa_ld_d helper_msa_ld_d_m68k
@@ -1773,6 +1924,10 @@
 #define helper_recpe_f64 helper_recpe_f64_m68k
 #define helper_recpe_u32 helper_recpe_u32_m68k
 #define helper_recps_f32 helper_recps_f32_m68k
+#define helper_rem_i32 helper_rem_i32_m68k
+#define helper_rem_i64 helper_rem_i64_m68k
+#define helper_remu_i32 helper_remu_i32_m68k
+#define helper_remu_i64 helper_remu_i64_m68k
 #define helper_ret_ldb_cmmu helper_ret_ldb_cmmu_m68k
 #define helper_ret_ldsb_mmu helper_ret_ldsb_mmu_m68k
 #define helper_ret_ldub_mmu helper_ret_ldub_mmu_m68k
@@ -1790,6 +1945,8 @@
 #define helper_sadd8 helper_sadd8_m68k
 #define helper_saddsubx helper_saddsubx_m68k
 #define helper_sar_cc helper_sar_cc_m68k
+#define helper_sar_i32 helper_sar_i32_m68k
+#define helper_sar_i64 helper_sar_i64_m68k
 #define helper_sdiv helper_sdiv_m68k
 #define helper_sel_flags helper_sel_flags_m68k
 #define helper_set_cp_reg helper_set_cp_reg_m68k
@@ -1803,7 +1960,10 @@
 #define helper_shadd8 helper_shadd8_m68k
 #define helper_shaddsubx helper_shaddsubx_m68k
 #define helper_shl_cc helper_shl_cc_m68k
+#define helper_shl_i64 helper_shl_i64_m68k
 #define helper_shr_cc helper_shr_cc_m68k
+#define helper_shr_i32 helper_shr_i32_m68k
+#define helper_shr_i64 helper_shr_i64_m68k
 #define helper_shsub16 helper_shsub16_m68k
 #define helper_shsub8 helper_shsub8_m68k
 #define helper_shsubaddx helper_shsubaddx_m68k
@@ -2756,6 +2916,26 @@
 #define tcg_gen_andc_i64 tcg_gen_andc_i64_m68k
 #define tcg_gen_andi_i32 tcg_gen_andi_i32_m68k
 #define tcg_gen_andi_i64 tcg_gen_andi_i64_m68k
+#define tcg_gen_atomic_add_fetch_i32 tcg_gen_atomic_add_fetch_i32_m68k
+#define tcg_gen_atomic_add_fetch_i64 tcg_gen_atomic_add_fetch_i64_m68k
+#define tcg_gen_atomic_and_fetch_i32 tcg_gen_atomic_and_fetch_i32_m68k
+#define tcg_gen_atomic_and_fetch_i64 tcg_gen_atomic_and_fetch_i64_m68k
+#define tcg_gen_atomic_cmpxchg_i32 tcg_gen_atomic_cmpxchg_i32_m68k
+#define tcg_gen_atomic_cmpxchg_i64 tcg_gen_atomic_cmpxchg_i64_m68k
+#define tcg_gen_atomic_fetch_add_i32 tcg_gen_atomic_fetch_add_i32_m68k
+#define tcg_gen_atomic_fetch_add_i64 tcg_gen_atomic_fetch_add_i64_m68k
+#define tcg_gen_atomic_fetch_and_i32 tcg_gen_atomic_fetch_and_i32_m68k
+#define tcg_gen_atomic_fetch_and_i64 tcg_gen_atomic_fetch_and_i64_m68k
+#define tcg_gen_atomic_fetch_or_i32 tcg_gen_atomic_fetch_or_i32_m68k
+#define tcg_gen_atomic_fetch_or_i64 tcg_gen_atomic_fetch_or_i64_m68k
+#define tcg_gen_atomic_fetch_xor_i32 tcg_gen_atomic_fetch_xor_i32_m68k
+#define tcg_gen_atomic_fetch_xor_i64 tcg_gen_atomic_fetch_xor_i64_m68k
+#define tcg_gen_atomic_or_fetch_i32 tcg_gen_atomic_or_fetch_i32_m68k
+#define tcg_gen_atomic_or_fetch_i64 tcg_gen_atomic_or_fetch_i64_m68k
+#define tcg_gen_atomic_xchg_i32 tcg_gen_atomic_xchg_i32_m68k
+#define tcg_gen_atomic_xchg_i64 tcg_gen_atomic_xchg_i64_m68k
+#define tcg_gen_atomic_xor_fetch_i32 tcg_gen_atomic_xor_fetch_i32_m68k
+#define tcg_gen_atomic_xor_fetch_i64 tcg_gen_atomic_xor_fetch_i64_m68k
 #define tcg_gen_br tcg_gen_br_m68k
 #define tcg_gen_brcond_i32 tcg_gen_brcond_i32_m68k
 #define tcg_gen_brcond_i64 tcg_gen_brcond_i64_m68k

qemu/mips.h

@@ -1372,6 +1372,149 @@
 #define helper_add_saturate helper_add_saturate_mips
 #define helper_add_setq helper_add_setq_mips
 #define helper_add_usaturate helper_add_usaturate_mips
+#define helper_atomic_add_fetchb helper_atomic_add_fetchb_mips
+#define helper_atomic_add_fetchb_mmu helper_atomic_add_fetchb_mmu_mips
+#define helper_atomic_add_fetchl_be helper_atomic_add_fetchl_be_mips
+#define helper_atomic_add_fetchl_be_mmu helper_atomic_add_fetchl_be_mmu_mips
+#define helper_atomic_add_fetchl_le helper_atomic_add_fetchl_le_mips
+#define helper_atomic_add_fetchl_le_mmu helper_atomic_add_fetchl_le_mmu_mips
+#define helper_atomic_add_fetchq_be helper_atomic_add_fetchq_be_mips
+#define helper_atomic_add_fetchq_be_mmu helper_atomic_add_fetchq_be_mmu_mips
+#define helper_atomic_add_fetchq_le helper_atomic_add_fetchq_le_mips
+#define helper_atomic_add_fetchq_le_mmu helper_atomic_add_fetchq_le_mmu_mips
+#define helper_atomic_add_fetchw_be helper_atomic_add_fetchw_be_mips
+#define helper_atomic_add_fetchw_be_mmu helper_atomic_add_fetchw_be_mmu_mips
+#define helper_atomic_add_fetchw_le helper_atomic_add_fetchw_le_mips
+#define helper_atomic_add_fetchw_le_mmu helper_atomic_add_fetchw_le_mmu_mips
+#define helper_atomic_and_fetchb helper_atomic_and_fetchb_mips
+#define helper_atomic_and_fetchb_le_mmu helper_atomic_and_fetchb_le_mmu_mips
+#define helper_atomic_and_fetchb_mmu helper_atomic_and_fetchb_mmu_mips
+#define helper_atomic_and_fetchl_be helper_atomic_and_fetchl_be_mips
+#define helper_atomic_and_fetchl_be_mmu helper_atomic_and_fetchl_be_mmu_mips
+#define helper_atomic_and_fetchl_le helper_atomic_and_fetchl_le_mips
+#define helper_atomic_and_fetchl_le_mmu helper_atomic_and_fetchl_le_mmu_mips
+#define helper_atomic_and_fetchq_be helper_atomic_and_fetchq_be_mips
+#define helper_atomic_and_fetchq_be_mmu helper_atomic_and_fetchq_be_mmu_mips
+#define helper_atomic_and_fetchq_le helper_atomic_and_fetchq_le_mips
+#define helper_atomic_and_fetchq_le_mmu helper_atomic_and_fetchq_le_mmu_mips
+#define helper_atomic_and_fetchw_be helper_atomic_and_fetchw_be_mips
+#define helper_atomic_and_fetchw_be_mmu helper_atomic_and_fetchw_be_mmu_mips
+#define helper_atomic_and_fetchw_le helper_atomic_and_fetchw_le_mips
+#define helper_atomic_and_fetchw_le_mmu helper_atomic_and_fetchw_le_mmu_mips
+#define helper_atomic_cmpxchgb helper_atomic_cmpxchgb_mips
+#define helper_atomic_cmpxchgb helper_atomic_cmpxchgb_mips
+#define helper_atomic_cmpxchgb_mmu helper_atomic_cmpxchgb_mmu_mips
+#define helper_atomic_cmpxchgl_be helper_atomic_cmpxchgl_be_mips
+#define helper_atomic_cmpxchgl_be_mmu helper_atomic_cmpxchgl_be_mmu_mips
+#define helper_atomic_cmpxchgl_le helper_atomic_cmpxchgl_le_mips
+#define helper_atomic_cmpxchgl_le_mmu helper_atomic_cmpxchgl_le_mmu_mips
+#define helper_atomic_cmpxchgq_be helper_atomic_cmpxchgq_be_mips
+#define helper_atomic_cmpxchgq_be_mmu helper_atomic_cmpxchgq_be_mmu_mips
+#define helper_atomic_cmpxchgq_le helper_atomic_cmpxchgq_le_mips
+#define helper_atomic_cmpxchgq_le_mmu helper_atomic_cmpxchgq_le_mmu_mips
+#define helper_atomic_cmpxchgw_be helper_atomic_cmpxchgw_be_mips
+#define helper_atomic_cmpxchgw_be_mmu helper_atomic_cmpxchgw_be_mmu_mips
+#define helper_atomic_cmpxchgw_le helper_atomic_cmpxchgw_le_mips
+#define helper_atomic_cmpxchgw_le_mmu helper_atomic_cmpxchgw_le_mmu_mips
+#define helper_atomic_fetch_addb helper_atomic_fetch_addb_mips
+#define helper_atomic_fetch_addb_mmu helper_atomic_fetch_addb_mmu_mips
+#define helper_atomic_fetch_addl_be helper_atomic_fetch_addl_be_mips
+#define helper_atomic_fetch_addl_be_mmu helper_atomic_fetch_addl_be_mmu_mips
+#define helper_atomic_fetch_addl_le helper_atomic_fetch_addl_le_mips
+#define helper_atomic_fetch_addl_le_mmu helper_atomic_fetch_addl_le_mmu_mips
+#define helper_atomic_fetch_addq_be helper_atomic_fetch_addq_be_mips
+#define helper_atomic_fetch_addq_be_mmu helper_atomic_fetch_addq_be_mmu_mips
+#define helper_atomic_fetch_addq_le helper_atomic_fetch_addq_le_mips
+#define helper_atomic_fetch_addq_le_mmu helper_atomic_fetch_addq_le_mmu_mips
+#define helper_atomic_fetch_addw_be helper_atomic_fetch_addw_be_mips
+#define helper_atomic_fetch_addw_be_mmu helper_atomic_fetch_addw_be_mmu_mips
+#define helper_atomic_fetch_addw_le helper_atomic_fetch_addw_le_mips
+#define helper_atomic_fetch_addw_le_mmu helper_atomic_fetch_addw_le_mmu_mips
+#define helper_atomic_fetch_andb helper_atomic_fetch_andb_mips
+#define helper_atomic_fetch_andb_mmu helper_atomic_fetch_andb_mmu_mips
+#define helper_atomic_fetch_andl_be helper_atomic_fetch_andl_be_mips
+#define helper_atomic_fetch_andl_be_mmu helper_atomic_fetch_andl_be_mmu_mips
+#define helper_atomic_fetch_andl_le helper_atomic_fetch_andl_le_mips
+#define helper_atomic_fetch_andl_le_mmu helper_atomic_fetch_andl_le_mmu_mips
+#define helper_atomic_fetch_andq_be helper_atomic_fetch_andq_be_mips
+#define helper_atomic_fetch_andq_be_mmu helper_atomic_fetch_andq_be_mmu_mips
+#define helper_atomic_fetch_andq_le helper_atomic_fetch_andq_le_mips
+#define helper_atomic_fetch_andq_le_mmu helper_atomic_fetch_andq_le_mmu_mips
+#define helper_atomic_fetch_andw_be helper_atomic_fetch_andw_be_mips
+#define helper_atomic_fetch_andw_be_mmu helper_atomic_fetch_andw_be_mmu_mips
+#define helper_atomic_fetch_andw_le helper_atomic_fetch_andw_le_mips
+#define helper_atomic_fetch_andw_le_mmu helper_atomic_fetch_andw_le_mmu_mips
+#define helper_atomic_fetch_orb helper_atomic_fetch_orb_mips
+#define helper_atomic_fetch_orb_mmu helper_atomic_fetch_orb_mmu_mips
+#define helper_atomic_fetch_orl_be helper_atomic_fetch_orl_be_mips
+#define helper_atomic_fetch_orl_be_mmu helper_atomic_fetch_orl_be_mmu_mips
+#define helper_atomic_fetch_orl_le helper_atomic_fetch_orl_le_mips
+#define helper_atomic_fetch_orl_le_mmu helper_atomic_fetch_orl_le_mmu_mips
+#define helper_atomic_fetch_orq_be helper_atomic_fetch_orq_be_mips
+#define helper_atomic_fetch_orq_be_mmu helper_atomic_fetch_orq_be_mmu_mips
+#define helper_atomic_fetch_orq_le helper_atomic_fetch_orq_le_mips
+#define helper_atomic_fetch_orq_le_mmu helper_atomic_fetch_orq_le_mmu_mips
+#define helper_atomic_fetch_orw_be helper_atomic_fetch_orw_be_mips
+#define helper_atomic_fetch_orw_be_mmu helper_atomic_fetch_orw_be_mmu_mips
+#define helper_atomic_fetch_orw_le helper_atomic_fetch_orw_le_mips
+#define helper_atomic_fetch_orw_le_mmu helper_atomic_fetch_orw_le_mmu_mips
+#define helper_atomic_fetch_xorb helper_atomic_fetch_xorb_mips
+#define helper_atomic_fetch_xorb_mmu helper_atomic_fetch_xorb_mmu_mips
+#define helper_atomic_fetch_xorl_be helper_atomic_fetch_xorl_be_mips
+#define helper_atomic_fetch_xorl_be_mmu helper_atomic_fetch_xorl_be_mmu_mips
+#define helper_atomic_fetch_xorl_le helper_atomic_fetch_xorl_le_mips
+#define helper_atomic_fetch_xorl_le_mmu helper_atomic_fetch_xorl_le_mmu_mips
+#define helper_atomic_fetch_xorq_be helper_atomic_fetch_xorq_be_mips
+#define helper_atomic_fetch_xorq_be_mmu helper_atomic_fetch_xorq_be_mmu_mips
+#define helper_atomic_fetch_xorq_le helper_atomic_fetch_xorq_le_mips
+#define helper_atomic_fetch_xorq_le_mmu helper_atomic_fetch_xorq_le_mmu_mips
+#define helper_atomic_fetch_xorw_be helper_atomic_fetch_xorw_be_mips
+#define helper_atomic_fetch_xorw_be_mmu helper_atomic_fetch_xorw_be_mmu_mips
+#define helper_atomic_fetch_xorw_le helper_atomic_fetch_xorw_le_mips
+#define helper_atomic_fetch_xorw_le_mmu helper_atomic_fetch_xorw_le_mmu_mips
+#define helper_atomic_or_fetchb helper_atomic_or_fetchb_mips
+#define helper_atomic_or_fetchb_mmu helper_atomic_or_fetchb_mmu_mips
+#define helper_atomic_or_fetchl_be helper_atomic_or_fetchl_be_mips
+#define helper_atomic_or_fetchl_be_mmu helper_atomic_or_fetchl_be_mmu_mips
+#define helper_atomic_or_fetchl_le helper_atomic_or_fetchl_le_mips
+#define helper_atomic_or_fetchl_le_mmu helper_atomic_or_fetchl_le_mmu_mips
+#define helper_atomic_or_fetchq_be helper_atomic_or_fetchq_be_mips
+#define helper_atomic_or_fetchq_be_mmu helper_atomic_or_fetchq_be_mmu_mips
+#define helper_atomic_or_fetchq_le helper_atomic_or_fetchq_le_mips
+#define helper_atomic_or_fetchq_le_mmu helper_atomic_or_fetchq_le_mmu_mips
+#define helper_atomic_or_fetchw_be helper_atomic_or_fetchw_be_mips
+#define helper_atomic_or_fetchw_be_mmu helper_atomic_or_fetchw_be_mmu_mips
+#define helper_atomic_or_fetchw_le helper_atomic_or_fetchw_le_mips
+#define helper_atomic_or_fetchw_le_mmu helper_atomic_or_fetchw_le_mmu_mips
+#define helper_atomic_xchgb helper_atomic_xchgb_mips
+#define helper_atomic_xchgb helper_atomic_xchgb_mips
+#define helper_atomic_xchgb_mmu helper_atomic_xchgb_mmu_mips
+#define helper_atomic_xchgl_be helper_atomic_xchgl_be_mips
+#define helper_atomic_xchgl_be_mmu helper_atomic_xchgl_be_mmu_mips
+#define helper_atomic_xchgl_le helper_atomic_xchgl_le_mips
+#define helper_atomic_xchgl_le_mmu helper_atomic_xchgl_le_mmu_mips
+#define helper_atomic_xchgq_be helper_atomic_xchgq_be_mips
+#define helper_atomic_xchgq_be_mmu helper_atomic_xchgq_be_mmu_mips
+#define helper_atomic_xchgq_le helper_atomic_xchgq_le_mips
+#define helper_atomic_xchgq_le_mmu helper_atomic_xchgq_le_mmu_mips
+#define helper_atomic_xchgw_be helper_atomic_xchgw_be_mips
+#define helper_atomic_xchgw_be_mmu helper_atomic_xchgw_be_mmu_mips
+#define helper_atomic_xchgw_le helper_atomic_xchgw_le_mips
+#define helper_atomic_xchgw_le_mmu helper_atomic_xchgw_le_mmu_mips
+#define helper_atomic_xor_fetchb helper_atomic_xor_fetchb_mips
+#define helper_atomic_xor_fetchb_mmu helper_atomic_xor_fetchb_mmu_mips
+#define helper_atomic_xor_fetchl_be helper_atomic_xor_fetchl_be_mips
+#define helper_atomic_xor_fetchl_be_mmu helper_atomic_xor_fetchl_be_mmu_mips
+#define helper_atomic_xor_fetchl_le helper_atomic_xor_fetchl_le_mips
+#define helper_atomic_xor_fetchl_le_mmu helper_atomic_xor_fetchl_le_mmu_mips
+#define helper_atomic_xor_fetchq_be helper_atomic_xor_fetchq_be_mips
+#define helper_atomic_xor_fetchq_be_mmu helper_atomic_xor_fetchq_be_mmu_mips
+#define helper_atomic_xor_fetchq_le helper_atomic_xor_fetchq_le_mips
+#define helper_atomic_xor_fetchq_le_mmu helper_atomic_xor_fetchq_le_mmu_mips
+#define helper_atomic_xor_fetchw_be helper_atomic_xor_fetchw_be_mips
+#define helper_atomic_xor_fetchw_be_mmu helper_atomic_xor_fetchw_be_mmu_mips
+#define helper_atomic_xor_fetchw_le helper_atomic_xor_fetchw_le_mips
+#define helper_atomic_xor_fetchw_le_mmu helper_atomic_xor_fetchw_le_mmu_mips
 #define helper_be_ldl_cmmu helper_be_ldl_cmmu_mips
 #define helper_be_ldq_cmmu helper_be_ldq_cmmu_mips
 #define helper_be_ldq_mmu helper_be_ldq_mmu_mips
@@ -1400,6 +1543,10 @@
 #define helper_crypto_sha256su0 helper_crypto_sha256su0_mips
 #define helper_crypto_sha256su1 helper_crypto_sha256su1_mips
 #define helper_dc_zva helper_dc_zva_mips
+#define helper_div_i32 helper_div_i32_mips
+#define helper_div_i64 helper_div_i64_mips
+#define helper_divu_i32 helper_divu_i32_mips
+#define helper_divu_i64 helper_divu_i64_mips
 #define helper_double_saturate helper_double_saturate_mips
 #define helper_exception_internal helper_exception_internal_mips
 #define helper_exception_return helper_exception_return_mips
@@ -1532,6 +1679,10 @@
 #define helper_le_stl_mmu helper_le_stl_mmu_mips
 #define helper_le_stq_mmu helper_le_stq_mmu_mips
 #define helper_le_stw_mmu helper_le_stw_mmu_mips
+#define helper_mulsh_i32 helper_mulsh_i32_mips
+#define helper_mulsh_i64 helper_mulsh_i64_mips
+#define helper_muluh_i32 helper_muluh_i32_mips
+#define helper_muluh_i64 helper_muluh_i64_mips
 #define helper_mrs_banked helper_mrs_banked_mips
 #define helper_msa_ld_b helper_msa_ld_b_mips
 #define helper_msa_ld_d helper_msa_ld_d_mips
@@ -1773,6 +1924,10 @@
 #define helper_recpe_f64 helper_recpe_f64_mips
 #define helper_recpe_u32 helper_recpe_u32_mips
 #define helper_recps_f32 helper_recps_f32_mips
+#define helper_rem_i32 helper_rem_i32_mips
+#define helper_rem_i64 helper_rem_i64_mips
+#define helper_remu_i32 helper_remu_i32_mips
+#define helper_remu_i64 helper_remu_i64_mips
 #define helper_ret_ldb_cmmu helper_ret_ldb_cmmu_mips
 #define helper_ret_ldsb_mmu helper_ret_ldsb_mmu_mips
 #define helper_ret_ldub_mmu helper_ret_ldub_mmu_mips
@@ -1790,6 +1945,8 @@
 #define helper_sadd8 helper_sadd8_mips
 #define helper_saddsubx helper_saddsubx_mips
 #define helper_sar_cc helper_sar_cc_mips
+#define helper_sar_i32 helper_sar_i32_mips
+#define helper_sar_i64 helper_sar_i64_mips
 #define helper_sdiv helper_sdiv_mips
 #define helper_sel_flags helper_sel_flags_mips
 #define helper_set_cp_reg helper_set_cp_reg_mips
@@ -1803,7 +1960,10 @@
 #define helper_shadd8 helper_shadd8_mips
 #define helper_shaddsubx helper_shaddsubx_mips
 #define helper_shl_cc helper_shl_cc_mips
+#define helper_shl_i64 helper_shl_i64_mips
 #define helper_shr_cc helper_shr_cc_mips
+#define helper_shr_i32 helper_shr_i32_mips
+#define helper_shr_i64 helper_shr_i64_mips
 #define helper_shsub16 helper_shsub16_mips
 #define helper_shsub8 helper_shsub8_mips
 #define helper_shsubaddx helper_shsubaddx_mips
@@ -2756,6 +2916,26 @@
 #define tcg_gen_andc_i64 tcg_gen_andc_i64_mips
 #define tcg_gen_andi_i32 tcg_gen_andi_i32_mips
 #define tcg_gen_andi_i64 tcg_gen_andi_i64_mips
+#define tcg_gen_atomic_add_fetch_i32 tcg_gen_atomic_add_fetch_i32_mips
+#define tcg_gen_atomic_add_fetch_i64 tcg_gen_atomic_add_fetch_i64_mips
+#define tcg_gen_atomic_and_fetch_i32 tcg_gen_atomic_and_fetch_i32_mips
+#define tcg_gen_atomic_and_fetch_i64 tcg_gen_atomic_and_fetch_i64_mips
+#define tcg_gen_atomic_cmpxchg_i32 tcg_gen_atomic_cmpxchg_i32_mips
+#define tcg_gen_atomic_cmpxchg_i64 tcg_gen_atomic_cmpxchg_i64_mips
+#define tcg_gen_atomic_fetch_add_i32 tcg_gen_atomic_fetch_add_i32_mips
+#define tcg_gen_atomic_fetch_add_i64 tcg_gen_atomic_fetch_add_i64_mips
+#define tcg_gen_atomic_fetch_and_i32 tcg_gen_atomic_fetch_and_i32_mips
+#define tcg_gen_atomic_fetch_and_i64 tcg_gen_atomic_fetch_and_i64_mips
+#define tcg_gen_atomic_fetch_or_i32 tcg_gen_atomic_fetch_or_i32_mips
+#define tcg_gen_atomic_fetch_or_i64 tcg_gen_atomic_fetch_or_i64_mips
+#define tcg_gen_atomic_fetch_xor_i32 tcg_gen_atomic_fetch_xor_i32_mips
+#define tcg_gen_atomic_fetch_xor_i64 tcg_gen_atomic_fetch_xor_i64_mips
+#define tcg_gen_atomic_or_fetch_i32 tcg_gen_atomic_or_fetch_i32_mips
+#define tcg_gen_atomic_or_fetch_i64 tcg_gen_atomic_or_fetch_i64_mips
+#define tcg_gen_atomic_xchg_i32 tcg_gen_atomic_xchg_i32_mips
+#define tcg_gen_atomic_xchg_i64 tcg_gen_atomic_xchg_i64_mips
+#define tcg_gen_atomic_xor_fetch_i32 tcg_gen_atomic_xor_fetch_i32_mips
+#define tcg_gen_atomic_xor_fetch_i64 tcg_gen_atomic_xor_fetch_i64_mips
 #define tcg_gen_br tcg_gen_br_mips
 #define tcg_gen_brcond_i32 tcg_gen_brcond_i32_mips
 #define tcg_gen_brcond_i64 tcg_gen_brcond_i64_mips

qemu/mips64.h

@@ -1372,6 +1372,149 @@
 #define helper_add_saturate helper_add_saturate_mips64
 #define helper_add_setq helper_add_setq_mips64
 #define helper_add_usaturate helper_add_usaturate_mips64
+#define helper_atomic_add_fetchb helper_atomic_add_fetchb_mips64
+#define helper_atomic_add_fetchb_mmu helper_atomic_add_fetchb_mmu_mips64
+#define helper_atomic_add_fetchl_be helper_atomic_add_fetchl_be_mips64
+#define helper_atomic_add_fetchl_be_mmu helper_atomic_add_fetchl_be_mmu_mips64
+#define helper_atomic_add_fetchl_le helper_atomic_add_fetchl_le_mips64
+#define helper_atomic_add_fetchl_le_mmu helper_atomic_add_fetchl_le_mmu_mips64
+#define helper_atomic_add_fetchq_be helper_atomic_add_fetchq_be_mips64
+#define helper_atomic_add_fetchq_be_mmu helper_atomic_add_fetchq_be_mmu_mips64
+#define helper_atomic_add_fetchq_le helper_atomic_add_fetchq_le_mips64
+#define helper_atomic_add_fetchq_le_mmu helper_atomic_add_fetchq_le_mmu_mips64
+#define helper_atomic_add_fetchw_be helper_atomic_add_fetchw_be_mips64
+#define helper_atomic_add_fetchw_be_mmu helper_atomic_add_fetchw_be_mmu_mips64
+#define helper_atomic_add_fetchw_le helper_atomic_add_fetchw_le_mips64
+#define helper_atomic_add_fetchw_le_mmu helper_atomic_add_fetchw_le_mmu_mips64
+#define helper_atomic_and_fetchb helper_atomic_and_fetchb_mips64
+#define helper_atomic_and_fetchb_le_mmu helper_atomic_and_fetchb_le_mmu_mips64
+#define helper_atomic_and_fetchb_mmu helper_atomic_and_fetchb_mmu_mips64
+#define helper_atomic_and_fetchl_be helper_atomic_and_fetchl_be_mips64
+#define helper_atomic_and_fetchl_be_mmu helper_atomic_and_fetchl_be_mmu_mips64
+#define helper_atomic_and_fetchl_le helper_atomic_and_fetchl_le_mips64
+#define helper_atomic_and_fetchl_le_mmu helper_atomic_and_fetchl_le_mmu_mips64
+#define helper_atomic_and_fetchq_be helper_atomic_and_fetchq_be_mips64
+#define helper_atomic_and_fetchq_be_mmu helper_atomic_and_fetchq_be_mmu_mips64
+#define helper_atomic_and_fetchq_le helper_atomic_and_fetchq_le_mips64
+#define helper_atomic_and_fetchq_le_mmu helper_atomic_and_fetchq_le_mmu_mips64
+#define helper_atomic_and_fetchw_be helper_atomic_and_fetchw_be_mips64
+#define helper_atomic_and_fetchw_be_mmu helper_atomic_and_fetchw_be_mmu_mips64
+#define helper_atomic_and_fetchw_le helper_atomic_and_fetchw_le_mips64
+#define helper_atomic_and_fetchw_le_mmu helper_atomic_and_fetchw_le_mmu_mips64
+#define helper_atomic_cmpxchgb helper_atomic_cmpxchgb_mips64
+#define helper_atomic_cmpxchgb helper_atomic_cmpxchgb_mips64
+#define helper_atomic_cmpxchgb_mmu helper_atomic_cmpxchgb_mmu_mips64
+#define helper_atomic_cmpxchgl_be helper_atomic_cmpxchgl_be_mips64
+#define helper_atomic_cmpxchgl_be_mmu helper_atomic_cmpxchgl_be_mmu_mips64
+#define helper_atomic_cmpxchgl_le helper_atomic_cmpxchgl_le_mips64
+#define helper_atomic_cmpxchgl_le_mmu helper_atomic_cmpxchgl_le_mmu_mips64
+#define helper_atomic_cmpxchgq_be helper_atomic_cmpxchgq_be_mips64
+#define helper_atomic_cmpxchgq_be_mmu helper_atomic_cmpxchgq_be_mmu_mips64
+#define helper_atomic_cmpxchgq_le helper_atomic_cmpxchgq_le_mips64
+#define helper_atomic_cmpxchgq_le_mmu helper_atomic_cmpxchgq_le_mmu_mips64
+#define helper_atomic_cmpxchgw_be helper_atomic_cmpxchgw_be_mips64
+#define helper_atomic_cmpxchgw_be_mmu helper_atomic_cmpxchgw_be_mmu_mips64
+#define helper_atomic_cmpxchgw_le helper_atomic_cmpxchgw_le_mips64
+#define helper_atomic_cmpxchgw_le_mmu helper_atomic_cmpxchgw_le_mmu_mips64
+#define helper_atomic_fetch_addb helper_atomic_fetch_addb_mips64
+#define helper_atomic_fetch_addb_mmu helper_atomic_fetch_addb_mmu_mips64
+#define helper_atomic_fetch_addl_be helper_atomic_fetch_addl_be_mips64
+#define helper_atomic_fetch_addl_be_mmu helper_atomic_fetch_addl_be_mmu_mips64
+#define helper_atomic_fetch_addl_le helper_atomic_fetch_addl_le_mips64
+#define helper_atomic_fetch_addl_le_mmu helper_atomic_fetch_addl_le_mmu_mips64
+#define helper_atomic_fetch_addq_be helper_atomic_fetch_addq_be_mips64
+#define helper_atomic_fetch_addq_be_mmu helper_atomic_fetch_addq_be_mmu_mips64
+#define helper_atomic_fetch_addq_le helper_atomic_fetch_addq_le_mips64
+#define helper_atomic_fetch_addq_le_mmu helper_atomic_fetch_addq_le_mmu_mips64
+#define helper_atomic_fetch_addw_be helper_atomic_fetch_addw_be_mips64
+#define helper_atomic_fetch_addw_be_mmu helper_atomic_fetch_addw_be_mmu_mips64
+#define helper_atomic_fetch_addw_le helper_atomic_fetch_addw_le_mips64
+#define helper_atomic_fetch_addw_le_mmu helper_atomic_fetch_addw_le_mmu_mips64
+#define helper_atomic_fetch_andb helper_atomic_fetch_andb_mips64
+#define helper_atomic_fetch_andb_mmu helper_atomic_fetch_andb_mmu_mips64
+#define helper_atomic_fetch_andl_be helper_atomic_fetch_andl_be_mips64
+#define helper_atomic_fetch_andl_be_mmu helper_atomic_fetch_andl_be_mmu_mips64
+#define helper_atomic_fetch_andl_le helper_atomic_fetch_andl_le_mips64
+#define helper_atomic_fetch_andl_le_mmu helper_atomic_fetch_andl_le_mmu_mips64
+#define helper_atomic_fetch_andq_be helper_atomic_fetch_andq_be_mips64
+#define helper_atomic_fetch_andq_be_mmu helper_atomic_fetch_andq_be_mmu_mips64
+#define helper_atomic_fetch_andq_le helper_atomic_fetch_andq_le_mips64
+#define helper_atomic_fetch_andq_le_mmu helper_atomic_fetch_andq_le_mmu_mips64
+#define helper_atomic_fetch_andw_be helper_atomic_fetch_andw_be_mips64
+#define helper_atomic_fetch_andw_be_mmu helper_atomic_fetch_andw_be_mmu_mips64
+#define helper_atomic_fetch_andw_le helper_atomic_fetch_andw_le_mips64
+#define helper_atomic_fetch_andw_le_mmu helper_atomic_fetch_andw_le_mmu_mips64
+#define helper_atomic_fetch_orb helper_atomic_fetch_orb_mips64
+#define helper_atomic_fetch_orb_mmu helper_atomic_fetch_orb_mmu_mips64
+#define helper_atomic_fetch_orl_be helper_atomic_fetch_orl_be_mips64
+#define helper_atomic_fetch_orl_be_mmu helper_atomic_fetch_orl_be_mmu_mips64
+#define helper_atomic_fetch_orl_le helper_atomic_fetch_orl_le_mips64
+#define helper_atomic_fetch_orl_le_mmu helper_atomic_fetch_orl_le_mmu_mips64
+#define helper_atomic_fetch_orq_be helper_atomic_fetch_orq_be_mips64
+#define helper_atomic_fetch_orq_be_mmu helper_atomic_fetch_orq_be_mmu_mips64
+#define helper_atomic_fetch_orq_le helper_atomic_fetch_orq_le_mips64
+#define helper_atomic_fetch_orq_le_mmu helper_atomic_fetch_orq_le_mmu_mips64
+#define helper_atomic_fetch_orw_be helper_atomic_fetch_orw_be_mips64
+#define helper_atomic_fetch_orw_be_mmu helper_atomic_fetch_orw_be_mmu_mips64
+#define helper_atomic_fetch_orw_le helper_atomic_fetch_orw_le_mips64
+#define helper_atomic_fetch_orw_le_mmu helper_atomic_fetch_orw_le_mmu_mips64
+#define helper_atomic_fetch_xorb helper_atomic_fetch_xorb_mips64
+#define helper_atomic_fetch_xorb_mmu helper_atomic_fetch_xorb_mmu_mips64
+#define helper_atomic_fetch_xorl_be helper_atomic_fetch_xorl_be_mips64
+#define helper_atomic_fetch_xorl_be_mmu helper_atomic_fetch_xorl_be_mmu_mips64
+#define helper_atomic_fetch_xorl_le helper_atomic_fetch_xorl_le_mips64
+#define helper_atomic_fetch_xorl_le_mmu helper_atomic_fetch_xorl_le_mmu_mips64
+#define helper_atomic_fetch_xorq_be helper_atomic_fetch_xorq_be_mips64
+#define helper_atomic_fetch_xorq_be_mmu helper_atomic_fetch_xorq_be_mmu_mips64
+#define helper_atomic_fetch_xorq_le helper_atomic_fetch_xorq_le_mips64
+#define helper_atomic_fetch_xorq_le_mmu helper_atomic_fetch_xorq_le_mmu_mips64
+#define helper_atomic_fetch_xorw_be helper_atomic_fetch_xorw_be_mips64
+#define helper_atomic_fetch_xorw_be_mmu helper_atomic_fetch_xorw_be_mmu_mips64
+#define helper_atomic_fetch_xorw_le helper_atomic_fetch_xorw_le_mips64
+#define helper_atomic_fetch_xorw_le_mmu helper_atomic_fetch_xorw_le_mmu_mips64
+#define helper_atomic_or_fetchb helper_atomic_or_fetchb_mips64
+#define helper_atomic_or_fetchb_mmu helper_atomic_or_fetchb_mmu_mips64
+#define helper_atomic_or_fetchl_be helper_atomic_or_fetchl_be_mips64
+#define helper_atomic_or_fetchl_be_mmu helper_atomic_or_fetchl_be_mmu_mips64
+#define helper_atomic_or_fetchl_le helper_atomic_or_fetchl_le_mips64
+#define helper_atomic_or_fetchl_le_mmu helper_atomic_or_fetchl_le_mmu_mips64
+#define helper_atomic_or_fetchq_be helper_atomic_or_fetchq_be_mips64
+#define helper_atomic_or_fetchq_be_mmu helper_atomic_or_fetchq_be_mmu_mips64
+#define helper_atomic_or_fetchq_le helper_atomic_or_fetchq_le_mips64
+#define helper_atomic_or_fetchq_le_mmu helper_atomic_or_fetchq_le_mmu_mips64
+#define helper_atomic_or_fetchw_be helper_atomic_or_fetchw_be_mips64
+#define helper_atomic_or_fetchw_be_mmu helper_atomic_or_fetchw_be_mmu_mips64
+#define helper_atomic_or_fetchw_le helper_atomic_or_fetchw_le_mips64
+#define helper_atomic_or_fetchw_le_mmu helper_atomic_or_fetchw_le_mmu_mips64
+#define helper_atomic_xchgb helper_atomic_xchgb_mips64
+#define helper_atomic_xchgb helper_atomic_xchgb_mips64
+#define helper_atomic_xchgb_mmu helper_atomic_xchgb_mmu_mips64
+#define helper_atomic_xchgl_be helper_atomic_xchgl_be_mips64
+#define helper_atomic_xchgl_be_mmu helper_atomic_xchgl_be_mmu_mips64
+#define helper_atomic_xchgl_le helper_atomic_xchgl_le_mips64
+#define helper_atomic_xchgl_le_mmu helper_atomic_xchgl_le_mmu_mips64
+#define helper_atomic_xchgq_be helper_atomic_xchgq_be_mips64
+#define helper_atomic_xchgq_be_mmu helper_atomic_xchgq_be_mmu_mips64
+#define helper_atomic_xchgq_le helper_atomic_xchgq_le_mips64
+#define helper_atomic_xchgq_le_mmu helper_atomic_xchgq_le_mmu_mips64
+#define helper_atomic_xchgw_be helper_atomic_xchgw_be_mips64
+#define helper_atomic_xchgw_be_mmu helper_atomic_xchgw_be_mmu_mips64
+#define helper_atomic_xchgw_le helper_atomic_xchgw_le_mips64
+#define helper_atomic_xchgw_le_mmu helper_atomic_xchgw_le_mmu_mips64
+#define helper_atomic_xor_fetchb helper_atomic_xor_fetchb_mips64
+#define helper_atomic_xor_fetchb_mmu helper_atomic_xor_fetchb_mmu_mips64
+#define helper_atomic_xor_fetchl_be helper_atomic_xor_fetchl_be_mips64
+#define helper_atomic_xor_fetchl_be_mmu helper_atomic_xor_fetchl_be_mmu_mips64
+#define helper_atomic_xor_fetchl_le helper_atomic_xor_fetchl_le_mips64
+#define helper_atomic_xor_fetchl_le_mmu helper_atomic_xor_fetchl_le_mmu_mips64
+#define helper_atomic_xor_fetchq_be helper_atomic_xor_fetchq_be_mips64
+#define helper_atomic_xor_fetchq_be_mmu helper_atomic_xor_fetchq_be_mmu_mips64
+#define helper_atomic_xor_fetchq_le helper_atomic_xor_fetchq_le_mips64
+#define helper_atomic_xor_fetchq_le_mmu helper_atomic_xor_fetchq_le_mmu_mips64
+#define helper_atomic_xor_fetchw_be helper_atomic_xor_fetchw_be_mips64
+#define helper_atomic_xor_fetchw_be_mmu helper_atomic_xor_fetchw_be_mmu_mips64
+#define helper_atomic_xor_fetchw_le helper_atomic_xor_fetchw_le_mips64
+#define helper_atomic_xor_fetchw_le_mmu helper_atomic_xor_fetchw_le_mmu_mips64
 #define helper_be_ldl_cmmu helper_be_ldl_cmmu_mips64
 #define helper_be_ldq_cmmu helper_be_ldq_cmmu_mips64
 #define helper_be_ldq_mmu helper_be_ldq_mmu_mips64
@@ -1400,6 +1543,10 @@
 #define helper_crypto_sha256su0 helper_crypto_sha256su0_mips64
 #define helper_crypto_sha256su1 helper_crypto_sha256su1_mips64
 #define helper_dc_zva helper_dc_zva_mips64
+#define helper_div_i32 helper_div_i32_mips64
+#define helper_div_i64 helper_div_i64_mips64
+#define helper_divu_i32 helper_divu_i32_mips64
+#define helper_divu_i64 helper_divu_i64_mips64
 #define helper_double_saturate helper_double_saturate_mips64
 #define helper_exception_internal helper_exception_internal_mips64
 #define helper_exception_return helper_exception_return_mips64
@@ -1532,6 +1679,10 @@
 #define helper_le_stl_mmu helper_le_stl_mmu_mips64
 #define helper_le_stq_mmu helper_le_stq_mmu_mips64
 #define helper_le_stw_mmu helper_le_stw_mmu_mips64
+#define helper_mulsh_i32 helper_mulsh_i32_mips64
+#define helper_mulsh_i64 helper_mulsh_i64_mips64
+#define helper_muluh_i32 helper_muluh_i32_mips64
+#define helper_muluh_i64 helper_muluh_i64_mips64
 #define helper_mrs_banked helper_mrs_banked_mips64
 #define helper_msa_ld_b helper_msa_ld_b_mips64
 #define helper_msa_ld_d helper_msa_ld_d_mips64
@@ -1773,6 +1924,10 @@
 #define helper_recpe_f64 helper_recpe_f64_mips64
 #define helper_recpe_u32 helper_recpe_u32_mips64
 #define helper_recps_f32 helper_recps_f32_mips64
+#define helper_rem_i32 helper_rem_i32_mips64
+#define helper_rem_i64 helper_rem_i64_mips64
+#define helper_remu_i32 helper_remu_i32_mips64
+#define helper_remu_i64 helper_remu_i64_mips64
 #define helper_ret_ldb_cmmu helper_ret_ldb_cmmu_mips64
 #define helper_ret_ldsb_mmu helper_ret_ldsb_mmu_mips64
 #define helper_ret_ldub_mmu helper_ret_ldub_mmu_mips64
@@ -1790,6 +1945,8 @@
 #define helper_sadd8 helper_sadd8_mips64
 #define helper_saddsubx helper_saddsubx_mips64
 #define helper_sar_cc helper_sar_cc_mips64
+#define helper_sar_i32 helper_sar_i32_mips64
+#define helper_sar_i64 helper_sar_i64_mips64
 #define helper_sdiv helper_sdiv_mips64
 #define helper_sel_flags helper_sel_flags_mips64
 #define helper_set_cp_reg helper_set_cp_reg_mips64
@@ -1803,7 +1960,10 @@
 #define helper_shadd8 helper_shadd8_mips64
 #define helper_shaddsubx helper_shaddsubx_mips64
 #define helper_shl_cc helper_shl_cc_mips64
+#define helper_shl_i64 helper_shl_i64_mips64
 #define helper_shr_cc helper_shr_cc_mips64
+#define helper_shr_i32 helper_shr_i32_mips64
+#define helper_shr_i64 helper_shr_i64_mips64
 #define helper_shsub16 helper_shsub16_mips64
 #define helper_shsub8 helper_shsub8_mips64
 #define helper_shsubaddx helper_shsubaddx_mips64
@@ -2756,6 +2916,26 @@
 #define tcg_gen_andc_i64 tcg_gen_andc_i64_mips64
 #define tcg_gen_andi_i32 tcg_gen_andi_i32_mips64
 #define tcg_gen_andi_i64 tcg_gen_andi_i64_mips64
+#define tcg_gen_atomic_add_fetch_i32 tcg_gen_atomic_add_fetch_i32_mips64
+#define tcg_gen_atomic_add_fetch_i64 tcg_gen_atomic_add_fetch_i64_mips64
+#define tcg_gen_atomic_and_fetch_i32 tcg_gen_atomic_and_fetch_i32_mips64
+#define tcg_gen_atomic_and_fetch_i64 tcg_gen_atomic_and_fetch_i64_mips64
+#define tcg_gen_atomic_cmpxchg_i32 tcg_gen_atomic_cmpxchg_i32_mips64
+#define tcg_gen_atomic_cmpxchg_i64 tcg_gen_atomic_cmpxchg_i64_mips64
+#define tcg_gen_atomic_fetch_add_i32 tcg_gen_atomic_fetch_add_i32_mips64
+#define tcg_gen_atomic_fetch_add_i64 tcg_gen_atomic_fetch_add_i64_mips64
+#define tcg_gen_atomic_fetch_and_i32 tcg_gen_atomic_fetch_and_i32_mips64
+#define tcg_gen_atomic_fetch_and_i64 tcg_gen_atomic_fetch_and_i64_mips64
+#define tcg_gen_atomic_fetch_or_i32 tcg_gen_atomic_fetch_or_i32_mips64
+#define tcg_gen_atomic_fetch_or_i64 tcg_gen_atomic_fetch_or_i64_mips64
+#define tcg_gen_atomic_fetch_xor_i32 tcg_gen_atomic_fetch_xor_i32_mips64
+#define tcg_gen_atomic_fetch_xor_i64 tcg_gen_atomic_fetch_xor_i64_mips64
+#define tcg_gen_atomic_or_fetch_i32 tcg_gen_atomic_or_fetch_i32_mips64
+#define tcg_gen_atomic_or_fetch_i64 tcg_gen_atomic_or_fetch_i64_mips64
+#define tcg_gen_atomic_xchg_i32 tcg_gen_atomic_xchg_i32_mips64
+#define tcg_gen_atomic_xchg_i64 tcg_gen_atomic_xchg_i64_mips64
+#define tcg_gen_atomic_xor_fetch_i32 tcg_gen_atomic_xor_fetch_i32_mips64
+#define tcg_gen_atomic_xor_fetch_i64 tcg_gen_atomic_xor_fetch_i64_mips64
 #define tcg_gen_br tcg_gen_br_mips64
 #define tcg_gen_brcond_i32 tcg_gen_brcond_i32_mips64
 #define tcg_gen_brcond_i64 tcg_gen_brcond_i64_mips64

qemu/mips64el.h

@@ -1372,6 +1372,149 @@
 #define helper_add_saturate helper_add_saturate_mips64el
 #define helper_add_setq helper_add_setq_mips64el
 #define helper_add_usaturate helper_add_usaturate_mips64el
+#define helper_atomic_add_fetchb helper_atomic_add_fetchb_mips64el
+#define helper_atomic_add_fetchb_mmu helper_atomic_add_fetchb_mmu_mips64el
+#define helper_atomic_add_fetchl_be helper_atomic_add_fetchl_be_mips64el
+#define helper_atomic_add_fetchl_be_mmu helper_atomic_add_fetchl_be_mmu_mips64el
+#define helper_atomic_add_fetchl_le helper_atomic_add_fetchl_le_mips64el
+#define helper_atomic_add_fetchl_le_mmu helper_atomic_add_fetchl_le_mmu_mips64el
+#define helper_atomic_add_fetchq_be helper_atomic_add_fetchq_be_mips64el
+#define helper_atomic_add_fetchq_be_mmu helper_atomic_add_fetchq_be_mmu_mips64el
+#define helper_atomic_add_fetchq_le helper_atomic_add_fetchq_le_mips64el
+#define helper_atomic_add_fetchq_le_mmu helper_atomic_add_fetchq_le_mmu_mips64el
+#define helper_atomic_add_fetchw_be helper_atomic_add_fetchw_be_mips64el
+#define helper_atomic_add_fetchw_be_mmu helper_atomic_add_fetchw_be_mmu_mips64el
+#define helper_atomic_add_fetchw_le helper_atomic_add_fetchw_le_mips64el
+#define helper_atomic_add_fetchw_le_mmu helper_atomic_add_fetchw_le_mmu_mips64el
+#define helper_atomic_and_fetchb helper_atomic_and_fetchb_mips64el
+#define helper_atomic_and_fetchb_le_mmu helper_atomic_and_fetchb_le_mmu_mips64el
+#define helper_atomic_and_fetchb_mmu helper_atomic_and_fetchb_mmu_mips64el
+#define helper_atomic_and_fetchl_be helper_atomic_and_fetchl_be_mips64el
+#define helper_atomic_and_fetchl_be_mmu helper_atomic_and_fetchl_be_mmu_mips64el
+#define helper_atomic_and_fetchl_le helper_atomic_and_fetchl_le_mips64el
+#define helper_atomic_and_fetchl_le_mmu helper_atomic_and_fetchl_le_mmu_mips64el
+#define helper_atomic_and_fetchq_be helper_atomic_and_fetchq_be_mips64el
+#define helper_atomic_and_fetchq_be_mmu helper_atomic_and_fetchq_be_mmu_mips64el
+#define helper_atomic_and_fetchq_le helper_atomic_and_fetchq_le_mips64el
+#define helper_atomic_and_fetchq_le_mmu helper_atomic_and_fetchq_le_mmu_mips64el
+#define helper_atomic_and_fetchw_be helper_atomic_and_fetchw_be_mips64el
+#define helper_atomic_and_fetchw_be_mmu helper_atomic_and_fetchw_be_mmu_mips64el
+#define helper_atomic_and_fetchw_le helper_atomic_and_fetchw_le_mips64el
+#define helper_atomic_and_fetchw_le_mmu helper_atomic_and_fetchw_le_mmu_mips64el
+#define helper_atomic_cmpxchgb helper_atomic_cmpxchgb_mips64el
+#define helper_atomic_cmpxchgb helper_atomic_cmpxchgb_mips64el
+#define helper_atomic_cmpxchgb_mmu helper_atomic_cmpxchgb_mmu_mips64el
+#define helper_atomic_cmpxchgl_be helper_atomic_cmpxchgl_be_mips64el
+#define helper_atomic_cmpxchgl_be_mmu helper_atomic_cmpxchgl_be_mmu_mips64el
+#define helper_atomic_cmpxchgl_le helper_atomic_cmpxchgl_le_mips64el
+#define helper_atomic_cmpxchgl_le_mmu helper_atomic_cmpxchgl_le_mmu_mips64el
+#define helper_atomic_cmpxchgq_be helper_atomic_cmpxchgq_be_mips64el
+#define helper_atomic_cmpxchgq_be_mmu helper_atomic_cmpxchgq_be_mmu_mips64el
+#define helper_atomic_cmpxchgq_le helper_atomic_cmpxchgq_le_mips64el
+#define helper_atomic_cmpxchgq_le_mmu helper_atomic_cmpxchgq_le_mmu_mips64el
+#define helper_atomic_cmpxchgw_be helper_atomic_cmpxchgw_be_mips64el
+#define helper_atomic_cmpxchgw_be_mmu helper_atomic_cmpxchgw_be_mmu_mips64el
+#define helper_atomic_cmpxchgw_le helper_atomic_cmpxchgw_le_mips64el
+#define helper_atomic_cmpxchgw_le_mmu helper_atomic_cmpxchgw_le_mmu_mips64el
+#define helper_atomic_fetch_addb helper_atomic_fetch_addb_mips64el
+#define helper_atomic_fetch_addb_mmu helper_atomic_fetch_addb_mmu_mips64el
+#define helper_atomic_fetch_addl_be helper_atomic_fetch_addl_be_mips64el
+#define helper_atomic_fetch_addl_be_mmu helper_atomic_fetch_addl_be_mmu_mips64el
+#define helper_atomic_fetch_addl_le helper_atomic_fetch_addl_le_mips64el
+#define helper_atomic_fetch_addl_le_mmu helper_atomic_fetch_addl_le_mmu_mips64el
+#define helper_atomic_fetch_addq_be helper_atomic_fetch_addq_be_mips64el
+#define helper_atomic_fetch_addq_be_mmu helper_atomic_fetch_addq_be_mmu_mips64el
+#define helper_atomic_fetch_addq_le helper_atomic_fetch_addq_le_mips64el
+#define helper_atomic_fetch_addq_le_mmu helper_atomic_fetch_addq_le_mmu_mips64el
+#define helper_atomic_fetch_addw_be helper_atomic_fetch_addw_be_mips64el
+#define helper_atomic_fetch_addw_be_mmu helper_atomic_fetch_addw_be_mmu_mips64el
+#define helper_atomic_fetch_addw_le helper_atomic_fetch_addw_le_mips64el
+#define helper_atomic_fetch_addw_le_mmu helper_atomic_fetch_addw_le_mmu_mips64el
+#define helper_atomic_fetch_andb helper_atomic_fetch_andb_mips64el
+#define helper_atomic_fetch_andb_mmu helper_atomic_fetch_andb_mmu_mips64el
+#define helper_atomic_fetch_andl_be helper_atomic_fetch_andl_be_mips64el
+#define helper_atomic_fetch_andl_be_mmu helper_atomic_fetch_andl_be_mmu_mips64el
+#define helper_atomic_fetch_andl_le helper_atomic_fetch_andl_le_mips64el
+#define helper_atomic_fetch_andl_le_mmu helper_atomic_fetch_andl_le_mmu_mips64el
+#define helper_atomic_fetch_andq_be helper_atomic_fetch_andq_be_mips64el
+#define helper_atomic_fetch_andq_be_mmu helper_atomic_fetch_andq_be_mmu_mips64el
+#define helper_atomic_fetch_andq_le helper_atomic_fetch_andq_le_mips64el
+#define helper_atomic_fetch_andq_le_mmu helper_atomic_fetch_andq_le_mmu_mips64el
+#define helper_atomic_fetch_andw_be helper_atomic_fetch_andw_be_mips64el
+#define helper_atomic_fetch_andw_be_mmu helper_atomic_fetch_andw_be_mmu_mips64el
+#define helper_atomic_fetch_andw_le helper_atomic_fetch_andw_le_mips64el
+#define helper_atomic_fetch_andw_le_mmu helper_atomic_fetch_andw_le_mmu_mips64el
+#define helper_atomic_fetch_orb helper_atomic_fetch_orb_mips64el
+#define helper_atomic_fetch_orb_mmu helper_atomic_fetch_orb_mmu_mips64el
+#define helper_atomic_fetch_orl_be helper_atomic_fetch_orl_be_mips64el
+#define helper_atomic_fetch_orl_be_mmu helper_atomic_fetch_orl_be_mmu_mips64el
+#define helper_atomic_fetch_orl_le helper_atomic_fetch_orl_le_mips64el
+#define helper_atomic_fetch_orl_le_mmu helper_atomic_fetch_orl_le_mmu_mips64el
+#define helper_atomic_fetch_orq_be helper_atomic_fetch_orq_be_mips64el
+#define helper_atomic_fetch_orq_be_mmu helper_atomic_fetch_orq_be_mmu_mips64el
+#define helper_atomic_fetch_orq_le helper_atomic_fetch_orq_le_mips64el
+#define helper_atomic_fetch_orq_le_mmu helper_atomic_fetch_orq_le_mmu_mips64el
+#define helper_atomic_fetch_orw_be helper_atomic_fetch_orw_be_mips64el
+#define helper_atomic_fetch_orw_be_mmu helper_atomic_fetch_orw_be_mmu_mips64el
+#define helper_atomic_fetch_orw_le helper_atomic_fetch_orw_le_mips64el
+#define helper_atomic_fetch_orw_le_mmu helper_atomic_fetch_orw_le_mmu_mips64el
+#define helper_atomic_fetch_xorb helper_atomic_fetch_xorb_mips64el
+#define helper_atomic_fetch_xorb_mmu helper_atomic_fetch_xorb_mmu_mips64el
+#define helper_atomic_fetch_xorl_be helper_atomic_fetch_xorl_be_mips64el
+#define helper_atomic_fetch_xorl_be_mmu helper_atomic_fetch_xorl_be_mmu_mips64el
+#define helper_atomic_fetch_xorl_le helper_atomic_fetch_xorl_le_mips64el
+#define helper_atomic_fetch_xorl_le_mmu helper_atomic_fetch_xorl_le_mmu_mips64el
+#define helper_atomic_fetch_xorq_be helper_atomic_fetch_xorq_be_mips64el
+#define helper_atomic_fetch_xorq_be_mmu helper_atomic_fetch_xorq_be_mmu_mips64el
+#define helper_atomic_fetch_xorq_le helper_atomic_fetch_xorq_le_mips64el
+#define helper_atomic_fetch_xorq_le_mmu helper_atomic_fetch_xorq_le_mmu_mips64el
+#define helper_atomic_fetch_xorw_be helper_atomic_fetch_xorw_be_mips64el
+#define helper_atomic_fetch_xorw_be_mmu helper_atomic_fetch_xorw_be_mmu_mips64el
+#define helper_atomic_fetch_xorw_le helper_atomic_fetch_xorw_le_mips64el
+#define helper_atomic_fetch_xorw_le_mmu helper_atomic_fetch_xorw_le_mmu_mips64el
+#define helper_atomic_or_fetchb helper_atomic_or_fetchb_mips64el
+#define helper_atomic_or_fetchb_mmu helper_atomic_or_fetchb_mmu_mips64el
+#define helper_atomic_or_fetchl_be helper_atomic_or_fetchl_be_mips64el
+#define helper_atomic_or_fetchl_be_mmu helper_atomic_or_fetchl_be_mmu_mips64el
+#define helper_atomic_or_fetchl_le helper_atomic_or_fetchl_le_mips64el
+#define helper_atomic_or_fetchl_le_mmu helper_atomic_or_fetchl_le_mmu_mips64el
+#define helper_atomic_or_fetchq_be helper_atomic_or_fetchq_be_mips64el
+#define helper_atomic_or_fetchq_be_mmu helper_atomic_or_fetchq_be_mmu_mips64el
+#define helper_atomic_or_fetchq_le helper_atomic_or_fetchq_le_mips64el
+#define helper_atomic_or_fetchq_le_mmu helper_atomic_or_fetchq_le_mmu_mips64el
+#define helper_atomic_or_fetchw_be helper_atomic_or_fetchw_be_mips64el
+#define helper_atomic_or_fetchw_be_mmu helper_atomic_or_fetchw_be_mmu_mips64el
+#define helper_atomic_or_fetchw_le helper_atomic_or_fetchw_le_mips64el
+#define helper_atomic_or_fetchw_le_mmu helper_atomic_or_fetchw_le_mmu_mips64el
+#define helper_atomic_xchgb helper_atomic_xchgb_mips64el
+#define helper_atomic_xchgb helper_atomic_xchgb_mips64el
+#define helper_atomic_xchgb_mmu helper_atomic_xchgb_mmu_mips64el
+#define helper_atomic_xchgl_be helper_atomic_xchgl_be_mips64el
+#define helper_atomic_xchgl_be_mmu helper_atomic_xchgl_be_mmu_mips64el
+#define helper_atomic_xchgl_le helper_atomic_xchgl_le_mips64el
+#define helper_atomic_xchgl_le_mmu helper_atomic_xchgl_le_mmu_mips64el
+#define helper_atomic_xchgq_be helper_atomic_xchgq_be_mips64el
+#define helper_atomic_xchgq_be_mmu helper_atomic_xchgq_be_mmu_mips64el
+#define helper_atomic_xchgq_le helper_atomic_xchgq_le_mips64el
+#define helper_atomic_xchgq_le_mmu helper_atomic_xchgq_le_mmu_mips64el
+#define helper_atomic_xchgw_be helper_atomic_xchgw_be_mips64el
+#define helper_atomic_xchgw_be_mmu helper_atomic_xchgw_be_mmu_mips64el
+#define helper_atomic_xchgw_le helper_atomic_xchgw_le_mips64el
+#define helper_atomic_xchgw_le_mmu helper_atomic_xchgw_le_mmu_mips64el
+#define helper_atomic_xor_fetchb helper_atomic_xor_fetchb_mips64el
+#define helper_atomic_xor_fetchb_mmu helper_atomic_xor_fetchb_mmu_mips64el
+#define helper_atomic_xor_fetchl_be helper_atomic_xor_fetchl_be_mips64el
+#define helper_atomic_xor_fetchl_be_mmu helper_atomic_xor_fetchl_be_mmu_mips64el
+#define helper_atomic_xor_fetchl_le helper_atomic_xor_fetchl_le_mips64el
+#define helper_atomic_xor_fetchl_le_mmu helper_atomic_xor_fetchl_le_mmu_mips64el
+#define helper_atomic_xor_fetchq_be helper_atomic_xor_fetchq_be_mips64el
+#define helper_atomic_xor_fetchq_be_mmu helper_atomic_xor_fetchq_be_mmu_mips64el
+#define helper_atomic_xor_fetchq_le helper_atomic_xor_fetchq_le_mips64el
+#define helper_atomic_xor_fetchq_le_mmu helper_atomic_xor_fetchq_le_mmu_mips64el
+#define helper_atomic_xor_fetchw_be helper_atomic_xor_fetchw_be_mips64el
+#define helper_atomic_xor_fetchw_be_mmu helper_atomic_xor_fetchw_be_mmu_mips64el
+#define helper_atomic_xor_fetchw_le helper_atomic_xor_fetchw_le_mips64el
+#define helper_atomic_xor_fetchw_le_mmu helper_atomic_xor_fetchw_le_mmu_mips64el
 #define helper_be_ldl_cmmu helper_be_ldl_cmmu_mips64el
 #define helper_be_ldq_cmmu helper_be_ldq_cmmu_mips64el
 #define helper_be_ldq_mmu helper_be_ldq_mmu_mips64el
@@ -1400,6 +1543,10 @@
 #define helper_crypto_sha256su0 helper_crypto_sha256su0_mips64el
 #define helper_crypto_sha256su1 helper_crypto_sha256su1_mips64el
 #define helper_dc_zva helper_dc_zva_mips64el
+#define helper_div_i32 helper_div_i32_mips64el
+#define helper_div_i64 helper_div_i64_mips64el
+#define helper_divu_i32 helper_divu_i32_mips64el
+#define helper_divu_i64 helper_divu_i64_mips64el
 #define helper_double_saturate helper_double_saturate_mips64el
 #define helper_exception_internal helper_exception_internal_mips64el
 #define helper_exception_return helper_exception_return_mips64el
@@ -1532,6 +1679,10 @@
 #define helper_le_stl_mmu helper_le_stl_mmu_mips64el
 #define helper_le_stq_mmu helper_le_stq_mmu_mips64el
 #define helper_le_stw_mmu helper_le_stw_mmu_mips64el
+#define helper_mulsh_i32 helper_mulsh_i32_mips64el
+#define helper_mulsh_i64 helper_mulsh_i64_mips64el
+#define helper_muluh_i32 helper_muluh_i32_mips64el
+#define helper_muluh_i64 helper_muluh_i64_mips64el
 #define helper_mrs_banked helper_mrs_banked_mips64el
 #define helper_msa_ld_b helper_msa_ld_b_mips64el
 #define helper_msa_ld_d helper_msa_ld_d_mips64el
@@ -1773,6 +1924,10 @@
 #define helper_recpe_f64 helper_recpe_f64_mips64el
 #define helper_recpe_u32 helper_recpe_u32_mips64el
 #define helper_recps_f32 helper_recps_f32_mips64el
+#define helper_rem_i32 helper_rem_i32_mips64el
+#define helper_rem_i64 helper_rem_i64_mips64el
+#define helper_remu_i32 helper_remu_i32_mips64el
+#define helper_remu_i64 helper_remu_i64_mips64el
 #define helper_ret_ldb_cmmu helper_ret_ldb_cmmu_mips64el
 #define helper_ret_ldsb_mmu helper_ret_ldsb_mmu_mips64el
 #define helper_ret_ldub_mmu helper_ret_ldub_mmu_mips64el
@@ -1790,6 +1945,8 @@
 #define helper_sadd8 helper_sadd8_mips64el
 #define helper_saddsubx helper_saddsubx_mips64el
 #define helper_sar_cc helper_sar_cc_mips64el
+#define helper_sar_i32 helper_sar_i32_mips64el
+#define helper_sar_i64 helper_sar_i64_mips64el
 #define helper_sdiv helper_sdiv_mips64el
 #define helper_sel_flags helper_sel_flags_mips64el
 #define helper_set_cp_reg helper_set_cp_reg_mips64el
@@ -1803,7 +1960,10 @@
 #define helper_shadd8 helper_shadd8_mips64el
 #define helper_shaddsubx helper_shaddsubx_mips64el
 #define helper_shl_cc helper_shl_cc_mips64el
+#define helper_shl_i64 helper_shl_i64_mips64el
 #define helper_shr_cc helper_shr_cc_mips64el
+#define helper_shr_i32 helper_shr_i32_mips64el
+#define helper_shr_i64 helper_shr_i64_mips64el
 #define helper_shsub16 helper_shsub16_mips64el
 #define helper_shsub8 helper_shsub8_mips64el
 #define helper_shsubaddx helper_shsubaddx_mips64el
@@ -2756,6 +2916,26 @@
 #define tcg_gen_andc_i64 tcg_gen_andc_i64_mips64el
 #define tcg_gen_andi_i32 tcg_gen_andi_i32_mips64el
 #define tcg_gen_andi_i64 tcg_gen_andi_i64_mips64el
+#define tcg_gen_atomic_add_fetch_i32 tcg_gen_atomic_add_fetch_i32_mips64el
+#define tcg_gen_atomic_add_fetch_i64 tcg_gen_atomic_add_fetch_i64_mips64el
+#define tcg_gen_atomic_and_fetch_i32 tcg_gen_atomic_and_fetch_i32_mips64el
+#define tcg_gen_atomic_and_fetch_i64 tcg_gen_atomic_and_fetch_i64_mips64el
+#define tcg_gen_atomic_cmpxchg_i32 tcg_gen_atomic_cmpxchg_i32_mips64el
+#define tcg_gen_atomic_cmpxchg_i64 tcg_gen_atomic_cmpxchg_i64_mips64el
+#define tcg_gen_atomic_fetch_add_i32 tcg_gen_atomic_fetch_add_i32_mips64el
+#define tcg_gen_atomic_fetch_add_i64 tcg_gen_atomic_fetch_add_i64_mips64el
+#define tcg_gen_atomic_fetch_and_i32 tcg_gen_atomic_fetch_and_i32_mips64el
+#define tcg_gen_atomic_fetch_and_i64 tcg_gen_atomic_fetch_and_i64_mips64el
+#define tcg_gen_atomic_fetch_or_i32 tcg_gen_atomic_fetch_or_i32_mips64el
+#define tcg_gen_atomic_fetch_or_i64 tcg_gen_atomic_fetch_or_i64_mips64el
+#define tcg_gen_atomic_fetch_xor_i32 tcg_gen_atomic_fetch_xor_i32_mips64el
+#define tcg_gen_atomic_fetch_xor_i64 tcg_gen_atomic_fetch_xor_i64_mips64el
+#define tcg_gen_atomic_or_fetch_i32 tcg_gen_atomic_or_fetch_i32_mips64el
+#define tcg_gen_atomic_or_fetch_i64 tcg_gen_atomic_or_fetch_i64_mips64el
+#define tcg_gen_atomic_xchg_i32 tcg_gen_atomic_xchg_i32_mips64el
+#define tcg_gen_atomic_xchg_i64 tcg_gen_atomic_xchg_i64_mips64el
+#define tcg_gen_atomic_xor_fetch_i32 tcg_gen_atomic_xor_fetch_i32_mips64el
+#define tcg_gen_atomic_xor_fetch_i64 tcg_gen_atomic_xor_fetch_i64_mips64el
 #define tcg_gen_br tcg_gen_br_mips64el
 #define tcg_gen_brcond_i32 tcg_gen_brcond_i32_mips64el
 #define tcg_gen_brcond_i64 tcg_gen_brcond_i64_mips64el

qemu/mipsel.h

@@ -1372,6 +1372,149 @@
 #define helper_add_saturate helper_add_saturate_mipsel
 #define helper_add_setq helper_add_setq_mipsel
 #define helper_add_usaturate helper_add_usaturate_mipsel
+#define helper_atomic_add_fetchb helper_atomic_add_fetchb_mipsel
+#define helper_atomic_add_fetchb_mmu helper_atomic_add_fetchb_mmu_mipsel
+#define helper_atomic_add_fetchl_be helper_atomic_add_fetchl_be_mipsel
+#define helper_atomic_add_fetchl_be_mmu helper_atomic_add_fetchl_be_mmu_mipsel
+#define helper_atomic_add_fetchl_le helper_atomic_add_fetchl_le_mipsel
+#define helper_atomic_add_fetchl_le_mmu helper_atomic_add_fetchl_le_mmu_mipsel
+#define helper_atomic_add_fetchq_be helper_atomic_add_fetchq_be_mipsel
+#define helper_atomic_add_fetchq_be_mmu helper_atomic_add_fetchq_be_mmu_mipsel
+#define helper_atomic_add_fetchq_le helper_atomic_add_fetchq_le_mipsel
+#define helper_atomic_add_fetchq_le_mmu helper_atomic_add_fetchq_le_mmu_mipsel
+#define helper_atomic_add_fetchw_be helper_atomic_add_fetchw_be_mipsel
+#define helper_atomic_add_fetchw_be_mmu helper_atomic_add_fetchw_be_mmu_mipsel
+#define helper_atomic_add_fetchw_le helper_atomic_add_fetchw_le_mipsel
+#define helper_atomic_add_fetchw_le_mmu helper_atomic_add_fetchw_le_mmu_mipsel
+#define helper_atomic_and_fetchb helper_atomic_and_fetchb_mipsel
+#define helper_atomic_and_fetchb_le_mmu helper_atomic_and_fetchb_le_mmu_mipsel
+#define helper_atomic_and_fetchb_mmu helper_atomic_and_fetchb_mmu_mipsel
+#define helper_atomic_and_fetchl_be helper_atomic_and_fetchl_be_mipsel
+#define helper_atomic_and_fetchl_be_mmu helper_atomic_and_fetchl_be_mmu_mipsel
+#define helper_atomic_and_fetchl_le helper_atomic_and_fetchl_le_mipsel
+#define helper_atomic_and_fetchl_le_mmu helper_atomic_and_fetchl_le_mmu_mipsel
+#define helper_atomic_and_fetchq_be helper_atomic_and_fetchq_be_mipsel
+#define helper_atomic_and_fetchq_be_mmu helper_atomic_and_fetchq_be_mmu_mipsel
+#define helper_atomic_and_fetchq_le helper_atomic_and_fetchq_le_mipsel
+#define helper_atomic_and_fetchq_le_mmu helper_atomic_and_fetchq_le_mmu_mipsel
+#define helper_atomic_and_fetchw_be helper_atomic_and_fetchw_be_mipsel
+#define helper_atomic_and_fetchw_be_mmu helper_atomic_and_fetchw_be_mmu_mipsel
+#define helper_atomic_and_fetchw_le helper_atomic_and_fetchw_le_mipsel
+#define helper_atomic_and_fetchw_le_mmu helper_atomic_and_fetchw_le_mmu_mipsel
+#define helper_atomic_cmpxchgb helper_atomic_cmpxchgb_mipsel
+#define helper_atomic_cmpxchgb helper_atomic_cmpxchgb_mipsel
+#define helper_atomic_cmpxchgb_mmu helper_atomic_cmpxchgb_mmu_mipsel
+#define helper_atomic_cmpxchgl_be helper_atomic_cmpxchgl_be_mipsel
+#define helper_atomic_cmpxchgl_be_mmu helper_atomic_cmpxchgl_be_mmu_mipsel
+#define helper_atomic_cmpxchgl_le helper_atomic_cmpxchgl_le_mipsel
+#define helper_atomic_cmpxchgl_le_mmu helper_atomic_cmpxchgl_le_mmu_mipsel
+#define helper_atomic_cmpxchgq_be helper_atomic_cmpxchgq_be_mipsel
+#define helper_atomic_cmpxchgq_be_mmu helper_atomic_cmpxchgq_be_mmu_mipsel
+#define helper_atomic_cmpxchgq_le helper_atomic_cmpxchgq_le_mipsel
+#define helper_atomic_cmpxchgq_le_mmu helper_atomic_cmpxchgq_le_mmu_mipsel
+#define helper_atomic_cmpxchgw_be helper_atomic_cmpxchgw_be_mipsel
+#define helper_atomic_cmpxchgw_be_mmu helper_atomic_cmpxchgw_be_mmu_mipsel
+#define helper_atomic_cmpxchgw_le helper_atomic_cmpxchgw_le_mipsel
+#define helper_atomic_cmpxchgw_le_mmu helper_atomic_cmpxchgw_le_mmu_mipsel
+#define helper_atomic_fetch_addb helper_atomic_fetch_addb_mipsel
+#define helper_atomic_fetch_addb_mmu helper_atomic_fetch_addb_mmu_mipsel
+#define helper_atomic_fetch_addl_be helper_atomic_fetch_addl_be_mipsel
+#define helper_atomic_fetch_addl_be_mmu helper_atomic_fetch_addl_be_mmu_mipsel
+#define helper_atomic_fetch_addl_le helper_atomic_fetch_addl_le_mipsel
+#define helper_atomic_fetch_addl_le_mmu helper_atomic_fetch_addl_le_mmu_mipsel
+#define helper_atomic_fetch_addq_be helper_atomic_fetch_addq_be_mipsel
+#define helper_atomic_fetch_addq_be_mmu helper_atomic_fetch_addq_be_mmu_mipsel
+#define helper_atomic_fetch_addq_le helper_atomic_fetch_addq_le_mipsel
+#define helper_atomic_fetch_addq_le_mmu helper_atomic_fetch_addq_le_mmu_mipsel
+#define helper_atomic_fetch_addw_be helper_atomic_fetch_addw_be_mipsel
+#define helper_atomic_fetch_addw_be_mmu helper_atomic_fetch_addw_be_mmu_mipsel
+#define helper_atomic_fetch_addw_le helper_atomic_fetch_addw_le_mipsel
+#define helper_atomic_fetch_addw_le_mmu helper_atomic_fetch_addw_le_mmu_mipsel
+#define helper_atomic_fetch_andb helper_atomic_fetch_andb_mipsel
+#define helper_atomic_fetch_andb_mmu helper_atomic_fetch_andb_mmu_mipsel
+#define helper_atomic_fetch_andl_be helper_atomic_fetch_andl_be_mipsel
+#define helper_atomic_fetch_andl_be_mmu helper_atomic_fetch_andl_be_mmu_mipsel
+#define helper_atomic_fetch_andl_le helper_atomic_fetch_andl_le_mipsel
+#define helper_atomic_fetch_andl_le_mmu helper_atomic_fetch_andl_le_mmu_mipsel
+#define helper_atomic_fetch_andq_be helper_atomic_fetch_andq_be_mipsel
+#define helper_atomic_fetch_andq_be_mmu helper_atomic_fetch_andq_be_mmu_mipsel
+#define helper_atomic_fetch_andq_le helper_atomic_fetch_andq_le_mipsel
+#define helper_atomic_fetch_andq_le_mmu helper_atomic_fetch_andq_le_mmu_mipsel
+#define helper_atomic_fetch_andw_be helper_atomic_fetch_andw_be_mipsel
+#define helper_atomic_fetch_andw_be_mmu helper_atomic_fetch_andw_be_mmu_mipsel
+#define helper_atomic_fetch_andw_le helper_atomic_fetch_andw_le_mipsel
+#define helper_atomic_fetch_andw_le_mmu helper_atomic_fetch_andw_le_mmu_mipsel
+#define helper_atomic_fetch_orb helper_atomic_fetch_orb_mipsel
+#define helper_atomic_fetch_orb_mmu helper_atomic_fetch_orb_mmu_mipsel
+#define helper_atomic_fetch_orl_be helper_atomic_fetch_orl_be_mipsel
+#define helper_atomic_fetch_orl_be_mmu helper_atomic_fetch_orl_be_mmu_mipsel
+#define helper_atomic_fetch_orl_le helper_atomic_fetch_orl_le_mipsel
+#define helper_atomic_fetch_orl_le_mmu helper_atomic_fetch_orl_le_mmu_mipsel
+#define helper_atomic_fetch_orq_be helper_atomic_fetch_orq_be_mipsel
+#define helper_atomic_fetch_orq_be_mmu helper_atomic_fetch_orq_be_mmu_mipsel
+#define helper_atomic_fetch_orq_le helper_atomic_fetch_orq_le_mipsel
+#define helper_atomic_fetch_orq_le_mmu helper_atomic_fetch_orq_le_mmu_mipsel
+#define helper_atomic_fetch_orw_be helper_atomic_fetch_orw_be_mipsel
+#define helper_atomic_fetch_orw_be_mmu helper_atomic_fetch_orw_be_mmu_mipsel
+#define helper_atomic_fetch_orw_le helper_atomic_fetch_orw_le_mipsel
+#define helper_atomic_fetch_orw_le_mmu helper_atomic_fetch_orw_le_mmu_mipsel
+#define helper_atomic_fetch_xorb helper_atomic_fetch_xorb_mipsel
+#define helper_atomic_fetch_xorb_mmu helper_atomic_fetch_xorb_mmu_mipsel
+#define helper_atomic_fetch_xorl_be helper_atomic_fetch_xorl_be_mipsel
+#define helper_atomic_fetch_xorl_be_mmu helper_atomic_fetch_xorl_be_mmu_mipsel
+#define helper_atomic_fetch_xorl_le helper_atomic_fetch_xorl_le_mipsel
+#define helper_atomic_fetch_xorl_le_mmu helper_atomic_fetch_xorl_le_mmu_mipsel
+#define helper_atomic_fetch_xorq_be helper_atomic_fetch_xorq_be_mipsel
+#define helper_atomic_fetch_xorq_be_mmu helper_atomic_fetch_xorq_be_mmu_mipsel
+#define helper_atomic_fetch_xorq_le helper_atomic_fetch_xorq_le_mipsel
+#define helper_atomic_fetch_xorq_le_mmu helper_atomic_fetch_xorq_le_mmu_mipsel
+#define helper_atomic_fetch_xorw_be helper_atomic_fetch_xorw_be_mipsel
+#define helper_atomic_fetch_xorw_be_mmu helper_atomic_fetch_xorw_be_mmu_mipsel
+#define helper_atomic_fetch_xorw_le helper_atomic_fetch_xorw_le_mipsel
+#define helper_atomic_fetch_xorw_le_mmu helper_atomic_fetch_xorw_le_mmu_mipsel
+#define helper_atomic_or_fetchb helper_atomic_or_fetchb_mipsel
+#define helper_atomic_or_fetchb_mmu helper_atomic_or_fetchb_mmu_mipsel
+#define helper_atomic_or_fetchl_be helper_atomic_or_fetchl_be_mipsel
+#define helper_atomic_or_fetchl_be_mmu helper_atomic_or_fetchl_be_mmu_mipsel
+#define helper_atomic_or_fetchl_le helper_atomic_or_fetchl_le_mipsel
+#define helper_atomic_or_fetchl_le_mmu helper_atomic_or_fetchl_le_mmu_mipsel
+#define helper_atomic_or_fetchq_be helper_atomic_or_fetchq_be_mipsel
+#define helper_atomic_or_fetchq_be_mmu helper_atomic_or_fetchq_be_mmu_mipsel
+#define helper_atomic_or_fetchq_le helper_atomic_or_fetchq_le_mipsel
+#define helper_atomic_or_fetchq_le_mmu helper_atomic_or_fetchq_le_mmu_mipsel
+#define helper_atomic_or_fetchw_be helper_atomic_or_fetchw_be_mipsel
+#define helper_atomic_or_fetchw_be_mmu helper_atomic_or_fetchw_be_mmu_mipsel
+#define helper_atomic_or_fetchw_le helper_atomic_or_fetchw_le_mipsel
+#define helper_atomic_or_fetchw_le_mmu helper_atomic_or_fetchw_le_mmu_mipsel
+#define helper_atomic_xchgb helper_atomic_xchgb_mipsel
+#define helper_atomic_xchgb helper_atomic_xchgb_mipsel
+#define helper_atomic_xchgb_mmu helper_atomic_xchgb_mmu_mipsel
+#define helper_atomic_xchgl_be helper_atomic_xchgl_be_mipsel
+#define helper_atomic_xchgl_be_mmu helper_atomic_xchgl_be_mmu_mipsel
+#define helper_atomic_xchgl_le helper_atomic_xchgl_le_mipsel
+#define helper_atomic_xchgl_le_mmu helper_atomic_xchgl_le_mmu_mipsel
+#define helper_atomic_xchgq_be helper_atomic_xchgq_be_mipsel
+#define helper_atomic_xchgq_be_mmu helper_atomic_xchgq_be_mmu_mipsel
+#define helper_atomic_xchgq_le helper_atomic_xchgq_le_mipsel
+#define helper_atomic_xchgq_le_mmu helper_atomic_xchgq_le_mmu_mipsel
+#define helper_atomic_xchgw_be helper_atomic_xchgw_be_mipsel
+#define helper_atomic_xchgw_be_mmu helper_atomic_xchgw_be_mmu_mipsel
+#define helper_atomic_xchgw_le helper_atomic_xchgw_le_mipsel
+#define helper_atomic_xchgw_le_mmu helper_atomic_xchgw_le_mmu_mipsel
+#define helper_atomic_xor_fetchb helper_atomic_xor_fetchb_mipsel
+#define helper_atomic_xor_fetchb_mmu helper_atomic_xor_fetchb_mmu_mipsel
+#define helper_atomic_xor_fetchl_be helper_atomic_xor_fetchl_be_mipsel
+#define helper_atomic_xor_fetchl_be_mmu helper_atomic_xor_fetchl_be_mmu_mipsel
+#define helper_atomic_xor_fetchl_le helper_atomic_xor_fetchl_le_mipsel
+#define helper_atomic_xor_fetchl_le_mmu helper_atomic_xor_fetchl_le_mmu_mipsel
+#define helper_atomic_xor_fetchq_be helper_atomic_xor_fetchq_be_mipsel
+#define helper_atomic_xor_fetchq_be_mmu helper_atomic_xor_fetchq_be_mmu_mipsel
+#define helper_atomic_xor_fetchq_le helper_atomic_xor_fetchq_le_mipsel
+#define helper_atomic_xor_fetchq_le_mmu helper_atomic_xor_fetchq_le_mmu_mipsel
+#define helper_atomic_xor_fetchw_be helper_atomic_xor_fetchw_be_mipsel
+#define helper_atomic_xor_fetchw_be_mmu helper_atomic_xor_fetchw_be_mmu_mipsel
+#define helper_atomic_xor_fetchw_le helper_atomic_xor_fetchw_le_mipsel
+#define helper_atomic_xor_fetchw_le_mmu helper_atomic_xor_fetchw_le_mmu_mipsel
 #define helper_be_ldl_cmmu helper_be_ldl_cmmu_mipsel
 #define helper_be_ldq_cmmu helper_be_ldq_cmmu_mipsel
 #define helper_be_ldq_mmu helper_be_ldq_mmu_mipsel
@@ -1400,6 +1543,10 @@
 #define helper_crypto_sha256su0 helper_crypto_sha256su0_mipsel
 #define helper_crypto_sha256su1 helper_crypto_sha256su1_mipsel
 #define helper_dc_zva helper_dc_zva_mipsel
+#define helper_div_i32 helper_div_i32_mipsel
+#define helper_div_i64 helper_div_i64_mipsel
+#define helper_divu_i32 helper_divu_i32_mipsel
+#define helper_divu_i64 helper_divu_i64_mipsel
 #define helper_double_saturate helper_double_saturate_mipsel
 #define helper_exception_internal helper_exception_internal_mipsel
 #define helper_exception_return helper_exception_return_mipsel
@@ -1532,6 +1679,10 @@
 #define helper_le_stl_mmu helper_le_stl_mmu_mipsel
 #define helper_le_stq_mmu helper_le_stq_mmu_mipsel
 #define helper_le_stw_mmu helper_le_stw_mmu_mipsel
+#define helper_mulsh_i32 helper_mulsh_i32_mipsel
+#define helper_mulsh_i64 helper_mulsh_i64_mipsel
+#define helper_muluh_i32 helper_muluh_i32_mipsel
+#define helper_muluh_i64 helper_muluh_i64_mipsel
 #define helper_mrs_banked helper_mrs_banked_mipsel
 #define helper_msa_ld_b helper_msa_ld_b_mipsel
 #define helper_msa_ld_d helper_msa_ld_d_mipsel
@@ -1773,6 +1924,10 @@
 #define helper_recpe_f64 helper_recpe_f64_mipsel
 #define helper_recpe_u32 helper_recpe_u32_mipsel
 #define helper_recps_f32 helper_recps_f32_mipsel
+#define helper_rem_i32 helper_rem_i32_mipsel
+#define helper_rem_i64 helper_rem_i64_mipsel
+#define helper_remu_i32 helper_remu_i32_mipsel
+#define helper_remu_i64 helper_remu_i64_mipsel
 #define helper_ret_ldb_cmmu helper_ret_ldb_cmmu_mipsel
 #define helper_ret_ldsb_mmu helper_ret_ldsb_mmu_mipsel
 #define helper_ret_ldub_mmu helper_ret_ldub_mmu_mipsel
@@ -1790,6 +1945,8 @@
 #define helper_sadd8 helper_sadd8_mipsel
 #define helper_saddsubx helper_saddsubx_mipsel
 #define helper_sar_cc helper_sar_cc_mipsel
+#define helper_sar_i32 helper_sar_i32_mipsel
+#define helper_sar_i64 helper_sar_i64_mipsel
 #define helper_sdiv helper_sdiv_mipsel
 #define helper_sel_flags helper_sel_flags_mipsel
 #define helper_set_cp_reg helper_set_cp_reg_mipsel
@@ -1803,7 +1960,10 @@
 #define helper_shadd8 helper_shadd8_mipsel
 #define helper_shaddsubx helper_shaddsubx_mipsel
 #define helper_shl_cc helper_shl_cc_mipsel
+#define helper_shl_i64 helper_shl_i64_mipsel
 #define helper_shr_cc helper_shr_cc_mipsel
+#define helper_shr_i32 helper_shr_i32_mipsel
+#define helper_shr_i64 helper_shr_i64_mipsel
 #define helper_shsub16 helper_shsub16_mipsel
 #define helper_shsub8 helper_shsub8_mipsel
 #define helper_shsubaddx helper_shsubaddx_mipsel
@@ -2756,6 +2916,26 @@
 #define tcg_gen_andc_i64 tcg_gen_andc_i64_mipsel
 #define tcg_gen_andi_i32 tcg_gen_andi_i32_mipsel
 #define tcg_gen_andi_i64 tcg_gen_andi_i64_mipsel
+#define tcg_gen_atomic_add_fetch_i32 tcg_gen_atomic_add_fetch_i32_mipsel
+#define tcg_gen_atomic_add_fetch_i64 tcg_gen_atomic_add_fetch_i64_mipsel
+#define tcg_gen_atomic_and_fetch_i32 tcg_gen_atomic_and_fetch_i32_mipsel
+#define tcg_gen_atomic_and_fetch_i64 tcg_gen_atomic_and_fetch_i64_mipsel
+#define tcg_gen_atomic_cmpxchg_i32 tcg_gen_atomic_cmpxchg_i32_mipsel
+#define tcg_gen_atomic_cmpxchg_i64 tcg_gen_atomic_cmpxchg_i64_mipsel
+#define tcg_gen_atomic_fetch_add_i32 tcg_gen_atomic_fetch_add_i32_mipsel
+#define tcg_gen_atomic_fetch_add_i64 tcg_gen_atomic_fetch_add_i64_mipsel
+#define tcg_gen_atomic_fetch_and_i32 tcg_gen_atomic_fetch_and_i32_mipsel
+#define tcg_gen_atomic_fetch_and_i64 tcg_gen_atomic_fetch_and_i64_mipsel
+#define tcg_gen_atomic_fetch_or_i32 tcg_gen_atomic_fetch_or_i32_mipsel
+#define tcg_gen_atomic_fetch_or_i64 tcg_gen_atomic_fetch_or_i64_mipsel
+#define tcg_gen_atomic_fetch_xor_i32 tcg_gen_atomic_fetch_xor_i32_mipsel
+#define tcg_gen_atomic_fetch_xor_i64 tcg_gen_atomic_fetch_xor_i64_mipsel
+#define tcg_gen_atomic_or_fetch_i32 tcg_gen_atomic_or_fetch_i32_mipsel
+#define tcg_gen_atomic_or_fetch_i64 tcg_gen_atomic_or_fetch_i64_mipsel
+#define tcg_gen_atomic_xchg_i32 tcg_gen_atomic_xchg_i32_mipsel
+#define tcg_gen_atomic_xchg_i64 tcg_gen_atomic_xchg_i64_mipsel
+#define tcg_gen_atomic_xor_fetch_i32 tcg_gen_atomic_xor_fetch_i32_mipsel
+#define tcg_gen_atomic_xor_fetch_i64 tcg_gen_atomic_xor_fetch_i64_mipsel
 #define tcg_gen_br tcg_gen_br_mipsel
 #define tcg_gen_brcond_i32 tcg_gen_brcond_i32_mipsel
 #define tcg_gen_brcond_i64 tcg_gen_brcond_i64_mipsel

qemu/powerpc.h

@@ -1372,6 +1372,149 @@
 #define helper_add_saturate helper_add_saturate_powerpc
 #define helper_add_setq helper_add_setq_powerpc
 #define helper_add_usaturate helper_add_usaturate_powerpc
+#define helper_atomic_add_fetchb helper_atomic_add_fetchb_powerpc
+#define helper_atomic_add_fetchb_mmu helper_atomic_add_fetchb_mmu_powerpc
+#define helper_atomic_add_fetchl_be helper_atomic_add_fetchl_be_powerpc
+#define helper_atomic_add_fetchl_be_mmu helper_atomic_add_fetchl_be_mmu_powerpc
+#define helper_atomic_add_fetchl_le helper_atomic_add_fetchl_le_powerpc
+#define helper_atomic_add_fetchl_le_mmu helper_atomic_add_fetchl_le_mmu_powerpc
+#define helper_atomic_add_fetchq_be helper_atomic_add_fetchq_be_powerpc
+#define helper_atomic_add_fetchq_be_mmu helper_atomic_add_fetchq_be_mmu_powerpc
+#define helper_atomic_add_fetchq_le helper_atomic_add_fetchq_le_powerpc
+#define helper_atomic_add_fetchq_le_mmu helper_atomic_add_fetchq_le_mmu_powerpc
+#define helper_atomic_add_fetchw_be helper_atomic_add_fetchw_be_powerpc
+#define helper_atomic_add_fetchw_be_mmu helper_atomic_add_fetchw_be_mmu_powerpc
+#define helper_atomic_add_fetchw_le helper_atomic_add_fetchw_le_powerpc
+#define helper_atomic_add_fetchw_le_mmu helper_atomic_add_fetchw_le_mmu_powerpc
+#define helper_atomic_and_fetchb helper_atomic_and_fetchb_powerpc
+#define helper_atomic_and_fetchb_le_mmu helper_atomic_and_fetchb_le_mmu_powerpc
+#define helper_atomic_and_fetchb_mmu helper_atomic_and_fetchb_mmu_powerpc
+#define helper_atomic_and_fetchl_be helper_atomic_and_fetchl_be_powerpc
+#define helper_atomic_and_fetchl_be_mmu helper_atomic_and_fetchl_be_mmu_powerpc
+#define helper_atomic_and_fetchl_le helper_atomic_and_fetchl_le_powerpc
+#define helper_atomic_and_fetchl_le_mmu helper_atomic_and_fetchl_le_mmu_powerpc
+#define helper_atomic_and_fetchq_be helper_atomic_and_fetchq_be_powerpc
+#define helper_atomic_and_fetchq_be_mmu helper_atomic_and_fetchq_be_mmu_powerpc
+#define helper_atomic_and_fetchq_le helper_atomic_and_fetchq_le_powerpc
+#define helper_atomic_and_fetchq_le_mmu helper_atomic_and_fetchq_le_mmu_powerpc
+#define helper_atomic_and_fetchw_be helper_atomic_and_fetchw_be_powerpc
+#define helper_atomic_and_fetchw_be_mmu helper_atomic_and_fetchw_be_mmu_powerpc
+#define helper_atomic_and_fetchw_le helper_atomic_and_fetchw_le_powerpc
+#define helper_atomic_and_fetchw_le_mmu helper_atomic_and_fetchw_le_mmu_powerpc
+#define helper_atomic_cmpxchgb helper_atomic_cmpxchgb_powerpc
+#define helper_atomic_cmpxchgb helper_atomic_cmpxchgb_powerpc
+#define helper_atomic_cmpxchgb_mmu helper_atomic_cmpxchgb_mmu_powerpc
+#define helper_atomic_cmpxchgl_be helper_atomic_cmpxchgl_be_powerpc
+#define helper_atomic_cmpxchgl_be_mmu helper_atomic_cmpxchgl_be_mmu_powerpc
+#define helper_atomic_cmpxchgl_le helper_atomic_cmpxchgl_le_powerpc
+#define helper_atomic_cmpxchgl_le_mmu helper_atomic_cmpxchgl_le_mmu_powerpc
+#define helper_atomic_cmpxchgq_be helper_atomic_cmpxchgq_be_powerpc
+#define helper_atomic_cmpxchgq_be_mmu helper_atomic_cmpxchgq_be_mmu_powerpc
+#define helper_atomic_cmpxchgq_le helper_atomic_cmpxchgq_le_powerpc
+#define helper_atomic_cmpxchgq_le_mmu helper_atomic_cmpxchgq_le_mmu_powerpc
+#define helper_atomic_cmpxchgw_be helper_atomic_cmpxchgw_be_powerpc
+#define helper_atomic_cmpxchgw_be_mmu helper_atomic_cmpxchgw_be_mmu_powerpc
+#define helper_atomic_cmpxchgw_le helper_atomic_cmpxchgw_le_powerpc
+#define helper_atomic_cmpxchgw_le_mmu helper_atomic_cmpxchgw_le_mmu_powerpc
+#define helper_atomic_fetch_addb helper_atomic_fetch_addb_powerpc
+#define helper_atomic_fetch_addb_mmu helper_atomic_fetch_addb_mmu_powerpc
+#define helper_atomic_fetch_addl_be helper_atomic_fetch_addl_be_powerpc
+#define helper_atomic_fetch_addl_be_mmu helper_atomic_fetch_addl_be_mmu_powerpc
+#define helper_atomic_fetch_addl_le helper_atomic_fetch_addl_le_powerpc
+#define helper_atomic_fetch_addl_le_mmu helper_atomic_fetch_addl_le_mmu_powerpc
+#define helper_atomic_fetch_addq_be helper_atomic_fetch_addq_be_powerpc
+#define helper_atomic_fetch_addq_be_mmu helper_atomic_fetch_addq_be_mmu_powerpc
+#define helper_atomic_fetch_addq_le helper_atomic_fetch_addq_le_powerpc
+#define helper_atomic_fetch_addq_le_mmu helper_atomic_fetch_addq_le_mmu_powerpc
+#define helper_atomic_fetch_addw_be helper_atomic_fetch_addw_be_powerpc
+#define helper_atomic_fetch_addw_be_mmu helper_atomic_fetch_addw_be_mmu_powerpc
+#define helper_atomic_fetch_addw_le helper_atomic_fetch_addw_le_powerpc
+#define helper_atomic_fetch_addw_le_mmu helper_atomic_fetch_addw_le_mmu_powerpc
+#define helper_atomic_fetch_andb helper_atomic_fetch_andb_powerpc
+#define helper_atomic_fetch_andb_mmu helper_atomic_fetch_andb_mmu_powerpc
+#define helper_atomic_fetch_andl_be helper_atomic_fetch_andl_be_powerpc
+#define helper_atomic_fetch_andl_be_mmu helper_atomic_fetch_andl_be_mmu_powerpc
+#define helper_atomic_fetch_andl_le helper_atomic_fetch_andl_le_powerpc
+#define helper_atomic_fetch_andl_le_mmu helper_atomic_fetch_andl_le_mmu_powerpc
+#define helper_atomic_fetch_andq_be helper_atomic_fetch_andq_be_powerpc
+#define helper_atomic_fetch_andq_be_mmu helper_atomic_fetch_andq_be_mmu_powerpc
+#define helper_atomic_fetch_andq_le helper_atomic_fetch_andq_le_powerpc
+#define helper_atomic_fetch_andq_le_mmu helper_atomic_fetch_andq_le_mmu_powerpc
+#define helper_atomic_fetch_andw_be helper_atomic_fetch_andw_be_powerpc
+#define helper_atomic_fetch_andw_be_mmu helper_atomic_fetch_andw_be_mmu_powerpc
+#define helper_atomic_fetch_andw_le helper_atomic_fetch_andw_le_powerpc
+#define helper_atomic_fetch_andw_le_mmu helper_atomic_fetch_andw_le_mmu_powerpc
+#define helper_atomic_fetch_orb helper_atomic_fetch_orb_powerpc
+#define helper_atomic_fetch_orb_mmu helper_atomic_fetch_orb_mmu_powerpc
+#define helper_atomic_fetch_orl_be helper_atomic_fetch_orl_be_powerpc
+#define helper_atomic_fetch_orl_be_mmu helper_atomic_fetch_orl_be_mmu_powerpc
+#define helper_atomic_fetch_orl_le helper_atomic_fetch_orl_le_powerpc
+#define helper_atomic_fetch_orl_le_mmu helper_atomic_fetch_orl_le_mmu_powerpc
+#define helper_atomic_fetch_orq_be helper_atomic_fetch_orq_be_powerpc
+#define helper_atomic_fetch_orq_be_mmu helper_atomic_fetch_orq_be_mmu_powerpc
+#define helper_atomic_fetch_orq_le helper_atomic_fetch_orq_le_powerpc
+#define helper_atomic_fetch_orq_le_mmu helper_atomic_fetch_orq_le_mmu_powerpc
+#define helper_atomic_fetch_orw_be helper_atomic_fetch_orw_be_powerpc
+#define helper_atomic_fetch_orw_be_mmu helper_atomic_fetch_orw_be_mmu_powerpc
+#define helper_atomic_fetch_orw_le helper_atomic_fetch_orw_le_powerpc
+#define helper_atomic_fetch_orw_le_mmu helper_atomic_fetch_orw_le_mmu_powerpc
+#define helper_atomic_fetch_xorb helper_atomic_fetch_xorb_powerpc
+#define helper_atomic_fetch_xorb_mmu helper_atomic_fetch_xorb_mmu_powerpc
+#define helper_atomic_fetch_xorl_be helper_atomic_fetch_xorl_be_powerpc
+#define helper_atomic_fetch_xorl_be_mmu helper_atomic_fetch_xorl_be_mmu_powerpc
+#define helper_atomic_fetch_xorl_le helper_atomic_fetch_xorl_le_powerpc
+#define helper_atomic_fetch_xorl_le_mmu helper_atomic_fetch_xorl_le_mmu_powerpc
+#define helper_atomic_fetch_xorq_be helper_atomic_fetch_xorq_be_powerpc
+#define helper_atomic_fetch_xorq_be_mmu helper_atomic_fetch_xorq_be_mmu_powerpc
+#define helper_atomic_fetch_xorq_le helper_atomic_fetch_xorq_le_powerpc
+#define helper_atomic_fetch_xorq_le_mmu helper_atomic_fetch_xorq_le_mmu_powerpc
+#define helper_atomic_fetch_xorw_be helper_atomic_fetch_xorw_be_powerpc
+#define helper_atomic_fetch_xorw_be_mmu helper_atomic_fetch_xorw_be_mmu_powerpc
+#define helper_atomic_fetch_xorw_le helper_atomic_fetch_xorw_le_powerpc
+#define helper_atomic_fetch_xorw_le_mmu helper_atomic_fetch_xorw_le_mmu_powerpc
+#define helper_atomic_or_fetchb helper_atomic_or_fetchb_powerpc
+#define helper_atomic_or_fetchb_mmu helper_atomic_or_fetchb_mmu_powerpc
+#define helper_atomic_or_fetchl_be helper_atomic_or_fetchl_be_powerpc
+#define helper_atomic_or_fetchl_be_mmu helper_atomic_or_fetchl_be_mmu_powerpc
+#define helper_atomic_or_fetchl_le helper_atomic_or_fetchl_le_powerpc
+#define helper_atomic_or_fetchl_le_mmu helper_atomic_or_fetchl_le_mmu_powerpc
+#define helper_atomic_or_fetchq_be helper_atomic_or_fetchq_be_powerpc
+#define helper_atomic_or_fetchq_be_mmu helper_atomic_or_fetchq_be_mmu_powerpc
+#define helper_atomic_or_fetchq_le helper_atomic_or_fetchq_le_powerpc
+#define helper_atomic_or_fetchq_le_mmu helper_atomic_or_fetchq_le_mmu_powerpc
+#define helper_atomic_or_fetchw_be helper_atomic_or_fetchw_be_powerpc
+#define helper_atomic_or_fetchw_be_mmu helper_atomic_or_fetchw_be_mmu_powerpc
+#define helper_atomic_or_fetchw_le helper_atomic_or_fetchw_le_powerpc
+#define helper_atomic_or_fetchw_le_mmu helper_atomic_or_fetchw_le_mmu_powerpc
+#define helper_atomic_xchgb helper_atomic_xchgb_powerpc
+#define helper_atomic_xchgb helper_atomic_xchgb_powerpc
+#define helper_atomic_xchgb_mmu helper_atomic_xchgb_mmu_powerpc
+#define helper_atomic_xchgl_be helper_atomic_xchgl_be_powerpc
+#define helper_atomic_xchgl_be_mmu helper_atomic_xchgl_be_mmu_powerpc
+#define helper_atomic_xchgl_le helper_atomic_xchgl_le_powerpc
+#define helper_atomic_xchgl_le_mmu helper_atomic_xchgl_le_mmu_powerpc
+#define helper_atomic_xchgq_be helper_atomic_xchgq_be_powerpc
+#define helper_atomic_xchgq_be_mmu helper_atomic_xchgq_be_mmu_powerpc
+#define helper_atomic_xchgq_le helper_atomic_xchgq_le_powerpc
+#define helper_atomic_xchgq_le_mmu helper_atomic_xchgq_le_mmu_powerpc
+#define helper_atomic_xchgw_be helper_atomic_xchgw_be_powerpc
+#define helper_atomic_xchgw_be_mmu helper_atomic_xchgw_be_mmu_powerpc
+#define helper_atomic_xchgw_le helper_atomic_xchgw_le_powerpc
+#define helper_atomic_xchgw_le_mmu helper_atomic_xchgw_le_mmu_powerpc
+#define helper_atomic_xor_fetchb helper_atomic_xor_fetchb_powerpc
+#define helper_atomic_xor_fetchb_mmu helper_atomic_xor_fetchb_mmu_powerpc
+#define helper_atomic_xor_fetchl_be helper_atomic_xor_fetchl_be_powerpc
+#define helper_atomic_xor_fetchl_be_mmu helper_atomic_xor_fetchl_be_mmu_powerpc
+#define helper_atomic_xor_fetchl_le helper_atomic_xor_fetchl_le_powerpc
+#define helper_atomic_xor_fetchl_le_mmu helper_atomic_xor_fetchl_le_mmu_powerpc
+#define helper_atomic_xor_fetchq_be helper_atomic_xor_fetchq_be_powerpc
+#define helper_atomic_xor_fetchq_be_mmu helper_atomic_xor_fetchq_be_mmu_powerpc
+#define helper_atomic_xor_fetchq_le helper_atomic_xor_fetchq_le_powerpc
+#define helper_atomic_xor_fetchq_le_mmu helper_atomic_xor_fetchq_le_mmu_powerpc
+#define helper_atomic_xor_fetchw_be helper_atomic_xor_fetchw_be_powerpc
+#define helper_atomic_xor_fetchw_be_mmu helper_atomic_xor_fetchw_be_mmu_powerpc
+#define helper_atomic_xor_fetchw_le helper_atomic_xor_fetchw_le_powerpc
+#define helper_atomic_xor_fetchw_le_mmu helper_atomic_xor_fetchw_le_mmu_powerpc
 #define helper_be_ldl_cmmu helper_be_ldl_cmmu_powerpc
 #define helper_be_ldq_cmmu helper_be_ldq_cmmu_powerpc
 #define helper_be_ldq_mmu helper_be_ldq_mmu_powerpc
@@ -1400,6 +1543,10 @@
 #define helper_crypto_sha256su0 helper_crypto_sha256su0_powerpc
 #define helper_crypto_sha256su1 helper_crypto_sha256su1_powerpc
 #define helper_dc_zva helper_dc_zva_powerpc
+#define helper_div_i32 helper_div_i32_powerpc
+#define helper_div_i64 helper_div_i64_powerpc
+#define helper_divu_i32 helper_divu_i32_powerpc
+#define helper_divu_i64 helper_divu_i64_powerpc
 #define helper_double_saturate helper_double_saturate_powerpc
 #define helper_exception_internal helper_exception_internal_powerpc
 #define helper_exception_return helper_exception_return_powerpc
@@ -1532,6 +1679,10 @@
 #define helper_le_stl_mmu helper_le_stl_mmu_powerpc
 #define helper_le_stq_mmu helper_le_stq_mmu_powerpc
 #define helper_le_stw_mmu helper_le_stw_mmu_powerpc
+#define helper_mulsh_i32 helper_mulsh_i32_powerpc
+#define helper_mulsh_i64 helper_mulsh_i64_powerpc
+#define helper_muluh_i32 helper_muluh_i32_powerpc
+#define helper_muluh_i64 helper_muluh_i64_powerpc
 #define helper_mrs_banked helper_mrs_banked_powerpc
 #define helper_msa_ld_b helper_msa_ld_b_powerpc
 #define helper_msa_ld_d helper_msa_ld_d_powerpc
@@ -1773,6 +1924,10 @@
 #define helper_recpe_f64 helper_recpe_f64_powerpc
 #define helper_recpe_u32 helper_recpe_u32_powerpc
 #define helper_recps_f32 helper_recps_f32_powerpc
+#define helper_rem_i32 helper_rem_i32_powerpc
+#define helper_rem_i64 helper_rem_i64_powerpc
+#define helper_remu_i32 helper_remu_i32_powerpc
+#define helper_remu_i64 helper_remu_i64_powerpc
 #define helper_ret_ldb_cmmu helper_ret_ldb_cmmu_powerpc
 #define helper_ret_ldsb_mmu helper_ret_ldsb_mmu_powerpc
 #define helper_ret_ldub_mmu helper_ret_ldub_mmu_powerpc
@@ -1790,6 +1945,8 @@
 #define helper_sadd8 helper_sadd8_powerpc
 #define helper_saddsubx helper_saddsubx_powerpc
 #define helper_sar_cc helper_sar_cc_powerpc
+#define helper_sar_i32 helper_sar_i32_powerpc
+#define helper_sar_i64 helper_sar_i64_powerpc
 #define helper_sdiv helper_sdiv_powerpc
 #define helper_sel_flags helper_sel_flags_powerpc
 #define helper_set_cp_reg helper_set_cp_reg_powerpc
@@ -1803,7 +1960,10 @@
 #define helper_shadd8 helper_shadd8_powerpc
 #define helper_shaddsubx helper_shaddsubx_powerpc
 #define helper_shl_cc helper_shl_cc_powerpc
+#define helper_shl_i64 helper_shl_i64_powerpc
 #define helper_shr_cc helper_shr_cc_powerpc
+#define helper_shr_i32 helper_shr_i32_powerpc
+#define helper_shr_i64 helper_shr_i64_powerpc
 #define helper_shsub16 helper_shsub16_powerpc
 #define helper_shsub8 helper_shsub8_powerpc
 #define helper_shsubaddx helper_shsubaddx_powerpc
@@ -2756,6 +2916,26 @@
 #define tcg_gen_andc_i64 tcg_gen_andc_i64_powerpc
 #define tcg_gen_andi_i32 tcg_gen_andi_i32_powerpc
 #define tcg_gen_andi_i64 tcg_gen_andi_i64_powerpc
+#define tcg_gen_atomic_add_fetch_i32 tcg_gen_atomic_add_fetch_i32_powerpc
+#define tcg_gen_atomic_add_fetch_i64 tcg_gen_atomic_add_fetch_i64_powerpc
+#define tcg_gen_atomic_and_fetch_i32 tcg_gen_atomic_and_fetch_i32_powerpc
+#define tcg_gen_atomic_and_fetch_i64 tcg_gen_atomic_and_fetch_i64_powerpc
+#define tcg_gen_atomic_cmpxchg_i32 tcg_gen_atomic_cmpxchg_i32_powerpc
+#define tcg_gen_atomic_cmpxchg_i64 tcg_gen_atomic_cmpxchg_i64_powerpc
+#define tcg_gen_atomic_fetch_add_i32 tcg_gen_atomic_fetch_add_i32_powerpc
+#define tcg_gen_atomic_fetch_add_i64 tcg_gen_atomic_fetch_add_i64_powerpc
+#define tcg_gen_atomic_fetch_and_i32 tcg_gen_atomic_fetch_and_i32_powerpc
+#define tcg_gen_atomic_fetch_and_i64 tcg_gen_atomic_fetch_and_i64_powerpc
+#define tcg_gen_atomic_fetch_or_i32 tcg_gen_atomic_fetch_or_i32_powerpc
+#define tcg_gen_atomic_fetch_or_i64 tcg_gen_atomic_fetch_or_i64_powerpc
+#define tcg_gen_atomic_fetch_xor_i32 tcg_gen_atomic_fetch_xor_i32_powerpc
+#define tcg_gen_atomic_fetch_xor_i64 tcg_gen_atomic_fetch_xor_i64_powerpc
+#define tcg_gen_atomic_or_fetch_i32 tcg_gen_atomic_or_fetch_i32_powerpc
+#define tcg_gen_atomic_or_fetch_i64 tcg_gen_atomic_or_fetch_i64_powerpc
+#define tcg_gen_atomic_xchg_i32 tcg_gen_atomic_xchg_i32_powerpc
+#define tcg_gen_atomic_xchg_i64 tcg_gen_atomic_xchg_i64_powerpc
+#define tcg_gen_atomic_xor_fetch_i32 tcg_gen_atomic_xor_fetch_i32_powerpc
+#define tcg_gen_atomic_xor_fetch_i64 tcg_gen_atomic_xor_fetch_i64_powerpc
 #define tcg_gen_br tcg_gen_br_powerpc
 #define tcg_gen_brcond_i32 tcg_gen_brcond_i32_powerpc
 #define tcg_gen_brcond_i64 tcg_gen_brcond_i64_powerpc

qemu/sparc.h

@@ -1372,6 +1372,149 @@
 #define helper_add_saturate helper_add_saturate_sparc
 #define helper_add_setq helper_add_setq_sparc
 #define helper_add_usaturate helper_add_usaturate_sparc
+#define helper_atomic_add_fetchb helper_atomic_add_fetchb_sparc
+#define helper_atomic_add_fetchb_mmu helper_atomic_add_fetchb_mmu_sparc
+#define helper_atomic_add_fetchl_be helper_atomic_add_fetchl_be_sparc
+#define helper_atomic_add_fetchl_be_mmu helper_atomic_add_fetchl_be_mmu_sparc
+#define helper_atomic_add_fetchl_le helper_atomic_add_fetchl_le_sparc
+#define helper_atomic_add_fetchl_le_mmu helper_atomic_add_fetchl_le_mmu_sparc
+#define helper_atomic_add_fetchq_be helper_atomic_add_fetchq_be_sparc
+#define helper_atomic_add_fetchq_be_mmu helper_atomic_add_fetchq_be_mmu_sparc
+#define helper_atomic_add_fetchq_le helper_atomic_add_fetchq_le_sparc
+#define helper_atomic_add_fetchq_le_mmu helper_atomic_add_fetchq_le_mmu_sparc
+#define helper_atomic_add_fetchw_be helper_atomic_add_fetchw_be_sparc
+#define helper_atomic_add_fetchw_be_mmu helper_atomic_add_fetchw_be_mmu_sparc
+#define helper_atomic_add_fetchw_le helper_atomic_add_fetchw_le_sparc
+#define helper_atomic_add_fetchw_le_mmu helper_atomic_add_fetchw_le_mmu_sparc
+#define helper_atomic_and_fetchb helper_atomic_and_fetchb_sparc
+#define helper_atomic_and_fetchb_le_mmu helper_atomic_and_fetchb_le_mmu_sparc
+#define helper_atomic_and_fetchb_mmu helper_atomic_and_fetchb_mmu_sparc
+#define helper_atomic_and_fetchl_be helper_atomic_and_fetchl_be_sparc
+#define helper_atomic_and_fetchl_be_mmu helper_atomic_and_fetchl_be_mmu_sparc
+#define helper_atomic_and_fetchl_le helper_atomic_and_fetchl_le_sparc
+#define helper_atomic_and_fetchl_le_mmu helper_atomic_and_fetchl_le_mmu_sparc
+#define helper_atomic_and_fetchq_be helper_atomic_and_fetchq_be_sparc
+#define helper_atomic_and_fetchq_be_mmu helper_atomic_and_fetchq_be_mmu_sparc
+#define helper_atomic_and_fetchq_le helper_atomic_and_fetchq_le_sparc
+#define helper_atomic_and_fetchq_le_mmu helper_atomic_and_fetchq_le_mmu_sparc
+#define helper_atomic_and_fetchw_be helper_atomic_and_fetchw_be_sparc
+#define helper_atomic_and_fetchw_be_mmu helper_atomic_and_fetchw_be_mmu_sparc
+#define helper_atomic_and_fetchw_le helper_atomic_and_fetchw_le_sparc
+#define helper_atomic_and_fetchw_le_mmu helper_atomic_and_fetchw_le_mmu_sparc
+#define helper_atomic_cmpxchgb helper_atomic_cmpxchgb_sparc
+#define helper_atomic_cmpxchgb helper_atomic_cmpxchgb_sparc
+#define helper_atomic_cmpxchgb_mmu helper_atomic_cmpxchgb_mmu_sparc
+#define helper_atomic_cmpxchgl_be helper_atomic_cmpxchgl_be_sparc
+#define helper_atomic_cmpxchgl_be_mmu helper_atomic_cmpxchgl_be_mmu_sparc
+#define helper_atomic_cmpxchgl_le helper_atomic_cmpxchgl_le_sparc
+#define helper_atomic_cmpxchgl_le_mmu helper_atomic_cmpxchgl_le_mmu_sparc
+#define helper_atomic_cmpxchgq_be helper_atomic_cmpxchgq_be_sparc
+#define helper_atomic_cmpxchgq_be_mmu helper_atomic_cmpxchgq_be_mmu_sparc
+#define helper_atomic_cmpxchgq_le helper_atomic_cmpxchgq_le_sparc
+#define helper_atomic_cmpxchgq_le_mmu helper_atomic_cmpxchgq_le_mmu_sparc
+#define helper_atomic_cmpxchgw_be helper_atomic_cmpxchgw_be_sparc
+#define helper_atomic_cmpxchgw_be_mmu helper_atomic_cmpxchgw_be_mmu_sparc
+#define helper_atomic_cmpxchgw_le helper_atomic_cmpxchgw_le_sparc
+#define helper_atomic_cmpxchgw_le_mmu helper_atomic_cmpxchgw_le_mmu_sparc
+#define helper_atomic_fetch_addb helper_atomic_fetch_addb_sparc
+#define helper_atomic_fetch_addb_mmu helper_atomic_fetch_addb_mmu_sparc
+#define helper_atomic_fetch_addl_be helper_atomic_fetch_addl_be_sparc
+#define helper_atomic_fetch_addl_be_mmu helper_atomic_fetch_addl_be_mmu_sparc
+#define helper_atomic_fetch_addl_le helper_atomic_fetch_addl_le_sparc
+#define helper_atomic_fetch_addl_le_mmu helper_atomic_fetch_addl_le_mmu_sparc
+#define helper_atomic_fetch_addq_be helper_atomic_fetch_addq_be_sparc
+#define helper_atomic_fetch_addq_be_mmu helper_atomic_fetch_addq_be_mmu_sparc
+#define helper_atomic_fetch_addq_le helper_atomic_fetch_addq_le_sparc
+#define helper_atomic_fetch_addq_le_mmu helper_atomic_fetch_addq_le_mmu_sparc
+#define helper_atomic_fetch_addw_be helper_atomic_fetch_addw_be_sparc
+#define helper_atomic_fetch_addw_be_mmu helper_atomic_fetch_addw_be_mmu_sparc
+#define helper_atomic_fetch_addw_le helper_atomic_fetch_addw_le_sparc
+#define helper_atomic_fetch_addw_le_mmu helper_atomic_fetch_addw_le_mmu_sparc
+#define helper_atomic_fetch_andb helper_atomic_fetch_andb_sparc
+#define helper_atomic_fetch_andb_mmu helper_atomic_fetch_andb_mmu_sparc
+#define helper_atomic_fetch_andl_be helper_atomic_fetch_andl_be_sparc
+#define helper_atomic_fetch_andl_be_mmu helper_atomic_fetch_andl_be_mmu_sparc
+#define helper_atomic_fetch_andl_le helper_atomic_fetch_andl_le_sparc
+#define helper_atomic_fetch_andl_le_mmu helper_atomic_fetch_andl_le_mmu_sparc
+#define helper_atomic_fetch_andq_be helper_atomic_fetch_andq_be_sparc
+#define helper_atomic_fetch_andq_be_mmu helper_atomic_fetch_andq_be_mmu_sparc
+#define helper_atomic_fetch_andq_le helper_atomic_fetch_andq_le_sparc
+#define helper_atomic_fetch_andq_le_mmu helper_atomic_fetch_andq_le_mmu_sparc
+#define helper_atomic_fetch_andw_be helper_atomic_fetch_andw_be_sparc
+#define helper_atomic_fetch_andw_be_mmu helper_atomic_fetch_andw_be_mmu_sparc
+#define helper_atomic_fetch_andw_le helper_atomic_fetch_andw_le_sparc
+#define helper_atomic_fetch_andw_le_mmu helper_atomic_fetch_andw_le_mmu_sparc
+#define helper_atomic_fetch_orb helper_atomic_fetch_orb_sparc
+#define helper_atomic_fetch_orb_mmu helper_atomic_fetch_orb_mmu_sparc
+#define helper_atomic_fetch_orl_be helper_atomic_fetch_orl_be_sparc
+#define helper_atomic_fetch_orl_be_mmu helper_atomic_fetch_orl_be_mmu_sparc
+#define helper_atomic_fetch_orl_le helper_atomic_fetch_orl_le_sparc
+#define helper_atomic_fetch_orl_le_mmu helper_atomic_fetch_orl_le_mmu_sparc
+#define helper_atomic_fetch_orq_be helper_atomic_fetch_orq_be_sparc
+#define helper_atomic_fetch_orq_be_mmu helper_atomic_fetch_orq_be_mmu_sparc
+#define helper_atomic_fetch_orq_le helper_atomic_fetch_orq_le_sparc
+#define helper_atomic_fetch_orq_le_mmu helper_atomic_fetch_orq_le_mmu_sparc
+#define helper_atomic_fetch_orw_be helper_atomic_fetch_orw_be_sparc
+#define helper_atomic_fetch_orw_be_mmu helper_atomic_fetch_orw_be_mmu_sparc
+#define helper_atomic_fetch_orw_le helper_atomic_fetch_orw_le_sparc
+#define helper_atomic_fetch_orw_le_mmu helper_atomic_fetch_orw_le_mmu_sparc
+#define helper_atomic_fetch_xorb helper_atomic_fetch_xorb_sparc
+#define helper_atomic_fetch_xorb_mmu helper_atomic_fetch_xorb_mmu_sparc
+#define helper_atomic_fetch_xorl_be helper_atomic_fetch_xorl_be_sparc
+#define helper_atomic_fetch_xorl_be_mmu helper_atomic_fetch_xorl_be_mmu_sparc
+#define helper_atomic_fetch_xorl_le helper_atomic_fetch_xorl_le_sparc
+#define helper_atomic_fetch_xorl_le_mmu helper_atomic_fetch_xorl_le_mmu_sparc
+#define helper_atomic_fetch_xorq_be helper_atomic_fetch_xorq_be_sparc
+#define helper_atomic_fetch_xorq_be_mmu helper_atomic_fetch_xorq_be_mmu_sparc
+#define helper_atomic_fetch_xorq_le helper_atomic_fetch_xorq_le_sparc
+#define helper_atomic_fetch_xorq_le_mmu helper_atomic_fetch_xorq_le_mmu_sparc
+#define helper_atomic_fetch_xorw_be helper_atomic_fetch_xorw_be_sparc
+#define helper_atomic_fetch_xorw_be_mmu helper_atomic_fetch_xorw_be_mmu_sparc
+#define helper_atomic_fetch_xorw_le helper_atomic_fetch_xorw_le_sparc
+#define helper_atomic_fetch_xorw_le_mmu helper_atomic_fetch_xorw_le_mmu_sparc
+#define helper_atomic_or_fetchb helper_atomic_or_fetchb_sparc
+#define helper_atomic_or_fetchb_mmu helper_atomic_or_fetchb_mmu_sparc
+#define helper_atomic_or_fetchl_be helper_atomic_or_fetchl_be_sparc
+#define helper_atomic_or_fetchl_be_mmu helper_atomic_or_fetchl_be_mmu_sparc
+#define helper_atomic_or_fetchl_le helper_atomic_or_fetchl_le_sparc
+#define helper_atomic_or_fetchl_le_mmu helper_atomic_or_fetchl_le_mmu_sparc
+#define helper_atomic_or_fetchq_be helper_atomic_or_fetchq_be_sparc
+#define helper_atomic_or_fetchq_be_mmu helper_atomic_or_fetchq_be_mmu_sparc
+#define helper_atomic_or_fetchq_le helper_atomic_or_fetchq_le_sparc
+#define helper_atomic_or_fetchq_le_mmu helper_atomic_or_fetchq_le_mmu_sparc
+#define helper_atomic_or_fetchw_be helper_atomic_or_fetchw_be_sparc
+#define helper_atomic_or_fetchw_be_mmu helper_atomic_or_fetchw_be_mmu_sparc
+#define helper_atomic_or_fetchw_le helper_atomic_or_fetchw_le_sparc
+#define helper_atomic_or_fetchw_le_mmu helper_atomic_or_fetchw_le_mmu_sparc
+#define helper_atomic_xchgb helper_atomic_xchgb_sparc
+#define helper_atomic_xchgb helper_atomic_xchgb_sparc
+#define helper_atomic_xchgb_mmu helper_atomic_xchgb_mmu_sparc
+#define helper_atomic_xchgl_be helper_atomic_xchgl_be_sparc
+#define helper_atomic_xchgl_be_mmu helper_atomic_xchgl_be_mmu_sparc
+#define helper_atomic_xchgl_le helper_atomic_xchgl_le_sparc
+#define helper_atomic_xchgl_le_mmu helper_atomic_xchgl_le_mmu_sparc
+#define helper_atomic_xchgq_be helper_atomic_xchgq_be_sparc
+#define helper_atomic_xchgq_be_mmu helper_atomic_xchgq_be_mmu_sparc
+#define helper_atomic_xchgq_le helper_atomic_xchgq_le_sparc
+#define helper_atomic_xchgq_le_mmu helper_atomic_xchgq_le_mmu_sparc
+#define helper_atomic_xchgw_be helper_atomic_xchgw_be_sparc
+#define helper_atomic_xchgw_be_mmu helper_atomic_xchgw_be_mmu_sparc
+#define helper_atomic_xchgw_le helper_atomic_xchgw_le_sparc
+#define helper_atomic_xchgw_le_mmu helper_atomic_xchgw_le_mmu_sparc
+#define helper_atomic_xor_fetchb helper_atomic_xor_fetchb_sparc
+#define helper_atomic_xor_fetchb_mmu helper_atomic_xor_fetchb_mmu_sparc
+#define helper_atomic_xor_fetchl_be helper_atomic_xor_fetchl_be_sparc
+#define helper_atomic_xor_fetchl_be_mmu helper_atomic_xor_fetchl_be_mmu_sparc
+#define helper_atomic_xor_fetchl_le helper_atomic_xor_fetchl_le_sparc
+#define helper_atomic_xor_fetchl_le_mmu helper_atomic_xor_fetchl_le_mmu_sparc
+#define helper_atomic_xor_fetchq_be helper_atomic_xor_fetchq_be_sparc
+#define helper_atomic_xor_fetchq_be_mmu helper_atomic_xor_fetchq_be_mmu_sparc
+#define helper_atomic_xor_fetchq_le helper_atomic_xor_fetchq_le_sparc
+#define helper_atomic_xor_fetchq_le_mmu helper_atomic_xor_fetchq_le_mmu_sparc
+#define helper_atomic_xor_fetchw_be helper_atomic_xor_fetchw_be_sparc
+#define helper_atomic_xor_fetchw_be_mmu helper_atomic_xor_fetchw_be_mmu_sparc
+#define helper_atomic_xor_fetchw_le helper_atomic_xor_fetchw_le_sparc
+#define helper_atomic_xor_fetchw_le_mmu helper_atomic_xor_fetchw_le_mmu_sparc
 #define helper_be_ldl_cmmu helper_be_ldl_cmmu_sparc
 #define helper_be_ldq_cmmu helper_be_ldq_cmmu_sparc
 #define helper_be_ldq_mmu helper_be_ldq_mmu_sparc
@@ -1400,6 +1543,10 @@
 #define helper_crypto_sha256su0 helper_crypto_sha256su0_sparc
 #define helper_crypto_sha256su1 helper_crypto_sha256su1_sparc
 #define helper_dc_zva helper_dc_zva_sparc
+#define helper_div_i32 helper_div_i32_sparc
+#define helper_div_i64 helper_div_i64_sparc
+#define helper_divu_i32 helper_divu_i32_sparc
+#define helper_divu_i64 helper_divu_i64_sparc
 #define helper_double_saturate helper_double_saturate_sparc
 #define helper_exception_internal helper_exception_internal_sparc
 #define helper_exception_return helper_exception_return_sparc
@@ -1532,6 +1679,10 @@
 #define helper_le_stl_mmu helper_le_stl_mmu_sparc
 #define helper_le_stq_mmu helper_le_stq_mmu_sparc
 #define helper_le_stw_mmu helper_le_stw_mmu_sparc
+#define helper_mulsh_i32 helper_mulsh_i32_sparc
+#define helper_mulsh_i64 helper_mulsh_i64_sparc
+#define helper_muluh_i32 helper_muluh_i32_sparc
+#define helper_muluh_i64 helper_muluh_i64_sparc
 #define helper_mrs_banked helper_mrs_banked_sparc
 #define helper_msa_ld_b helper_msa_ld_b_sparc
 #define helper_msa_ld_d helper_msa_ld_d_sparc
@@ -1773,6 +1924,10 @@
 #define helper_recpe_f64 helper_recpe_f64_sparc
 #define helper_recpe_u32 helper_recpe_u32_sparc
 #define helper_recps_f32 helper_recps_f32_sparc
+#define helper_rem_i32 helper_rem_i32_sparc
+#define helper_rem_i64 helper_rem_i64_sparc
+#define helper_remu_i32 helper_remu_i32_sparc
+#define helper_remu_i64 helper_remu_i64_sparc
 #define helper_ret_ldb_cmmu helper_ret_ldb_cmmu_sparc
 #define helper_ret_ldsb_mmu helper_ret_ldsb_mmu_sparc
 #define helper_ret_ldub_mmu helper_ret_ldub_mmu_sparc
@@ -1790,6 +1945,8 @@
 #define helper_sadd8 helper_sadd8_sparc
 #define helper_saddsubx helper_saddsubx_sparc
 #define helper_sar_cc helper_sar_cc_sparc
+#define helper_sar_i32 helper_sar_i32_sparc
+#define helper_sar_i64 helper_sar_i64_sparc
 #define helper_sdiv helper_sdiv_sparc
 #define helper_sel_flags helper_sel_flags_sparc
 #define helper_set_cp_reg helper_set_cp_reg_sparc
@@ -1803,7 +1960,10 @@
 #define helper_shadd8 helper_shadd8_sparc
 #define helper_shaddsubx helper_shaddsubx_sparc
 #define helper_shl_cc helper_shl_cc_sparc
+#define helper_shl_i64 helper_shl_i64_sparc
 #define helper_shr_cc helper_shr_cc_sparc
+#define helper_shr_i32 helper_shr_i32_sparc
+#define helper_shr_i64 helper_shr_i64_sparc
 #define helper_shsub16 helper_shsub16_sparc
 #define helper_shsub8 helper_shsub8_sparc
 #define helper_shsubaddx helper_shsubaddx_sparc
@@ -2756,6 +2916,26 @@
 #define tcg_gen_andc_i64 tcg_gen_andc_i64_sparc
 #define tcg_gen_andi_i32 tcg_gen_andi_i32_sparc
 #define tcg_gen_andi_i64 tcg_gen_andi_i64_sparc
+#define tcg_gen_atomic_add_fetch_i32 tcg_gen_atomic_add_fetch_i32_sparc
+#define tcg_gen_atomic_add_fetch_i64 tcg_gen_atomic_add_fetch_i64_sparc
+#define tcg_gen_atomic_and_fetch_i32 tcg_gen_atomic_and_fetch_i32_sparc
+#define tcg_gen_atomic_and_fetch_i64 tcg_gen_atomic_and_fetch_i64_sparc
+#define tcg_gen_atomic_cmpxchg_i32 tcg_gen_atomic_cmpxchg_i32_sparc
+#define tcg_gen_atomic_cmpxchg_i64 tcg_gen_atomic_cmpxchg_i64_sparc
+#define tcg_gen_atomic_fetch_add_i32 tcg_gen_atomic_fetch_add_i32_sparc
+#define tcg_gen_atomic_fetch_add_i64 tcg_gen_atomic_fetch_add_i64_sparc
+#define tcg_gen_atomic_fetch_and_i32 tcg_gen_atomic_fetch_and_i32_sparc
+#define tcg_gen_atomic_fetch_and_i64 tcg_gen_atomic_fetch_and_i64_sparc
+#define tcg_gen_atomic_fetch_or_i32 tcg_gen_atomic_fetch_or_i32_sparc
+#define tcg_gen_atomic_fetch_or_i64 tcg_gen_atomic_fetch_or_i64_sparc
+#define tcg_gen_atomic_fetch_xor_i32 tcg_gen_atomic_fetch_xor_i32_sparc
+#define tcg_gen_atomic_fetch_xor_i64 tcg_gen_atomic_fetch_xor_i64_sparc
+#define tcg_gen_atomic_or_fetch_i32 tcg_gen_atomic_or_fetch_i32_sparc
+#define tcg_gen_atomic_or_fetch_i64 tcg_gen_atomic_or_fetch_i64_sparc
+#define tcg_gen_atomic_xchg_i32 tcg_gen_atomic_xchg_i32_sparc
+#define tcg_gen_atomic_xchg_i64 tcg_gen_atomic_xchg_i64_sparc
+#define tcg_gen_atomic_xor_fetch_i32 tcg_gen_atomic_xor_fetch_i32_sparc
+#define tcg_gen_atomic_xor_fetch_i64 tcg_gen_atomic_xor_fetch_i64_sparc
 #define tcg_gen_br tcg_gen_br_sparc
 #define tcg_gen_brcond_i32 tcg_gen_brcond_i32_sparc
 #define tcg_gen_brcond_i64 tcg_gen_brcond_i64_sparc

qemu/sparc64.h

@@ -1372,6 +1372,149 @@
 #define helper_add_saturate helper_add_saturate_sparc64
 #define helper_add_setq helper_add_setq_sparc64
 #define helper_add_usaturate helper_add_usaturate_sparc64
+#define helper_atomic_add_fetchb helper_atomic_add_fetchb_sparc64
+#define helper_atomic_add_fetchb_mmu helper_atomic_add_fetchb_mmu_sparc64
+#define helper_atomic_add_fetchl_be helper_atomic_add_fetchl_be_sparc64
+#define helper_atomic_add_fetchl_be_mmu helper_atomic_add_fetchl_be_mmu_sparc64
+#define helper_atomic_add_fetchl_le helper_atomic_add_fetchl_le_sparc64
+#define helper_atomic_add_fetchl_le_mmu helper_atomic_add_fetchl_le_mmu_sparc64
+#define helper_atomic_add_fetchq_be helper_atomic_add_fetchq_be_sparc64
+#define helper_atomic_add_fetchq_be_mmu helper_atomic_add_fetchq_be_mmu_sparc64
+#define helper_atomic_add_fetchq_le helper_atomic_add_fetchq_le_sparc64
+#define helper_atomic_add_fetchq_le_mmu helper_atomic_add_fetchq_le_mmu_sparc64
+#define helper_atomic_add_fetchw_be helper_atomic_add_fetchw_be_sparc64
+#define helper_atomic_add_fetchw_be_mmu helper_atomic_add_fetchw_be_mmu_sparc64
+#define helper_atomic_add_fetchw_le helper_atomic_add_fetchw_le_sparc64
+#define helper_atomic_add_fetchw_le_mmu helper_atomic_add_fetchw_le_mmu_sparc64
+#define helper_atomic_and_fetchb helper_atomic_and_fetchb_sparc64
+#define helper_atomic_and_fetchb_le_mmu helper_atomic_and_fetchb_le_mmu_sparc64
+#define helper_atomic_and_fetchb_mmu helper_atomic_and_fetchb_mmu_sparc64
+#define helper_atomic_and_fetchl_be helper_atomic_and_fetchl_be_sparc64
+#define helper_atomic_and_fetchl_be_mmu helper_atomic_and_fetchl_be_mmu_sparc64
+#define helper_atomic_and_fetchl_le helper_atomic_and_fetchl_le_sparc64
+#define helper_atomic_and_fetchl_le_mmu helper_atomic_and_fetchl_le_mmu_sparc64
+#define helper_atomic_and_fetchq_be helper_atomic_and_fetchq_be_sparc64
+#define helper_atomic_and_fetchq_be_mmu helper_atomic_and_fetchq_be_mmu_sparc64
+#define helper_atomic_and_fetchq_le helper_atomic_and_fetchq_le_sparc64
+#define helper_atomic_and_fetchq_le_mmu helper_atomic_and_fetchq_le_mmu_sparc64
+#define helper_atomic_and_fetchw_be helper_atomic_and_fetchw_be_sparc64
+#define helper_atomic_and_fetchw_be_mmu helper_atomic_and_fetchw_be_mmu_sparc64
+#define helper_atomic_and_fetchw_le helper_atomic_and_fetchw_le_sparc64
+#define helper_atomic_and_fetchw_le_mmu helper_atomic_and_fetchw_le_mmu_sparc64
+#define helper_atomic_cmpxchgb helper_atomic_cmpxchgb_sparc64
+#define helper_atomic_cmpxchgb helper_atomic_cmpxchgb_sparc64
+#define helper_atomic_cmpxchgb_mmu helper_atomic_cmpxchgb_mmu_sparc64
+#define helper_atomic_cmpxchgl_be helper_atomic_cmpxchgl_be_sparc64
+#define helper_atomic_cmpxchgl_be_mmu helper_atomic_cmpxchgl_be_mmu_sparc64
+#define helper_atomic_cmpxchgl_le helper_atomic_cmpxchgl_le_sparc64
+#define helper_atomic_cmpxchgl_le_mmu helper_atomic_cmpxchgl_le_mmu_sparc64
+#define helper_atomic_cmpxchgq_be helper_atomic_cmpxchgq_be_sparc64
+#define helper_atomic_cmpxchgq_be_mmu helper_atomic_cmpxchgq_be_mmu_sparc64
+#define helper_atomic_cmpxchgq_le helper_atomic_cmpxchgq_le_sparc64
+#define helper_atomic_cmpxchgq_le_mmu helper_atomic_cmpxchgq_le_mmu_sparc64
+#define helper_atomic_cmpxchgw_be helper_atomic_cmpxchgw_be_sparc64
+#define helper_atomic_cmpxchgw_be_mmu helper_atomic_cmpxchgw_be_mmu_sparc64
+#define helper_atomic_cmpxchgw_le helper_atomic_cmpxchgw_le_sparc64
+#define helper_atomic_cmpxchgw_le_mmu helper_atomic_cmpxchgw_le_mmu_sparc64
+#define helper_atomic_fetch_addb helper_atomic_fetch_addb_sparc64
+#define helper_atomic_fetch_addb_mmu helper_atomic_fetch_addb_mmu_sparc64
+#define helper_atomic_fetch_addl_be helper_atomic_fetch_addl_be_sparc64
+#define helper_atomic_fetch_addl_be_mmu helper_atomic_fetch_addl_be_mmu_sparc64
+#define helper_atomic_fetch_addl_le helper_atomic_fetch_addl_le_sparc64
+#define helper_atomic_fetch_addl_le_mmu helper_atomic_fetch_addl_le_mmu_sparc64
+#define helper_atomic_fetch_addq_be helper_atomic_fetch_addq_be_sparc64
+#define helper_atomic_fetch_addq_be_mmu helper_atomic_fetch_addq_be_mmu_sparc64
+#define helper_atomic_fetch_addq_le helper_atomic_fetch_addq_le_sparc64
+#define helper_atomic_fetch_addq_le_mmu helper_atomic_fetch_addq_le_mmu_sparc64
+#define helper_atomic_fetch_addw_be helper_atomic_fetch_addw_be_sparc64
+#define helper_atomic_fetch_addw_be_mmu helper_atomic_fetch_addw_be_mmu_sparc64
+#define helper_atomic_fetch_addw_le helper_atomic_fetch_addw_le_sparc64
+#define helper_atomic_fetch_addw_le_mmu helper_atomic_fetch_addw_le_mmu_sparc64
+#define helper_atomic_fetch_andb helper_atomic_fetch_andb_sparc64
+#define helper_atomic_fetch_andb_mmu helper_atomic_fetch_andb_mmu_sparc64
+#define helper_atomic_fetch_andl_be helper_atomic_fetch_andl_be_sparc64
+#define helper_atomic_fetch_andl_be_mmu helper_atomic_fetch_andl_be_mmu_sparc64
+#define helper_atomic_fetch_andl_le helper_atomic_fetch_andl_le_sparc64
+#define helper_atomic_fetch_andl_le_mmu helper_atomic_fetch_andl_le_mmu_sparc64
+#define helper_atomic_fetch_andq_be helper_atomic_fetch_andq_be_sparc64
+#define helper_atomic_fetch_andq_be_mmu helper_atomic_fetch_andq_be_mmu_sparc64
+#define helper_atomic_fetch_andq_le helper_atomic_fetch_andq_le_sparc64
+#define helper_atomic_fetch_andq_le_mmu helper_atomic_fetch_andq_le_mmu_sparc64
+#define helper_atomic_fetch_andw_be helper_atomic_fetch_andw_be_sparc64
+#define helper_atomic_fetch_andw_be_mmu helper_atomic_fetch_andw_be_mmu_sparc64
+#define helper_atomic_fetch_andw_le helper_atomic_fetch_andw_le_sparc64
+#define helper_atomic_fetch_andw_le_mmu helper_atomic_fetch_andw_le_mmu_sparc64
+#define helper_atomic_fetch_orb helper_atomic_fetch_orb_sparc64
+#define helper_atomic_fetch_orb_mmu helper_atomic_fetch_orb_mmu_sparc64
+#define helper_atomic_fetch_orl_be helper_atomic_fetch_orl_be_sparc64
+#define helper_atomic_fetch_orl_be_mmu helper_atomic_fetch_orl_be_mmu_sparc64
+#define helper_atomic_fetch_orl_le helper_atomic_fetch_orl_le_sparc64
+#define helper_atomic_fetch_orl_le_mmu helper_atomic_fetch_orl_le_mmu_sparc64
+#define helper_atomic_fetch_orq_be helper_atomic_fetch_orq_be_sparc64
+#define helper_atomic_fetch_orq_be_mmu helper_atomic_fetch_orq_be_mmu_sparc64
+#define helper_atomic_fetch_orq_le helper_atomic_fetch_orq_le_sparc64
+#define helper_atomic_fetch_orq_le_mmu helper_atomic_fetch_orq_le_mmu_sparc64
+#define helper_atomic_fetch_orw_be helper_atomic_fetch_orw_be_sparc64
+#define helper_atomic_fetch_orw_be_mmu helper_atomic_fetch_orw_be_mmu_sparc64
+#define helper_atomic_fetch_orw_le helper_atomic_fetch_orw_le_sparc64
+#define helper_atomic_fetch_orw_le_mmu helper_atomic_fetch_orw_le_mmu_sparc64
+#define helper_atomic_fetch_xorb helper_atomic_fetch_xorb_sparc64
+#define helper_atomic_fetch_xorb_mmu helper_atomic_fetch_xorb_mmu_sparc64
+#define helper_atomic_fetch_xorl_be helper_atomic_fetch_xorl_be_sparc64
+#define helper_atomic_fetch_xorl_be_mmu helper_atomic_fetch_xorl_be_mmu_sparc64
+#define helper_atomic_fetch_xorl_le helper_atomic_fetch_xorl_le_sparc64
+#define helper_atomic_fetch_xorl_le_mmu helper_atomic_fetch_xorl_le_mmu_sparc64
+#define helper_atomic_fetch_xorq_be helper_atomic_fetch_xorq_be_sparc64
+#define helper_atomic_fetch_xorq_be_mmu helper_atomic_fetch_xorq_be_mmu_sparc64
+#define helper_atomic_fetch_xorq_le helper_atomic_fetch_xorq_le_sparc64
+#define helper_atomic_fetch_xorq_le_mmu helper_atomic_fetch_xorq_le_mmu_sparc64
+#define helper_atomic_fetch_xorw_be helper_atomic_fetch_xorw_be_sparc64
+#define helper_atomic_fetch_xorw_be_mmu helper_atomic_fetch_xorw_be_mmu_sparc64
+#define helper_atomic_fetch_xorw_le helper_atomic_fetch_xorw_le_sparc64
+#define helper_atomic_fetch_xorw_le_mmu helper_atomic_fetch_xorw_le_mmu_sparc64
+#define helper_atomic_or_fetchb helper_atomic_or_fetchb_sparc64
+#define helper_atomic_or_fetchb_mmu helper_atomic_or_fetchb_mmu_sparc64
+#define helper_atomic_or_fetchl_be helper_atomic_or_fetchl_be_sparc64
+#define helper_atomic_or_fetchl_be_mmu helper_atomic_or_fetchl_be_mmu_sparc64
+#define helper_atomic_or_fetchl_le helper_atomic_or_fetchl_le_sparc64
+#define helper_atomic_or_fetchl_le_mmu helper_atomic_or_fetchl_le_mmu_sparc64
+#define helper_atomic_or_fetchq_be helper_atomic_or_fetchq_be_sparc64
+#define helper_atomic_or_fetchq_be_mmu helper_atomic_or_fetchq_be_mmu_sparc64
+#define helper_atomic_or_fetchq_le helper_atomic_or_fetchq_le_sparc64
+#define helper_atomic_or_fetchq_le_mmu helper_atomic_or_fetchq_le_mmu_sparc64
+#define helper_atomic_or_fetchw_be helper_atomic_or_fetchw_be_sparc64
+#define helper_atomic_or_fetchw_be_mmu helper_atomic_or_fetchw_be_mmu_sparc64
+#define helper_atomic_or_fetchw_le helper_atomic_or_fetchw_le_sparc64
+#define helper_atomic_or_fetchw_le_mmu helper_atomic_or_fetchw_le_mmu_sparc64
+#define helper_atomic_xchgb helper_atomic_xchgb_sparc64
+#define helper_atomic_xchgb helper_atomic_xchgb_sparc64
+#define helper_atomic_xchgb_mmu helper_atomic_xchgb_mmu_sparc64
+#define helper_atomic_xchgl_be helper_atomic_xchgl_be_sparc64
+#define helper_atomic_xchgl_be_mmu helper_atomic_xchgl_be_mmu_sparc64
+#define helper_atomic_xchgl_le helper_atomic_xchgl_le_sparc64
+#define helper_atomic_xchgl_le_mmu helper_atomic_xchgl_le_mmu_sparc64
+#define helper_atomic_xchgq_be helper_atomic_xchgq_be_sparc64
+#define helper_atomic_xchgq_be_mmu helper_atomic_xchgq_be_mmu_sparc64
+#define helper_atomic_xchgq_le helper_atomic_xchgq_le_sparc64
+#define helper_atomic_xchgq_le_mmu helper_atomic_xchgq_le_mmu_sparc64
+#define helper_atomic_xchgw_be helper_atomic_xchgw_be_sparc64
+#define helper_atomic_xchgw_be_mmu helper_atomic_xchgw_be_mmu_sparc64
+#define helper_atomic_xchgw_le helper_atomic_xchgw_le_sparc64
+#define helper_atomic_xchgw_le_mmu helper_atomic_xchgw_le_mmu_sparc64
+#define helper_atomic_xor_fetchb helper_atomic_xor_fetchb_sparc64
+#define helper_atomic_xor_fetchb_mmu helper_atomic_xor_fetchb_mmu_sparc64
+#define helper_atomic_xor_fetchl_be helper_atomic_xor_fetchl_be_sparc64
+#define helper_atomic_xor_fetchl_be_mmu helper_atomic_xor_fetchl_be_mmu_sparc64
+#define helper_atomic_xor_fetchl_le helper_atomic_xor_fetchl_le_sparc64
+#define helper_atomic_xor_fetchl_le_mmu helper_atomic_xor_fetchl_le_mmu_sparc64
+#define helper_atomic_xor_fetchq_be helper_atomic_xor_fetchq_be_sparc64
+#define helper_atomic_xor_fetchq_be_mmu helper_atomic_xor_fetchq_be_mmu_sparc64
+#define helper_atomic_xor_fetchq_le helper_atomic_xor_fetchq_le_sparc64
+#define helper_atomic_xor_fetchq_le_mmu helper_atomic_xor_fetchq_le_mmu_sparc64
+#define helper_atomic_xor_fetchw_be helper_atomic_xor_fetchw_be_sparc64
+#define helper_atomic_xor_fetchw_be_mmu helper_atomic_xor_fetchw_be_mmu_sparc64
+#define helper_atomic_xor_fetchw_le helper_atomic_xor_fetchw_le_sparc64
+#define helper_atomic_xor_fetchw_le_mmu helper_atomic_xor_fetchw_le_mmu_sparc64
 #define helper_be_ldl_cmmu helper_be_ldl_cmmu_sparc64
 #define helper_be_ldq_cmmu helper_be_ldq_cmmu_sparc64
 #define helper_be_ldq_mmu helper_be_ldq_mmu_sparc64
@@ -1400,6 +1543,10 @@
 #define helper_crypto_sha256su0 helper_crypto_sha256su0_sparc64
 #define helper_crypto_sha256su1 helper_crypto_sha256su1_sparc64
 #define helper_dc_zva helper_dc_zva_sparc64
+#define helper_div_i32 helper_div_i32_sparc64
+#define helper_div_i64 helper_div_i64_sparc64
+#define helper_divu_i32 helper_divu_i32_sparc64
+#define helper_divu_i64 helper_divu_i64_sparc64
 #define helper_double_saturate helper_double_saturate_sparc64
 #define helper_exception_internal helper_exception_internal_sparc64
 #define helper_exception_return helper_exception_return_sparc64
@@ -1532,6 +1679,10 @@
 #define helper_le_stl_mmu helper_le_stl_mmu_sparc64
 #define helper_le_stq_mmu helper_le_stq_mmu_sparc64
 #define helper_le_stw_mmu helper_le_stw_mmu_sparc64
+#define helper_mulsh_i32 helper_mulsh_i32_sparc64
+#define helper_mulsh_i64 helper_mulsh_i64_sparc64
+#define helper_muluh_i32 helper_muluh_i32_sparc64
+#define helper_muluh_i64 helper_muluh_i64_sparc64
 #define helper_mrs_banked helper_mrs_banked_sparc64
 #define helper_msa_ld_b helper_msa_ld_b_sparc64
 #define helper_msa_ld_d helper_msa_ld_d_sparc64
@@ -1773,6 +1924,10 @@
 #define helper_recpe_f64 helper_recpe_f64_sparc64
 #define helper_recpe_u32 helper_recpe_u32_sparc64
 #define helper_recps_f32 helper_recps_f32_sparc64
+#define helper_rem_i32 helper_rem_i32_sparc64
+#define helper_rem_i64 helper_rem_i64_sparc64
+#define helper_remu_i32 helper_remu_i32_sparc64
+#define helper_remu_i64 helper_remu_i64_sparc64
 #define helper_ret_ldb_cmmu helper_ret_ldb_cmmu_sparc64
 #define helper_ret_ldsb_mmu helper_ret_ldsb_mmu_sparc64
 #define helper_ret_ldub_mmu helper_ret_ldub_mmu_sparc64
@@ -1790,6 +1945,8 @@
 #define helper_sadd8 helper_sadd8_sparc64
 #define helper_saddsubx helper_saddsubx_sparc64
 #define helper_sar_cc helper_sar_cc_sparc64
+#define helper_sar_i32 helper_sar_i32_sparc64
+#define helper_sar_i64 helper_sar_i64_sparc64
 #define helper_sdiv helper_sdiv_sparc64
 #define helper_sel_flags helper_sel_flags_sparc64
 #define helper_set_cp_reg helper_set_cp_reg_sparc64
@@ -1803,7 +1960,10 @@
 #define helper_shadd8 helper_shadd8_sparc64
 #define helper_shaddsubx helper_shaddsubx_sparc64
 #define helper_shl_cc helper_shl_cc_sparc64
+#define helper_shl_i64 helper_shl_i64_sparc64
 #define helper_shr_cc helper_shr_cc_sparc64
+#define helper_shr_i32 helper_shr_i32_sparc64
+#define helper_shr_i64 helper_shr_i64_sparc64
 #define helper_shsub16 helper_shsub16_sparc64
 #define helper_shsub8 helper_shsub8_sparc64
 #define helper_shsubaddx helper_shsubaddx_sparc64
@@ -2756,6 +2916,26 @@
 #define tcg_gen_andc_i64 tcg_gen_andc_i64_sparc64
 #define tcg_gen_andi_i32 tcg_gen_andi_i32_sparc64
 #define tcg_gen_andi_i64 tcg_gen_andi_i64_sparc64
+#define tcg_gen_atomic_add_fetch_i32 tcg_gen_atomic_add_fetch_i32_sparc64
+#define tcg_gen_atomic_add_fetch_i64 tcg_gen_atomic_add_fetch_i64_sparc64
+#define tcg_gen_atomic_and_fetch_i32 tcg_gen_atomic_and_fetch_i32_sparc64
+#define tcg_gen_atomic_and_fetch_i64 tcg_gen_atomic_and_fetch_i64_sparc64
+#define tcg_gen_atomic_cmpxchg_i32 tcg_gen_atomic_cmpxchg_i32_sparc64
+#define tcg_gen_atomic_cmpxchg_i64 tcg_gen_atomic_cmpxchg_i64_sparc64
+#define tcg_gen_atomic_fetch_add_i32 tcg_gen_atomic_fetch_add_i32_sparc64
+#define tcg_gen_atomic_fetch_add_i64 tcg_gen_atomic_fetch_add_i64_sparc64
+#define tcg_gen_atomic_fetch_and_i32 tcg_gen_atomic_fetch_and_i32_sparc64
+#define tcg_gen_atomic_fetch_and_i64 tcg_gen_atomic_fetch_and_i64_sparc64
+#define tcg_gen_atomic_fetch_or_i32 tcg_gen_atomic_fetch_or_i32_sparc64
+#define tcg_gen_atomic_fetch_or_i64 tcg_gen_atomic_fetch_or_i64_sparc64
+#define tcg_gen_atomic_fetch_xor_i32 tcg_gen_atomic_fetch_xor_i32_sparc64
+#define tcg_gen_atomic_fetch_xor_i64 tcg_gen_atomic_fetch_xor_i64_sparc64
+#define tcg_gen_atomic_or_fetch_i32 tcg_gen_atomic_or_fetch_i32_sparc64
+#define tcg_gen_atomic_or_fetch_i64 tcg_gen_atomic_or_fetch_i64_sparc64
+#define tcg_gen_atomic_xchg_i32 tcg_gen_atomic_xchg_i32_sparc64
+#define tcg_gen_atomic_xchg_i64 tcg_gen_atomic_xchg_i64_sparc64
+#define tcg_gen_atomic_xor_fetch_i32 tcg_gen_atomic_xor_fetch_i32_sparc64
+#define tcg_gen_atomic_xor_fetch_i64 tcg_gen_atomic_xor_fetch_i64_sparc64
 #define tcg_gen_br tcg_gen_br_sparc64
 #define tcg_gen_brcond_i32 tcg_gen_brcond_i32_sparc64
 #define tcg_gen_brcond_i64 tcg_gen_brcond_i64_sparc64

qemu/tcg-runtime.c

@@ -24,17 +24,10 @@
 #include "qemu/osdep.h"
 #include "unicorn/platform.h"
 #include "qemu/host-utils.h"
-
+#include "cpu.h"
-/* This file is compiled once, and thus we can't include the standard
+#include "exec/helper-proto.h"
-   "exec/helper-proto.h", which has includes that are target specific.  */
+#include "exec/cpu_ldst.h"
-
+#include "exec/exec-all.h"
-#include "exec/helper-head.h"
-
-#define DEF_HELPER_FLAGS_2(name, flags, ret, t1, t2) \
-  dh_ctype(ret) HELPER(name) (dh_ctype(t1), dh_ctype(t2));
-
-#include "tcg-runtime.h"
-
 
 /* 32-bit helpers */
 
@@ -108,3 +101,38 @@ int64_t HELPER(mulsh_i64)(int64_t arg1, int64_t arg2)
     muls64(&l, &h, arg1, arg2);
     return h;
 }
+
+#ifndef CONFIG_SOFTMMU
+/* The softmmu versions of these helpers are in cputlb.c.  */
+
+/* Do not allow unaligned operations to proceed.  Return the host address.  */
+static void *atomic_mmu_lookup(CPUArchState *env, target_ulong addr,
+                               int size, uintptr_t retaddr)
+{
+    /* Enforce qemu required alignment.  */
+    if (unlikely(addr & (size - 1))) {
+        cpu_loop_exit_atomic(ENV_GET_CPU(env), retaddr);
+    }
+    return g2h(addr);
+}
+
+/* Macro to call the above, with local variables from the use context.  */
+#define ATOMIC_MMU_LOOKUP  atomic_mmu_lookup(env, addr, DATA_SIZE, GETPC())
+
+#define ATOMIC_NAME(X)   HELPER(glue(glue(atomic_ ## X, SUFFIX), END))
+#define EXTRA_ARGS
+
+#define DATA_SIZE 1
+#include "atomic_template.h"
+
+#define DATA_SIZE 2
+#include "atomic_template.h"
+
+#define DATA_SIZE 4
+#include "atomic_template.h"
+
+#define DATA_SIZE 8
+#include "atomic_template.h"
+
+#endif /* !CONFIG_SOFTMMU */
+

qemu/tcg/tcg-op.c

@@ -1996,3 +1996,363 @@ void tcg_gen_qemu_st_i64(struct uc_struct *uc, TCGv_i64 val, TCGv addr, TCGArg i
     gen_ldst_i64(tcg_ctx, INDEX_op_qemu_st_i64, val, addr, memop, idx);
     check_exit_request(tcg_ctx);
 }
+
+static void tcg_gen_ext_i32(TCGContext *s, TCGv_i32 ret, TCGv_i32 val, TCGMemOp opc)
+{
+    switch (opc & MO_SSIZE) {
+    case MO_SB:
+        tcg_gen_ext8s_i32(s, ret, val);
+        break;
+    case MO_UB:
+        tcg_gen_ext8u_i32(s, ret, val);
+        break;
+    case MO_SW:
+        tcg_gen_ext16s_i32(s, ret, val);
+        break;
+    case MO_UW:
+        tcg_gen_ext16u_i32(s, ret, val);
+        break;
+    default:
+        tcg_gen_mov_i32(s, ret, val);
+        break;
+    }
+}
+
+static void tcg_gen_ext_i64(TCGContext *s, TCGv_i64 ret, TCGv_i64 val, TCGMemOp opc)
+{
+    switch (opc & MO_SSIZE) {
+    case MO_SB:
+        tcg_gen_ext8s_i64(s, ret, val);
+        break;
+    case MO_UB:
+        tcg_gen_ext8u_i64(s, ret, val);
+        break;
+    case MO_SW:
+        tcg_gen_ext16s_i64(s, ret, val);
+        break;
+    case MO_UW:
+        tcg_gen_ext16u_i64(s, ret, val);
+        break;
+    case MO_SL:
+        tcg_gen_ext32s_i64(s, ret, val);
+        break;
+    case MO_UL:
+        tcg_gen_ext32u_i64(s, ret, val);
+        break;
+    default:
+        tcg_gen_mov_i64(s, ret, val);
+        break;
+    }
+}
+
+#ifdef CONFIG_SOFTMMU
+typedef void (*gen_atomic_cx_i32)(TCGContext *,
+                                  TCGv_i32, TCGv_env, TCGv,
+                                  TCGv_i32, TCGv_i32, TCGv_i32);
+typedef void (*gen_atomic_cx_i64)(TCGContext *,
+                                  TCGv_i64, TCGv_env, TCGv,
+                                  TCGv_i64, TCGv_i64, TCGv_i32);
+typedef void (*gen_atomic_op_i32)(TCGContext *,
+                                  TCGv_i32, TCGv_env, TCGv,
+                                  TCGv_i32, TCGv_i32);
+typedef void (*gen_atomic_op_i64)(TCGContext *,
+                                  TCGv_i64, TCGv_env, TCGv,
+                                  TCGv_i64, TCGv_i32);
+#else
+typedef void (*gen_atomic_cx_i32)(TCGContext *, TCGv_i32, TCGv_env, TCGv, TCGv_i32, TCGv_i32);
+typedef void (*gen_atomic_cx_i64)(TCGContext *, TCGv_i64, TCGv_env, TCGv, TCGv_i64, TCGv_i64);
+typedef void (*gen_atomic_op_i32)(TCGContext *, TCGv_i32, TCGv_env, TCGv, TCGv_i32);
+typedef void (*gen_atomic_op_i64)(TCGContext *, TCGv_i64, TCGv_env, TCGv, TCGv_i64);
+#endif
+
+#ifdef HOST_WORDS_BIGENDIAN
+static void * const table_cmpxchg[16] = {
+    gen_helper_atomic_cmpxchgb,
+    gen_helper_atomic_cmpxchgw_be,
+    gen_helper_atomic_cmpxchgl_be,
+    gen_helper_atomic_cmpxchgq_be,
+    NULL,
+    NULL,
+    NULL,
+    NULL,
+    NULL,
+    gen_helper_atomic_cmpxchgw_le,
+    gen_helper_atomic_cmpxchgl_le,
+    gen_helper_atomic_cmpxchgq_le,
+}
+#else
+static void * const table_cmpxchg[16] = {
+    gen_helper_atomic_cmpxchgb,
+    gen_helper_atomic_cmpxchgw_le,
+    gen_helper_atomic_cmpxchgl_le,
+    gen_helper_atomic_cmpxchgq_le,
+    NULL,
+    NULL,
+    NULL,
+    NULL,
+    NULL,
+    gen_helper_atomic_cmpxchgw_be,
+    gen_helper_atomic_cmpxchgl_be,
+    gen_helper_atomic_cmpxchgq_be,
+};
+#endif
+
+void tcg_gen_atomic_cmpxchg_i32(TCGContext *s,
+                                TCGv_i32 retv, TCGv addr, TCGv_i32 cmpv,
+                                TCGv_i32 newv, TCGArg idx, TCGMemOp memop)
+{
+    memop = tcg_canonicalize_memop(memop, 0, 0);
+
+    if (!s->uc->parallel_cpus) {
+        TCGv_i32 t1 = tcg_temp_new_i32(s);
+        TCGv_i32 t2 = tcg_temp_new_i32(s);
+
+        tcg_gen_ext_i32(s, t2, cmpv, memop & MO_SIZE);
+
+        tcg_gen_qemu_ld_i32(s->uc, t1, addr, idx, memop & ~MO_SIGN);
+        tcg_gen_movcond_i32(s, TCG_COND_EQ, t2, t1, t2, newv, t1);
+        tcg_gen_qemu_st_i32(s->uc, t2, addr, idx, memop);
+        tcg_temp_free_i32(s, t2);
+
+        if (memop & MO_SIGN) {
+            tcg_gen_ext_i32(s, retv, t1, memop);
+        } else {
+            tcg_gen_mov_i32(s, retv, t1);
+        }
+        tcg_temp_free_i32(s, t1);
+    } else {
+        gen_atomic_cx_i32 gen;
+
+        gen = table_cmpxchg[memop & (MO_SIZE | MO_BSWAP)];
+        tcg_debug_assert(gen != NULL);
+
+#ifdef CONFIG_SOFTMMU
+        {
+            TCGv_i32 oi = tcg_const_i32(s, make_memop_idx(memop & ~MO_SIGN, idx));
+            gen(s, retv, s->tcg_env, addr, cmpv, newv, oi);
+            tcg_temp_free_i32(s, oi);
+        }
+#else
+        gen(s, retv, s->tcg_env, addr, cmpv, newv);
+#endif
+
+        if (memop & MO_SIGN) {
+            tcg_gen_ext_i32(s, retv, retv, memop);
+        }
+    }
+}
+
+void tcg_gen_atomic_cmpxchg_i64(TCGContext *s,
+                                TCGv_i64 retv, TCGv addr, TCGv_i64 cmpv,
+                                TCGv_i64 newv, TCGArg idx, TCGMemOp memop)
+{
+    memop = tcg_canonicalize_memop(memop, 1, 0);
+
+    if (!s->uc->parallel_cpus) {
+        TCGv_i64 t1 = tcg_temp_new_i64(s);
+        TCGv_i64 t2 = tcg_temp_new_i64(s);
+
+        tcg_gen_ext_i64(s, t2, cmpv, memop & MO_SIZE);
+
+        tcg_gen_qemu_ld_i64(s->uc, t1, addr, idx, memop & ~MO_SIGN);
+        tcg_gen_movcond_i64(s, TCG_COND_EQ, t2, t1, t2, newv, t1);
+        tcg_gen_qemu_st_i64(s->uc, t2, addr, idx, memop);
+        tcg_temp_free_i64(s, t2);
+
+        if (memop & MO_SIGN) {
+            tcg_gen_ext_i64(s, retv, t1, memop);
+        } else {
+            tcg_gen_mov_i64(s, retv, t1);
+        }
+        tcg_temp_free_i64(s, t1);
+    } else if ((memop & MO_SIZE) == MO_64) {
+        gen_atomic_cx_i64 gen;
+
+        gen = table_cmpxchg[memop & (MO_SIZE | MO_BSWAP)];
+        tcg_debug_assert(gen != NULL);
+
+#ifdef CONFIG_SOFTMMU
+        {
+            TCGv_i32 oi = tcg_const_i32(s, make_memop_idx(memop, idx));
+            gen(s, retv, s->tcg_env, addr, cmpv, newv, oi);
+            tcg_temp_free_i32(s, oi);
+        }
+#else
+        gen(s, retv, tcg_ctx.tcg_env, addr, cmpv, newv);
+#endif
+    } else {
+        TCGv_i32 c32 = tcg_temp_new_i32(s);
+        TCGv_i32 n32 = tcg_temp_new_i32(s);
+        TCGv_i32 r32 = tcg_temp_new_i32(s);
+
+        tcg_gen_extrl_i64_i32(s, c32, cmpv);
+        tcg_gen_extrl_i64_i32(s, n32, newv);
+        tcg_gen_atomic_cmpxchg_i32(s, r32, addr, c32, n32, idx, memop & ~MO_SIGN);
+        tcg_temp_free_i32(s, c32);
+        tcg_temp_free_i32(s, n32);
+
+        tcg_gen_extu_i32_i64(s, retv, r32);
+        tcg_temp_free_i32(s, r32);
+
+        if (memop & MO_SIGN) {
+            tcg_gen_ext_i64(s, retv, retv, memop);
+        }
+    }
+}
+
+static void do_nonatomic_op_i32(TCGContext *s,
+                                TCGv_i32 ret, TCGv addr, TCGv_i32 val,
+                                TCGArg idx, TCGMemOp memop, bool new_val,
+                                void (*gen)(TCGContext *, TCGv_i32, TCGv_i32, TCGv_i32))
+{
+    TCGv_i32 t1 = tcg_temp_new_i32(s);
+    TCGv_i32 t2 = tcg_temp_new_i32(s);
+
+    memop = tcg_canonicalize_memop(memop, 0, 0);
+
+    tcg_gen_qemu_ld_i32(s->uc, t1, addr, idx, memop & ~MO_SIGN);
+    gen(s, t2, t1, val);
+    tcg_gen_qemu_st_i32(s->uc, t2, addr, idx, memop);
+
+    tcg_gen_ext_i32(s, ret, (new_val ? t2 : t1), memop);
+    tcg_temp_free_i32(s, t1);
+    tcg_temp_free_i32(s, t2);
+}
+
+static void do_atomic_op_i32(TCGContext *s,
+                             TCGv_i32 ret, TCGv addr, TCGv_i32 val,
+                             TCGArg idx, TCGMemOp memop, void * const table[])
+{
+    gen_atomic_op_i32 gen;
+
+    memop = tcg_canonicalize_memop(memop, 0, 0);
+
+    gen = table[memop & (MO_SIZE | MO_BSWAP)];
+    tcg_debug_assert(gen != NULL);
+
+#ifdef CONFIG_SOFTMMU
+    {
+        TCGv_i32 oi = tcg_const_i32(s, make_memop_idx(memop & ~MO_SIGN, idx));
+        gen(s, ret, s->tcg_env, addr, val, oi);
+        tcg_temp_free_i32(s, oi);
+    }
+#else
+    gen(s, ret, tcg_ctx.tcg_env, addr, val);
+#endif
+
+    if (memop & MO_SIGN) {
+        tcg_gen_ext_i32(s, ret, ret, memop);
+    }
+}
+
+static void do_nonatomic_op_i64(TCGContext *s,
+                                TCGv_i64 ret, TCGv addr, TCGv_i64 val,
+                                TCGArg idx, TCGMemOp memop, bool new_val,
+                                void (*gen)(TCGContext *, TCGv_i64, TCGv_i64, TCGv_i64))
+{
+    TCGv_i64 t1 = tcg_temp_new_i64(s);
+    TCGv_i64 t2 = tcg_temp_new_i64(s);
+
+    memop = tcg_canonicalize_memop(memop, 1, 0);
+
+    tcg_gen_qemu_ld_i64(s->uc, t1, addr, idx, memop & ~MO_SIGN);
+    gen(s, t2, t1, val);
+    tcg_gen_qemu_st_i64(s->uc, t2, addr, idx, memop);
+
+    tcg_gen_ext_i64(s, ret, (new_val ? t2 : t1), memop);
+    tcg_temp_free_i64(s, t1);
+    tcg_temp_free_i64(s, t2);
+}
+
+static void do_atomic_op_i64(TCGContext *s,
+                             TCGv_i64 ret, TCGv addr, TCGv_i64 val,
+                             TCGArg idx, TCGMemOp memop, void * const table[])
+{
+    memop = tcg_canonicalize_memop(memop, 1, 0);
+
+    if ((memop & MO_SIZE) == MO_64) {
+        gen_atomic_op_i64 gen;
+
+        gen = table[memop & (MO_SIZE | MO_BSWAP)];
+        tcg_debug_assert(gen != NULL);
+
+#ifdef CONFIG_SOFTMMU
+        {
+            TCGv_i32 oi = tcg_const_i32(s, make_memop_idx(memop & ~MO_SIGN, idx));
+            gen(s, ret, s->tcg_env, addr, val, oi);
+            tcg_temp_free_i32(s, oi);
+        }
+#else
+        gen(s, ret, tcg_ctx.tcg_env, addr, val);
+#endif
+    } else {
+        TCGv_i32 v32 = tcg_temp_new_i32(s);
+        TCGv_i32 r32 = tcg_temp_new_i32(s);
+
+        tcg_gen_extrl_i64_i32(s, v32, val);
+        do_atomic_op_i32(s, r32, addr, v32, idx, memop & ~MO_SIGN, table);
+        tcg_temp_free_i32(s, v32);
+
+        tcg_gen_extu_i32_i64(s, ret, r32);
+        tcg_temp_free_i32(s, r32);
+
+        if (memop & MO_SIGN) {
+            tcg_gen_ext_i64(s, ret, ret, memop);
+        }
+    }
+}
+
+#define GEN_ATOMIC_HELPER(NAME, OP, NEW)                                \
+static void * const table_##NAME[16] = {                                \
+    [MO_8] = gen_helper_atomic_##NAME##b,                               \
+    [MO_16 | MO_LE] = gen_helper_atomic_##NAME##w_le,                   \
+    [MO_16 | MO_BE] = gen_helper_atomic_##NAME##w_be,                   \
+    [MO_32 | MO_LE] = gen_helper_atomic_##NAME##l_le,                   \
+    [MO_32 | MO_BE] = gen_helper_atomic_##NAME##l_be,                   \
+    [MO_64 | MO_LE] = gen_helper_atomic_##NAME##q_le,                   \
+    [MO_64 | MO_BE] = gen_helper_atomic_##NAME##q_be,                   \
+};                                                                      \
+void tcg_gen_atomic_##NAME##_i32                                        \
+    (TCGContext *s, TCGv_i32 ret, TCGv addr, TCGv_i32 val, TCGArg idx, TCGMemOp memop) \
+{                                                                       \
+    if (s->uc->parallel_cpus) {                                         \
+        do_atomic_op_i32(s, ret, addr, val, idx, memop, table_##NAME);  \
+    } else {                                                            \
+        do_nonatomic_op_i32(s, ret, addr, val, idx, memop, NEW,         \
+                            tcg_gen_##OP##_i32);                        \
+    }                                                                   \
+}                                                                       \
+void tcg_gen_atomic_##NAME##_i64                                        \
+    (TCGContext *s, TCGv_i64 ret, TCGv addr, TCGv_i64 val, TCGArg idx, TCGMemOp memop) \
+{                                                                       \
+    if (s->uc->parallel_cpus) {                                         \
+        do_atomic_op_i64(s, ret, addr, val, idx, memop, table_##NAME);  \
+    } else {                                                            \
+        do_nonatomic_op_i64(s, ret, addr, val, idx, memop, NEW,         \
+                            tcg_gen_##OP##_i64);                        \
+    }                                                                   \
+}
+
+GEN_ATOMIC_HELPER(fetch_add, add, 0)
+GEN_ATOMIC_HELPER(fetch_and, and, 0)
+GEN_ATOMIC_HELPER(fetch_or, or, 0)
+GEN_ATOMIC_HELPER(fetch_xor, xor, 0)
+
+GEN_ATOMIC_HELPER(add_fetch, add, 1)
+GEN_ATOMIC_HELPER(and_fetch, and, 1)
+GEN_ATOMIC_HELPER(or_fetch, or, 1)
+GEN_ATOMIC_HELPER(xor_fetch, xor, 1)
+
+static void tcg_gen_mov2_i32(TCGContext *s, TCGv_i32 r, TCGv_i32 a, TCGv_i32 b)
+{
+    tcg_gen_mov_i32(s, r, b);
+}
+
+static void tcg_gen_mov2_i64(TCGContext *s, TCGv_i64 r, TCGv_i64 a, TCGv_i64 b)
+{
+    tcg_gen_mov_i64(s, r, b);
+}
+
+GEN_ATOMIC_HELPER(xchg, mov2, 0)
+
+#undef GEN_ATOMIC_HELPER

qemu/tcg/tcg-op.h

@@ -856,6 +856,30 @@ static inline void tcg_gen_qemu_st64(struct uc_struct *uc, TCGv_i64 arg, TCGv ad
 
 void check_exit_request(TCGContext *tcg_ctx);
 
+void tcg_gen_atomic_cmpxchg_i32(TCGContext *, TCGv_i32, TCGv, TCGv_i32, TCGv_i32,
+                                TCGArg, TCGMemOp);
+void tcg_gen_atomic_cmpxchg_i64(TCGContext *, TCGv_i64, TCGv, TCGv_i64, TCGv_i64,
+                                TCGArg, TCGMemOp);
+
+void tcg_gen_atomic_xchg_i32(TCGContext *, TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
+void tcg_gen_atomic_xchg_i64(TCGContext *, TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
+void tcg_gen_atomic_fetch_add_i32(TCGContext *, TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
+void tcg_gen_atomic_fetch_add_i64(TCGContext *, TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
+void tcg_gen_atomic_fetch_and_i32(TCGContext *, TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
+void tcg_gen_atomic_fetch_and_i64(TCGContext *, TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
+void tcg_gen_atomic_fetch_or_i32(TCGContext *, TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
+void tcg_gen_atomic_fetch_or_i64(TCGContext *, TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
+void tcg_gen_atomic_fetch_xor_i32(TCGContext *, TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
+void tcg_gen_atomic_fetch_xor_i64(TCGContext *, TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
+void tcg_gen_atomic_add_fetch_i32(TCGContext *, TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
+void tcg_gen_atomic_add_fetch_i64(TCGContext *, TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
+void tcg_gen_atomic_and_fetch_i32(TCGContext *, TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
+void tcg_gen_atomic_and_fetch_i64(TCGContext *, TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
+void tcg_gen_atomic_or_fetch_i32(TCGContext *, TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
+void tcg_gen_atomic_or_fetch_i64(TCGContext *, TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
+void tcg_gen_atomic_xor_fetch_i32(TCGContext *, TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
+void tcg_gen_atomic_xor_fetch_i64(TCGContext *, TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
+
 #if TARGET_LONG_BITS == 64
 #define tcg_gen_movi_tl tcg_gen_movi_i64
 #define tcg_gen_mov_tl tcg_gen_mov_i64
@@ -934,6 +958,16 @@ void check_exit_request(TCGContext *tcg_ctx);
 #define tcg_gen_sub2_tl tcg_gen_sub2_i64
 #define tcg_gen_mulu2_tl tcg_gen_mulu2_i64
 #define tcg_gen_muls2_tl tcg_gen_muls2_i64
+#define tcg_gen_atomic_cmpxchg_tl tcg_gen_atomic_cmpxchg_i64
+#define tcg_gen_atomic_xchg_tl tcg_gen_atomic_xchg_i64
+#define tcg_gen_atomic_fetch_add_tl tcg_gen_atomic_fetch_add_i64
+#define tcg_gen_atomic_fetch_and_tl tcg_gen_atomic_fetch_and_i64
+#define tcg_gen_atomic_fetch_or_tl tcg_gen_atomic_fetch_or_i64
+#define tcg_gen_atomic_fetch_xor_tl tcg_gen_atomic_fetch_xor_i64
+#define tcg_gen_atomic_add_fetch_tl tcg_gen_atomic_add_fetch_i64
+#define tcg_gen_atomic_and_fetch_tl tcg_gen_atomic_and_fetch_i64
+#define tcg_gen_atomic_or_fetch_tl tcg_gen_atomic_or_fetch_i64
+#define tcg_gen_atomic_xor_fetch_tl tcg_gen_atomic_xor_fetch_i64
 #else
 #define tcg_gen_movi_tl tcg_gen_movi_i32
 #define tcg_gen_mov_tl tcg_gen_mov_i32
@@ -1011,6 +1045,16 @@ void check_exit_request(TCGContext *tcg_ctx);
 #define tcg_gen_sub2_tl tcg_gen_sub2_i32
 #define tcg_gen_mulu2_tl tcg_gen_mulu2_i32
 #define tcg_gen_muls2_tl tcg_gen_muls2_i32
+#define tcg_gen_atomic_cmpxchg_tl tcg_gen_atomic_cmpxchg_i32
+#define tcg_gen_atomic_xchg_tl tcg_gen_atomic_xchg_i32
+#define tcg_gen_atomic_fetch_add_tl tcg_gen_atomic_fetch_add_i32
+#define tcg_gen_atomic_fetch_and_tl tcg_gen_atomic_fetch_and_i32
+#define tcg_gen_atomic_fetch_or_tl tcg_gen_atomic_fetch_or_i32
+#define tcg_gen_atomic_fetch_xor_tl tcg_gen_atomic_fetch_xor_i32
+#define tcg_gen_atomic_add_fetch_tl tcg_gen_atomic_add_fetch_i32
+#define tcg_gen_atomic_and_fetch_tl tcg_gen_atomic_and_fetch_i32
+#define tcg_gen_atomic_or_fetch_tl tcg_gen_atomic_or_fetch_i32
+#define tcg_gen_atomic_xor_fetch_tl tcg_gen_atomic_xor_fetch_i32
 #endif
 
 #if UINTPTR_MAX == UINT32_MAX

qemu/tcg/tcg-runtime.h

@@ -14,3 +14,78 @@ DEF_HELPER_FLAGS_2(sar_i64, TCG_CALL_NO_RWG_SE, s64, s64, s64)
 
 DEF_HELPER_FLAGS_2(mulsh_i64, TCG_CALL_NO_RWG_SE, s64, s64, s64)
 DEF_HELPER_FLAGS_2(muluh_i64, TCG_CALL_NO_RWG_SE, i64, i64, i64)
+
+#ifdef CONFIG_SOFTMMU
+
+DEF_HELPER_FLAGS_5(atomic_cmpxchgb, TCG_CALL_NO_WG,
+                   i32, env, tl, i32, i32, i32)
+DEF_HELPER_FLAGS_5(atomic_cmpxchgw_be, TCG_CALL_NO_WG,
+                   i32, env, tl, i32, i32, i32)
+DEF_HELPER_FLAGS_5(atomic_cmpxchgl_be, TCG_CALL_NO_WG,
+                   i32, env, tl, i32, i32, i32)
+DEF_HELPER_FLAGS_5(atomic_cmpxchgq_be, TCG_CALL_NO_WG,
+                   i64, env, tl, i64, i64, i32)
+DEF_HELPER_FLAGS_5(atomic_cmpxchgw_le, TCG_CALL_NO_WG,
+                   i32, env, tl, i32, i32, i32)
+DEF_HELPER_FLAGS_5(atomic_cmpxchgl_le, TCG_CALL_NO_WG,
+                   i32, env, tl, i32, i32, i32)
+DEF_HELPER_FLAGS_5(atomic_cmpxchgq_le, TCG_CALL_NO_WG,
+                   i64, env, tl, i64, i64, i32)
+
+#define GEN_ATOMIC_HELPERS(NAME)                                  \
+    DEF_HELPER_FLAGS_4(glue(glue(atomic_, NAME), b),              \
+                       TCG_CALL_NO_WG, i32, env, tl, i32, i32)    \
+    DEF_HELPER_FLAGS_4(glue(glue(atomic_, NAME), w_le),           \
+                       TCG_CALL_NO_WG, i32, env, tl, i32, i32)    \
+    DEF_HELPER_FLAGS_4(glue(glue(atomic_, NAME), w_be),           \
+                       TCG_CALL_NO_WG, i32, env, tl, i32, i32)    \
+    DEF_HELPER_FLAGS_4(glue(glue(atomic_, NAME), l_le),           \
+                       TCG_CALL_NO_WG, i32, env, tl, i32, i32)    \
+    DEF_HELPER_FLAGS_4(glue(glue(atomic_, NAME), l_be),           \
+                       TCG_CALL_NO_WG, i32, env, tl, i32, i32)    \
+    DEF_HELPER_FLAGS_4(glue(glue(atomic_, NAME), q_le),           \
+                       TCG_CALL_NO_WG, i64, env, tl, i64, i32)    \
+    DEF_HELPER_FLAGS_4(glue(glue(atomic_, NAME), q_be),           \
+                       TCG_CALL_NO_WG, i64, env, tl, i64, i32)
+
+#else
+
+DEF_HELPER_FLAGS_4(atomic_cmpxchgb, TCG_CALL_NO_WG, i32, env, tl, i32, i32)
+DEF_HELPER_FLAGS_4(atomic_cmpxchgw_be, TCG_CALL_NO_WG, i32, env, tl, i32, i32)
+DEF_HELPER_FLAGS_4(atomic_cmpxchgl_be, TCG_CALL_NO_WG, i32, env, tl, i32, i32)
+DEF_HELPER_FLAGS_4(atomic_cmpxchgq_be, TCG_CALL_NO_WG, i64, env, tl, i64, i64)
+DEF_HELPER_FLAGS_4(atomic_cmpxchgw_le, TCG_CALL_NO_WG, i32, env, tl, i32, i32)
+DEF_HELPER_FLAGS_4(atomic_cmpxchgl_le, TCG_CALL_NO_WG, i32, env, tl, i32, i32)
+DEF_HELPER_FLAGS_4(atomic_cmpxchgq_le, TCG_CALL_NO_WG, i64, env, tl, i64, i64)
+
+#define GEN_ATOMIC_HELPERS(NAME)                             \
+    DEF_HELPER_FLAGS_3(glue(glue(atomic_, NAME), b),         \
+                       TCG_CALL_NO_WG, i32, env, tl, i32)    \
+    DEF_HELPER_FLAGS_3(glue(glue(atomic_, NAME), w_le),      \
+                       TCG_CALL_NO_WG, i32, env, tl, i32)    \
+    DEF_HELPER_FLAGS_3(glue(glue(atomic_, NAME), w_be),      \
+                       TCG_CALL_NO_WG, i32, env, tl, i32)    \
+    DEF_HELPER_FLAGS_3(glue(glue(atomic_, NAME), l_le),      \
+                       TCG_CALL_NO_WG, i32, env, tl, i32)    \
+    DEF_HELPER_FLAGS_3(glue(glue(atomic_, NAME), l_be),      \
+                       TCG_CALL_NO_WG, i32, env, tl, i32)    \
+    DEF_HELPER_FLAGS_3(glue(glue(atomic_, NAME), q_le),      \
+                       TCG_CALL_NO_WG, i64, env, tl, i64)    \
+    DEF_HELPER_FLAGS_3(glue(glue(atomic_, NAME), q_be),      \
+                       TCG_CALL_NO_WG, i64, env, tl, i64)
+
+#endif /* CONFIG_SOFTMMU */
+
+GEN_ATOMIC_HELPERS(fetch_add)
+GEN_ATOMIC_HELPERS(fetch_and)
+GEN_ATOMIC_HELPERS(fetch_or)
+GEN_ATOMIC_HELPERS(fetch_xor)
+
+GEN_ATOMIC_HELPERS(add_fetch)
+GEN_ATOMIC_HELPERS(and_fetch)
+GEN_ATOMIC_HELPERS(or_fetch)
+GEN_ATOMIC_HELPERS(xor_fetch)
+
+GEN_ATOMIC_HELPERS(xchg)
+
+#undef GEN_ATOMIC_HELPERS

qemu/tcg/tcg.h

@@ -1281,6 +1281,59 @@ uint32_t helper_be_ldl_cmmu(CPUArchState *env, target_ulong addr,
 uint64_t helper_be_ldq_cmmu(CPUArchState *env, target_ulong addr,
                             TCGMemOpIdx oi, uintptr_t retaddr);
 
+uint32_t helper_atomic_cmpxchgb_mmu(CPUArchState *env, target_ulong addr,
+                                    uint32_t cmpv, uint32_t newv,
+                                    TCGMemOpIdx oi, uintptr_t retaddr);
+uint32_t helper_atomic_cmpxchgw_le_mmu(CPUArchState *env, target_ulong addr,
+                                       uint32_t cmpv, uint32_t newv,
+                                       TCGMemOpIdx oi, uintptr_t retaddr);
+uint32_t helper_atomic_cmpxchgl_le_mmu(CPUArchState *env, target_ulong addr,
+                                       uint32_t cmpv, uint32_t newv,
+                                       TCGMemOpIdx oi, uintptr_t retaddr);
+uint64_t helper_atomic_cmpxchgq_le_mmu(CPUArchState *env, target_ulong addr,
+                                       uint64_t cmpv, uint64_t newv,
+                                       TCGMemOpIdx oi, uintptr_t retaddr);
+uint32_t helper_atomic_cmpxchgw_be_mmu(CPUArchState *env, target_ulong addr,
+                                       uint32_t cmpv, uint32_t newv,
+                                       TCGMemOpIdx oi, uintptr_t retaddr);
+uint32_t helper_atomic_cmpxchgl_be_mmu(CPUArchState *env, target_ulong addr,
+                                       uint32_t cmpv, uint32_t newv,
+                                       TCGMemOpIdx oi, uintptr_t retaddr);
+uint64_t helper_atomic_cmpxchgq_be_mmu(CPUArchState *env, target_ulong addr,
+                                       uint64_t cmpv, uint64_t newv,
+                                       TCGMemOpIdx oi, uintptr_t retaddr);
+
+#define GEN_ATOMIC_HELPER(NAME, TYPE, SUFFIX)         \
+TYPE helper_atomic_ ## NAME ## SUFFIX ## _mmu         \
+    (CPUArchState *env, target_ulong addr, TYPE val,  \
+     TCGMemOpIdx oi, uintptr_t retaddr);
+
+#define GEN_ATOMIC_HELPER_ALL(NAME)          \
+    GEN_ATOMIC_HELPER(NAME, uint32_t, b)      \
+    GEN_ATOMIC_HELPER(NAME, uint32_t, w_le)  \
+    GEN_ATOMIC_HELPER(NAME, uint32_t, l_le)  \
+    GEN_ATOMIC_HELPER(NAME, uint64_t, q_le)  \
+    GEN_ATOMIC_HELPER(NAME, uint32_t, w_be)  \
+    GEN_ATOMIC_HELPER(NAME, uint32_t, l_be)  \
+    GEN_ATOMIC_HELPER(NAME, uint64_t, q_be)
+
+GEN_ATOMIC_HELPER_ALL(fetch_add)
+GEN_ATOMIC_HELPER_ALL(fetch_sub)
+GEN_ATOMIC_HELPER_ALL(fetch_and)
+GEN_ATOMIC_HELPER_ALL(fetch_or)
+GEN_ATOMIC_HELPER_ALL(fetch_xor)
+
+GEN_ATOMIC_HELPER_ALL(add_fetch)
+GEN_ATOMIC_HELPER_ALL(sub_fetch)
+GEN_ATOMIC_HELPER_ALL(and_fetch)
+GEN_ATOMIC_HELPER_ALL(or_fetch)
+GEN_ATOMIC_HELPER_ALL(xor_fetch)
+
+GEN_ATOMIC_HELPER_ALL(xchg)
+
+#undef GEN_ATOMIC_HELPER_ALL
+#undef GEN_ATOMIC_HELPER
+
 /* Temporary aliases until backends are converted.  */
 #ifdef TARGET_WORDS_BIGENDIAN
 # define helper_ret_ldsw_mmu  helper_be_ldsw_mmu

qemu/x86_64.h

@@ -1372,6 +1372,149 @@
 #define helper_add_saturate helper_add_saturate_x86_64
 #define helper_add_setq helper_add_setq_x86_64
 #define helper_add_usaturate helper_add_usaturate_x86_64
+#define helper_atomic_add_fetchb helper_atomic_add_fetchb_x86_64
+#define helper_atomic_add_fetchb_mmu helper_atomic_add_fetchb_mmu_x86_64
+#define helper_atomic_add_fetchl_be helper_atomic_add_fetchl_be_x86_64
+#define helper_atomic_add_fetchl_be_mmu helper_atomic_add_fetchl_be_mmu_x86_64
+#define helper_atomic_add_fetchl_le helper_atomic_add_fetchl_le_x86_64
+#define helper_atomic_add_fetchl_le_mmu helper_atomic_add_fetchl_le_mmu_x86_64
+#define helper_atomic_add_fetchq_be helper_atomic_add_fetchq_be_x86_64
+#define helper_atomic_add_fetchq_be_mmu helper_atomic_add_fetchq_be_mmu_x86_64
+#define helper_atomic_add_fetchq_le helper_atomic_add_fetchq_le_x86_64
+#define helper_atomic_add_fetchq_le_mmu helper_atomic_add_fetchq_le_mmu_x86_64
+#define helper_atomic_add_fetchw_be helper_atomic_add_fetchw_be_x86_64
+#define helper_atomic_add_fetchw_be_mmu helper_atomic_add_fetchw_be_mmu_x86_64
+#define helper_atomic_add_fetchw_le helper_atomic_add_fetchw_le_x86_64
+#define helper_atomic_add_fetchw_le_mmu helper_atomic_add_fetchw_le_mmu_x86_64
+#define helper_atomic_and_fetchb helper_atomic_and_fetchb_x86_64
+#define helper_atomic_and_fetchb_le_mmu helper_atomic_and_fetchb_le_mmu_x86_64
+#define helper_atomic_and_fetchb_mmu helper_atomic_and_fetchb_mmu_x86_64
+#define helper_atomic_and_fetchl_be helper_atomic_and_fetchl_be_x86_64
+#define helper_atomic_and_fetchl_be_mmu helper_atomic_and_fetchl_be_mmu_x86_64
+#define helper_atomic_and_fetchl_le helper_atomic_and_fetchl_le_x86_64
+#define helper_atomic_and_fetchl_le_mmu helper_atomic_and_fetchl_le_mmu_x86_64
+#define helper_atomic_and_fetchq_be helper_atomic_and_fetchq_be_x86_64
+#define helper_atomic_and_fetchq_be_mmu helper_atomic_and_fetchq_be_mmu_x86_64
+#define helper_atomic_and_fetchq_le helper_atomic_and_fetchq_le_x86_64
+#define helper_atomic_and_fetchq_le_mmu helper_atomic_and_fetchq_le_mmu_x86_64
+#define helper_atomic_and_fetchw_be helper_atomic_and_fetchw_be_x86_64
+#define helper_atomic_and_fetchw_be_mmu helper_atomic_and_fetchw_be_mmu_x86_64
+#define helper_atomic_and_fetchw_le helper_atomic_and_fetchw_le_x86_64
+#define helper_atomic_and_fetchw_le_mmu helper_atomic_and_fetchw_le_mmu_x86_64
+#define helper_atomic_cmpxchgb helper_atomic_cmpxchgb_x86_64
+#define helper_atomic_cmpxchgb helper_atomic_cmpxchgb_x86_64
+#define helper_atomic_cmpxchgb_mmu helper_atomic_cmpxchgb_mmu_x86_64
+#define helper_atomic_cmpxchgl_be helper_atomic_cmpxchgl_be_x86_64
+#define helper_atomic_cmpxchgl_be_mmu helper_atomic_cmpxchgl_be_mmu_x86_64
+#define helper_atomic_cmpxchgl_le helper_atomic_cmpxchgl_le_x86_64
+#define helper_atomic_cmpxchgl_le_mmu helper_atomic_cmpxchgl_le_mmu_x86_64
+#define helper_atomic_cmpxchgq_be helper_atomic_cmpxchgq_be_x86_64
+#define helper_atomic_cmpxchgq_be_mmu helper_atomic_cmpxchgq_be_mmu_x86_64
+#define helper_atomic_cmpxchgq_le helper_atomic_cmpxchgq_le_x86_64
+#define helper_atomic_cmpxchgq_le_mmu helper_atomic_cmpxchgq_le_mmu_x86_64
+#define helper_atomic_cmpxchgw_be helper_atomic_cmpxchgw_be_x86_64
+#define helper_atomic_cmpxchgw_be_mmu helper_atomic_cmpxchgw_be_mmu_x86_64
+#define helper_atomic_cmpxchgw_le helper_atomic_cmpxchgw_le_x86_64
+#define helper_atomic_cmpxchgw_le_mmu helper_atomic_cmpxchgw_le_mmu_x86_64
+#define helper_atomic_fetch_addb helper_atomic_fetch_addb_x86_64
+#define helper_atomic_fetch_addb_mmu helper_atomic_fetch_addb_mmu_x86_64
+#define helper_atomic_fetch_addl_be helper_atomic_fetch_addl_be_x86_64
+#define helper_atomic_fetch_addl_be_mmu helper_atomic_fetch_addl_be_mmu_x86_64
+#define helper_atomic_fetch_addl_le helper_atomic_fetch_addl_le_x86_64
+#define helper_atomic_fetch_addl_le_mmu helper_atomic_fetch_addl_le_mmu_x86_64
+#define helper_atomic_fetch_addq_be helper_atomic_fetch_addq_be_x86_64
+#define helper_atomic_fetch_addq_be_mmu helper_atomic_fetch_addq_be_mmu_x86_64
+#define helper_atomic_fetch_addq_le helper_atomic_fetch_addq_le_x86_64
+#define helper_atomic_fetch_addq_le_mmu helper_atomic_fetch_addq_le_mmu_x86_64
+#define helper_atomic_fetch_addw_be helper_atomic_fetch_addw_be_x86_64
+#define helper_atomic_fetch_addw_be_mmu helper_atomic_fetch_addw_be_mmu_x86_64
+#define helper_atomic_fetch_addw_le helper_atomic_fetch_addw_le_x86_64
+#define helper_atomic_fetch_addw_le_mmu helper_atomic_fetch_addw_le_mmu_x86_64
+#define helper_atomic_fetch_andb helper_atomic_fetch_andb_x86_64
+#define helper_atomic_fetch_andb_mmu helper_atomic_fetch_andb_mmu_x86_64
+#define helper_atomic_fetch_andl_be helper_atomic_fetch_andl_be_x86_64
+#define helper_atomic_fetch_andl_be_mmu helper_atomic_fetch_andl_be_mmu_x86_64
+#define helper_atomic_fetch_andl_le helper_atomic_fetch_andl_le_x86_64
+#define helper_atomic_fetch_andl_le_mmu helper_atomic_fetch_andl_le_mmu_x86_64
+#define helper_atomic_fetch_andq_be helper_atomic_fetch_andq_be_x86_64
+#define helper_atomic_fetch_andq_be_mmu helper_atomic_fetch_andq_be_mmu_x86_64
+#define helper_atomic_fetch_andq_le helper_atomic_fetch_andq_le_x86_64
+#define helper_atomic_fetch_andq_le_mmu helper_atomic_fetch_andq_le_mmu_x86_64
+#define helper_atomic_fetch_andw_be helper_atomic_fetch_andw_be_x86_64
+#define helper_atomic_fetch_andw_be_mmu helper_atomic_fetch_andw_be_mmu_x86_64
+#define helper_atomic_fetch_andw_le helper_atomic_fetch_andw_le_x86_64
+#define helper_atomic_fetch_andw_le_mmu helper_atomic_fetch_andw_le_mmu_x86_64
+#define helper_atomic_fetch_orb helper_atomic_fetch_orb_x86_64
+#define helper_atomic_fetch_orb_mmu helper_atomic_fetch_orb_mmu_x86_64
+#define helper_atomic_fetch_orl_be helper_atomic_fetch_orl_be_x86_64
+#define helper_atomic_fetch_orl_be_mmu helper_atomic_fetch_orl_be_mmu_x86_64
+#define helper_atomic_fetch_orl_le helper_atomic_fetch_orl_le_x86_64
+#define helper_atomic_fetch_orl_le_mmu helper_atomic_fetch_orl_le_mmu_x86_64
+#define helper_atomic_fetch_orq_be helper_atomic_fetch_orq_be_x86_64
+#define helper_atomic_fetch_orq_be_mmu helper_atomic_fetch_orq_be_mmu_x86_64
+#define helper_atomic_fetch_orq_le helper_atomic_fetch_orq_le_x86_64
+#define helper_atomic_fetch_orq_le_mmu helper_atomic_fetch_orq_le_mmu_x86_64
+#define helper_atomic_fetch_orw_be helper_atomic_fetch_orw_be_x86_64
+#define helper_atomic_fetch_orw_be_mmu helper_atomic_fetch_orw_be_mmu_x86_64
+#define helper_atomic_fetch_orw_le helper_atomic_fetch_orw_le_x86_64
+#define helper_atomic_fetch_orw_le_mmu helper_atomic_fetch_orw_le_mmu_x86_64
+#define helper_atomic_fetch_xorb helper_atomic_fetch_xorb_x86_64
+#define helper_atomic_fetch_xorb_mmu helper_atomic_fetch_xorb_mmu_x86_64
+#define helper_atomic_fetch_xorl_be helper_atomic_fetch_xorl_be_x86_64
+#define helper_atomic_fetch_xorl_be_mmu helper_atomic_fetch_xorl_be_mmu_x86_64
+#define helper_atomic_fetch_xorl_le helper_atomic_fetch_xorl_le_x86_64
+#define helper_atomic_fetch_xorl_le_mmu helper_atomic_fetch_xorl_le_mmu_x86_64
+#define helper_atomic_fetch_xorq_be helper_atomic_fetch_xorq_be_x86_64
+#define helper_atomic_fetch_xorq_be_mmu helper_atomic_fetch_xorq_be_mmu_x86_64
+#define helper_atomic_fetch_xorq_le helper_atomic_fetch_xorq_le_x86_64
+#define helper_atomic_fetch_xorq_le_mmu helper_atomic_fetch_xorq_le_mmu_x86_64
+#define helper_atomic_fetch_xorw_be helper_atomic_fetch_xorw_be_x86_64
+#define helper_atomic_fetch_xorw_be_mmu helper_atomic_fetch_xorw_be_mmu_x86_64
+#define helper_atomic_fetch_xorw_le helper_atomic_fetch_xorw_le_x86_64
+#define helper_atomic_fetch_xorw_le_mmu helper_atomic_fetch_xorw_le_mmu_x86_64
+#define helper_atomic_or_fetchb helper_atomic_or_fetchb_x86_64
+#define helper_atomic_or_fetchb_mmu helper_atomic_or_fetchb_mmu_x86_64
+#define helper_atomic_or_fetchl_be helper_atomic_or_fetchl_be_x86_64
+#define helper_atomic_or_fetchl_be_mmu helper_atomic_or_fetchl_be_mmu_x86_64
+#define helper_atomic_or_fetchl_le helper_atomic_or_fetchl_le_x86_64
+#define helper_atomic_or_fetchl_le_mmu helper_atomic_or_fetchl_le_mmu_x86_64
+#define helper_atomic_or_fetchq_be helper_atomic_or_fetchq_be_x86_64
+#define helper_atomic_or_fetchq_be_mmu helper_atomic_or_fetchq_be_mmu_x86_64
+#define helper_atomic_or_fetchq_le helper_atomic_or_fetchq_le_x86_64
+#define helper_atomic_or_fetchq_le_mmu helper_atomic_or_fetchq_le_mmu_x86_64
+#define helper_atomic_or_fetchw_be helper_atomic_or_fetchw_be_x86_64
+#define helper_atomic_or_fetchw_be_mmu helper_atomic_or_fetchw_be_mmu_x86_64
+#define helper_atomic_or_fetchw_le helper_atomic_or_fetchw_le_x86_64
+#define helper_atomic_or_fetchw_le_mmu helper_atomic_or_fetchw_le_mmu_x86_64
+#define helper_atomic_xchgb helper_atomic_xchgb_x86_64
+#define helper_atomic_xchgb helper_atomic_xchgb_x86_64
+#define helper_atomic_xchgb_mmu helper_atomic_xchgb_mmu_x86_64
+#define helper_atomic_xchgl_be helper_atomic_xchgl_be_x86_64
+#define helper_atomic_xchgl_be_mmu helper_atomic_xchgl_be_mmu_x86_64
+#define helper_atomic_xchgl_le helper_atomic_xchgl_le_x86_64
+#define helper_atomic_xchgl_le_mmu helper_atomic_xchgl_le_mmu_x86_64
+#define helper_atomic_xchgq_be helper_atomic_xchgq_be_x86_64
+#define helper_atomic_xchgq_be_mmu helper_atomic_xchgq_be_mmu_x86_64
+#define helper_atomic_xchgq_le helper_atomic_xchgq_le_x86_64
+#define helper_atomic_xchgq_le_mmu helper_atomic_xchgq_le_mmu_x86_64
+#define helper_atomic_xchgw_be helper_atomic_xchgw_be_x86_64
+#define helper_atomic_xchgw_be_mmu helper_atomic_xchgw_be_mmu_x86_64
+#define helper_atomic_xchgw_le helper_atomic_xchgw_le_x86_64
+#define helper_atomic_xchgw_le_mmu helper_atomic_xchgw_le_mmu_x86_64
+#define helper_atomic_xor_fetchb helper_atomic_xor_fetchb_x86_64
+#define helper_atomic_xor_fetchb_mmu helper_atomic_xor_fetchb_mmu_x86_64
+#define helper_atomic_xor_fetchl_be helper_atomic_xor_fetchl_be_x86_64
+#define helper_atomic_xor_fetchl_be_mmu helper_atomic_xor_fetchl_be_mmu_x86_64
+#define helper_atomic_xor_fetchl_le helper_atomic_xor_fetchl_le_x86_64
+#define helper_atomic_xor_fetchl_le_mmu helper_atomic_xor_fetchl_le_mmu_x86_64
+#define helper_atomic_xor_fetchq_be helper_atomic_xor_fetchq_be_x86_64
+#define helper_atomic_xor_fetchq_be_mmu helper_atomic_xor_fetchq_be_mmu_x86_64
+#define helper_atomic_xor_fetchq_le helper_atomic_xor_fetchq_le_x86_64
+#define helper_atomic_xor_fetchq_le_mmu helper_atomic_xor_fetchq_le_mmu_x86_64
+#define helper_atomic_xor_fetchw_be helper_atomic_xor_fetchw_be_x86_64
+#define helper_atomic_xor_fetchw_be_mmu helper_atomic_xor_fetchw_be_mmu_x86_64
+#define helper_atomic_xor_fetchw_le helper_atomic_xor_fetchw_le_x86_64
+#define helper_atomic_xor_fetchw_le_mmu helper_atomic_xor_fetchw_le_mmu_x86_64
 #define helper_be_ldl_cmmu helper_be_ldl_cmmu_x86_64
 #define helper_be_ldq_cmmu helper_be_ldq_cmmu_x86_64
 #define helper_be_ldq_mmu helper_be_ldq_mmu_x86_64
@@ -1400,6 +1543,10 @@
 #define helper_crypto_sha256su0 helper_crypto_sha256su0_x86_64
 #define helper_crypto_sha256su1 helper_crypto_sha256su1_x86_64
 #define helper_dc_zva helper_dc_zva_x86_64
+#define helper_div_i32 helper_div_i32_x86_64
+#define helper_div_i64 helper_div_i64_x86_64
+#define helper_divu_i32 helper_divu_i32_x86_64
+#define helper_divu_i64 helper_divu_i64_x86_64
 #define helper_double_saturate helper_double_saturate_x86_64
 #define helper_exception_internal helper_exception_internal_x86_64
 #define helper_exception_return helper_exception_return_x86_64
@@ -1532,6 +1679,10 @@
 #define helper_le_stl_mmu helper_le_stl_mmu_x86_64
 #define helper_le_stq_mmu helper_le_stq_mmu_x86_64
 #define helper_le_stw_mmu helper_le_stw_mmu_x86_64
+#define helper_mulsh_i32 helper_mulsh_i32_x86_64
+#define helper_mulsh_i64 helper_mulsh_i64_x86_64
+#define helper_muluh_i32 helper_muluh_i32_x86_64
+#define helper_muluh_i64 helper_muluh_i64_x86_64
 #define helper_mrs_banked helper_mrs_banked_x86_64
 #define helper_msa_ld_b helper_msa_ld_b_x86_64
 #define helper_msa_ld_d helper_msa_ld_d_x86_64
@@ -1773,6 +1924,10 @@
 #define helper_recpe_f64 helper_recpe_f64_x86_64
 #define helper_recpe_u32 helper_recpe_u32_x86_64
 #define helper_recps_f32 helper_recps_f32_x86_64
+#define helper_rem_i32 helper_rem_i32_x86_64
+#define helper_rem_i64 helper_rem_i64_x86_64
+#define helper_remu_i32 helper_remu_i32_x86_64
+#define helper_remu_i64 helper_remu_i64_x86_64
 #define helper_ret_ldb_cmmu helper_ret_ldb_cmmu_x86_64
 #define helper_ret_ldsb_mmu helper_ret_ldsb_mmu_x86_64
 #define helper_ret_ldub_mmu helper_ret_ldub_mmu_x86_64
@@ -1790,6 +1945,8 @@
 #define helper_sadd8 helper_sadd8_x86_64
 #define helper_saddsubx helper_saddsubx_x86_64
 #define helper_sar_cc helper_sar_cc_x86_64
+#define helper_sar_i32 helper_sar_i32_x86_64
+#define helper_sar_i64 helper_sar_i64_x86_64
 #define helper_sdiv helper_sdiv_x86_64
 #define helper_sel_flags helper_sel_flags_x86_64
 #define helper_set_cp_reg helper_set_cp_reg_x86_64
@@ -1803,7 +1960,10 @@
 #define helper_shadd8 helper_shadd8_x86_64
 #define helper_shaddsubx helper_shaddsubx_x86_64
 #define helper_shl_cc helper_shl_cc_x86_64
+#define helper_shl_i64 helper_shl_i64_x86_64
 #define helper_shr_cc helper_shr_cc_x86_64
+#define helper_shr_i32 helper_shr_i32_x86_64
+#define helper_shr_i64 helper_shr_i64_x86_64
 #define helper_shsub16 helper_shsub16_x86_64
 #define helper_shsub8 helper_shsub8_x86_64
 #define helper_shsubaddx helper_shsubaddx_x86_64
@@ -2756,6 +2916,26 @@
 #define tcg_gen_andc_i64 tcg_gen_andc_i64_x86_64
 #define tcg_gen_andi_i32 tcg_gen_andi_i32_x86_64
 #define tcg_gen_andi_i64 tcg_gen_andi_i64_x86_64
+#define tcg_gen_atomic_add_fetch_i32 tcg_gen_atomic_add_fetch_i32_x86_64
+#define tcg_gen_atomic_add_fetch_i64 tcg_gen_atomic_add_fetch_i64_x86_64
+#define tcg_gen_atomic_and_fetch_i32 tcg_gen_atomic_and_fetch_i32_x86_64
+#define tcg_gen_atomic_and_fetch_i64 tcg_gen_atomic_and_fetch_i64_x86_64
+#define tcg_gen_atomic_cmpxchg_i32 tcg_gen_atomic_cmpxchg_i32_x86_64
+#define tcg_gen_atomic_cmpxchg_i64 tcg_gen_atomic_cmpxchg_i64_x86_64
+#define tcg_gen_atomic_fetch_add_i32 tcg_gen_atomic_fetch_add_i32_x86_64
+#define tcg_gen_atomic_fetch_add_i64 tcg_gen_atomic_fetch_add_i64_x86_64
+#define tcg_gen_atomic_fetch_and_i32 tcg_gen_atomic_fetch_and_i32_x86_64
+#define tcg_gen_atomic_fetch_and_i64 tcg_gen_atomic_fetch_and_i64_x86_64
+#define tcg_gen_atomic_fetch_or_i32 tcg_gen_atomic_fetch_or_i32_x86_64
+#define tcg_gen_atomic_fetch_or_i64 tcg_gen_atomic_fetch_or_i64_x86_64
+#define tcg_gen_atomic_fetch_xor_i32 tcg_gen_atomic_fetch_xor_i32_x86_64
+#define tcg_gen_atomic_fetch_xor_i64 tcg_gen_atomic_fetch_xor_i64_x86_64
+#define tcg_gen_atomic_or_fetch_i32 tcg_gen_atomic_or_fetch_i32_x86_64
+#define tcg_gen_atomic_or_fetch_i64 tcg_gen_atomic_or_fetch_i64_x86_64
+#define tcg_gen_atomic_xchg_i32 tcg_gen_atomic_xchg_i32_x86_64
+#define tcg_gen_atomic_xchg_i64 tcg_gen_atomic_xchg_i64_x86_64
+#define tcg_gen_atomic_xor_fetch_i32 tcg_gen_atomic_xor_fetch_i32_x86_64
+#define tcg_gen_atomic_xor_fetch_i64 tcg_gen_atomic_xor_fetch_i64_x86_64
 #define tcg_gen_br tcg_gen_br_x86_64
 #define tcg_gen_brcond_i32 tcg_gen_brcond_i32_x86_64
 #define tcg_gen_brcond_i64 tcg_gen_brcond_i64_x86_64