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target-arm: Implement YIELD insn to yield in ARM and Thumb translators
Implement the YIELD instruction in the ARM and Thumb translators to actually yield control back to the top level loop rather than being a simple no-op. (We already do this for A64.) Backports commit c87e5a61c2b3024116f52f7e68273f864ff7ab82 from qemu
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@ -4221,6 +4221,10 @@ static void gen_rfe(DisasContext *s, TCGv_i32 pc, TCGv_i32 cpsr)
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static void gen_nop_hint(DisasContext *s, int val)
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static void gen_nop_hint(DisasContext *s, int val)
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{
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{
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switch (val) {
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switch (val) {
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case 1: /* yield */
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gen_set_pc_im(s, s->pc);
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s->is_jmp = DISAS_YIELD;
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break;
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case 3: /* wfi */
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case 3: /* wfi */
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gen_set_pc_im(s, s->pc);
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gen_set_pc_im(s, s->pc);
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s->is_jmp = DISAS_WFI;
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s->is_jmp = DISAS_WFI;
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@ -11699,6 +11703,9 @@ tb_end:
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case DISAS_WFE:
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case DISAS_WFE:
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gen_helper_wfe(tcg_ctx, tcg_ctx->cpu_env);
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gen_helper_wfe(tcg_ctx, tcg_ctx->cpu_env);
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break;
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break;
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case DISAS_YIELD:
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gen_helper_yield(tcg_ctx, tcg_ctx->cpu_env);
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break;
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case DISAS_SWI:
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case DISAS_SWI:
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gen_exception(dc, EXCP_SWI, syn_aa32_svc(dc->svc_imm, dc->thumb),
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gen_exception(dc, EXCP_SWI, syn_aa32_svc(dc->svc_imm, dc->thumb),
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default_exception_el(dc));
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default_exception_el(dc));
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