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Merge pull request #467 from sashs/master
Bugfix: uc_x86_mmr has no attribute limits
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commit
5d22d6c7f4
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@ -229,7 +229,7 @@ class Uc(object):
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status = _uc.uc_reg_read(self._uch, reg_id, ctypes.byref(reg))
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status = _uc.uc_reg_read(self._uch, reg_id, ctypes.byref(reg))
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if status != UC_ERR_OK:
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if status != UC_ERR_OK:
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raise UcError(status)
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raise UcError(status)
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return (reg.selector,reg.base, reg.limits, reg.flags)
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return (reg.selector,reg.base, reg.limit, reg.flags)
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if reg_id in range(x86_const.UC_X86_REG_FP0,x86_const.UC_X86_REG_FP0+8):
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if reg_id in range(x86_const.UC_X86_REG_FP0,x86_const.UC_X86_REG_FP0+8):
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reg = uc_x86_float80()
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reg = uc_x86_float80()
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status = _uc.uc_reg_read(self._uch, reg_id, ctypes.byref(reg))
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status = _uc.uc_reg_read(self._uch, reg_id, ctypes.byref(reg))
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@ -255,7 +255,7 @@ class Uc(object):
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reg = uc_x86_mmr()
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reg = uc_x86_mmr()
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reg.selector=value[0]
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reg.selector=value[0]
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reg.base=value[1]
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reg.base=value[1]
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reg.limits=value[2]
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reg.limit=value[2]
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reg.flags=value[3]
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reg.flags=value[3]
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if reg_id in range(x86_const.UC_X86_REG_FP0, x86_const.UC_X86_REG_FP0+8):
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if reg_id in range(x86_const.UC_X86_REG_FP0, x86_const.UC_X86_REG_FP0+8):
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reg = uc_x86_float80()
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reg = uc_x86_float80()
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