target/sparc: Convert to CPUClass::tlb_fill

Backports commit e84942f2ceaa79430414f2cb68d77c044dadca96 from qemu

qemu/header_gen.py

@@ -5616,8 +5616,8 @@ sparc_symbols = (
     'sparc_cpu_do_interrupt',
     'sparc_cpu_do_unaligned_access',
     'sparc_cpu_get_phys_page_debug',
-    'sparc_cpu_handle_mmu_fault',
     'sparc_cpu_register_types',
+    'sparc_cpu_tlb_fill',
     'sparc_cpu_unassigned_access',
     'sparc_reg_read',
     'sparc_reg_reset',

qemu/sparc.h

@@ -3442,8 +3442,8 @@
 #define sparc_cpu_do_interrupt sparc_cpu_do_interrupt_sparc
 #define sparc_cpu_do_unaligned_access sparc_cpu_do_unaligned_access_sparc
 #define sparc_cpu_get_phys_page_debug sparc_cpu_get_phys_page_debug_sparc
-#define sparc_cpu_handle_mmu_fault sparc_cpu_handle_mmu_fault_sparc
 #define sparc_cpu_register_types sparc_cpu_register_types_sparc
+#define sparc_cpu_tlb_fill sparc_cpu_tlb_fill_sparc
 #define sparc_cpu_unassigned_access sparc_cpu_unassigned_access_sparc
 #define sparc_reg_read sparc_reg_read_sparc
 #define sparc_reg_reset sparc_reg_reset_sparc

qemu/sparc64.h

@@ -3442,8 +3442,8 @@
 #define sparc_cpu_do_interrupt sparc_cpu_do_interrupt_sparc64
 #define sparc_cpu_do_unaligned_access sparc_cpu_do_unaligned_access_sparc64
 #define sparc_cpu_get_phys_page_debug sparc_cpu_get_phys_page_debug_sparc64
-#define sparc_cpu_handle_mmu_fault sparc_cpu_handle_mmu_fault_sparc64
 #define sparc_cpu_register_types sparc_cpu_register_types_sparc64
+#define sparc_cpu_tlb_fill sparc_cpu_tlb_fill_sparc64
 #define sparc_cpu_unassigned_access sparc_cpu_unassigned_access_sparc64
 #define sparc_reg_read sparc_reg_read_sparc64
 #define sparc_reg_reset sparc_reg_reset_sparc64

qemu/target/sparc/cpu.c

@@ -848,9 +848,8 @@ static void sparc_cpu_class_init(struct uc_struct *uc, ObjectClass *oc, void *da
 #endif
     cc->set_pc = sparc_cpu_set_pc;
     cc->synchronize_from_tb = sparc_cpu_synchronize_from_tb;
-#ifdef CONFIG_USER_ONLY
+    cc->tlb_fill = sparc_cpu_tlb_fill;
-    cc->handle_mmu_fault = sparc_cpu_handle_mmu_fault;
+#ifndef CONFIG_USER_ONLY
-#else
     cc->do_unassigned_access = sparc_cpu_unassigned_access;
     cc->do_unaligned_access = sparc_cpu_do_unaligned_access;
     cc->get_phys_page_debug = sparc_cpu_get_phys_page_debug;

qemu/target/sparc/cpu.h

@@ -571,8 +571,9 @@ void cpu_raise_exception_ra(CPUSPARCState *, int, uintptr_t) QEMU_NORETURN;
 void cpu_sparc_set_id(CPUSPARCState *env, unsigned int cpu);
 void sparc_cpu_list(FILE *f, fprintf_function cpu_fprintf);
 /* mmu_helper.c */
-int sparc_cpu_handle_mmu_fault(CPUState *cpu, vaddr address, int size, int rw,
+bool sparc_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
-                               int mmu_idx);
+                        MMUAccessType access_type, int mmu_idx,
+                        bool probe, uintptr_t retaddr);
 target_ulong mmu_probe(CPUSPARCState *env, target_ulong address, int mmulev);
 void dump_mmu(FILE *f, fprintf_function cpu_fprintf, CPUSPARCState *env);
 

qemu/target/sparc/ldst_helper.c

@@ -1930,18 +1930,9 @@ void QEMU_NORETURN sparc_cpu_do_unaligned_access(CPUState *cs, vaddr addr,
     cpu_raise_exception_ra(env, TT_UNALIGNED, retaddr);
 }
 
-/* try to fill the TLB and return an exception if error. If retaddr is
-   NULL, it means that the function was called in C code (i.e. not
-   from generated code or from helper.c) */
-/* XXX: fix it to restore all registers */
 void tlb_fill(CPUState *cs, target_ulong addr, int size,
               MMUAccessType access_type, int mmu_idx, uintptr_t retaddr)
 {
-    int ret;
+    sparc_cpu_tlb_fill(cs, addr, size, access_type, mmu_idx, false, retaddr);
-
-    ret = sparc_cpu_handle_mmu_fault(cs, addr, size, access_type, mmu_idx);
-    if (ret) {
-        cpu_loop_exit_restore(cs, retaddr);
-    }
 }
 #endif

qemu/target/sparc/mmu_helper.c

@@ -25,13 +25,14 @@
 
 #if defined(CONFIG_USER_ONLY)
 
-int sparc_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int size, int rw,
+bool sparc_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
-                               int mmu_idx)
+                        MMUAccessType access_type, int mmu_idx,
+                        bool probe, uintptr_t retaddr)
 {
     SPARCCPU *cpu = SPARC_CPU(cs->uc, cs);
     CPUSPARCState *env = &cpu->env;
 
-    if (rw & 2) {
+    if (access_type == MMU_INST_FETCH) {
         cs->exception_index = TT_TFAULT;
     } else {
         cs->exception_index = TT_DFAULT;
@@ -41,7 +42,7 @@ int sparc_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int size, int rw,
         env->mmuregs[4] = address;
 #endif
     }
-    return 1;
+    cpu_loop_exit_restore(cs, retaddr);
 }
 
 #else
@@ -206,8 +207,9 @@ static int get_physical_address(CPUSPARCState *env, hwaddr *physical,
 }
 
 /* Perform address translation */
-int sparc_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int size, int rw,
+bool sparc_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
-                               int mmu_idx)
+                        MMUAccessType access_type, int mmu_idx,
+                        bool probe, uintptr_t retaddr)
 {
     SPARCCPU *cpu = SPARC_CPU(cs->uc, cs);
     CPUSPARCState *env = &cpu->env;
@@ -216,17 +218,26 @@ int sparc_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int size, int rw,
     target_ulong page_size;
     int error_code = 0, prot, access_index;
 
+    /*
+     * TODO: If we ever need tlb_vaddr_to_host for this target,
+     * then we must figure out how to manipulate FSR and FAR
+     * when both MMU_NF and probe are set.  In the meantime,
+     * do not support this use case.
+     */
+    assert(!probe);
+
     address &= TARGET_PAGE_MASK;
     error_code = get_physical_address(env, &paddr, &prot, &access_index,
-                                      address, rw, mmu_idx, &page_size);
+                                      address, access_type,
+                                      mmu_idx, &page_size);
     vaddr = address;
-    if (error_code == 0) {
+    if (likely(error_code == 0)) {
-#ifdef DEBUG_MMU
+        qemu_log_mask(CPU_LOG_MMU,
-        printf("Translate at %" VADDR_PRIx " -> " TARGET_FMT_plx ", vaddr "
+                      "Translate at %" VADDR_PRIx " -> "
-               TARGET_FMT_lx "\n", address, paddr, vaddr);
+                      TARGET_FMT_plx ", vaddr " TARGET_FMT_lx "\n",
-#endif
+                      address, paddr, vaddr);
         tlb_set_page(cs, vaddr, paddr, prot, mmu_idx, page_size);
-        return 0;
+        return true;
     }
 
     if (env->mmuregs[3]) { /* Fault status register */
@@ -242,14 +253,14 @@ int sparc_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int size, int rw,
            switching to normal mode. */
         prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC;
         tlb_set_page(cs, vaddr, paddr, prot, mmu_idx, TARGET_PAGE_SIZE);
-        return 0;
+        return true;
     } else {
-        if (rw & 2) {
+        if (access_type == MMU_INST_FETCH) {
             cs->exception_index = TT_TFAULT;
         } else {
             cs->exception_index = TT_DFAULT;
         }
-        return 1;
+        cpu_loop_exit_restore(cs, retaddr);
     }
 }
 
@@ -713,8 +724,9 @@ static int get_physical_address(CPUSPARCState *env, hwaddr *physical,
 }
 
 /* Perform address translation */
-int sparc_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int size, int rw,
+bool sparc_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
-                               int mmu_idx)
+                        MMUAccessType access_type, int mmu_idx,
+                        bool probe, uintptr_t retaddr)
 {
     SPARCCPU *cpu = SPARC_CPU(cs->uc, cs);
     CPUSPARCState *env = &cpu->env;
@@ -725,8 +737,9 @@ int sparc_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int size, int rw,
 
     address &= TARGET_PAGE_MASK;
     error_code = get_physical_address(env, &paddr, &prot, &access_index,
-                                      address, rw, mmu_idx, &page_size);
+                                      address, access_type,
-    if (error_code == 0) {
+                                      mmu_idx, &page_size);
+    if (likely(error_code == 0)) {
         vaddr = address;
 
         //trace_mmu_helper_mmu_fault(address, paddr, mmu_idx, env->tl,
@@ -734,10 +747,12 @@ int sparc_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int size, int rw,
         //                           env->dmmu.mmu_secondary_context);
 
         tlb_set_page(cs, vaddr, paddr, prot, mmu_idx, page_size);
-        return 0;
+        return true;
     }
-    /* XXX */
+    if (probe) {
-    return 1;
+        return false;
+    }
+    cpu_loop_exit_restore(cs, retaddr);
 }
 
 void dump_mmu(FILE *f, fprintf_function cpu_fprintf, CPUSPARCState *env)