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target-m68k: immediate ops manage word and byte operands
Backports commit 92c62548f69cb4ba739d7d046e9caf9ea75753e4 from qemu
This commit is contained in:
parent
f7c29f73b3
commit
5daf91ea48
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@ -1480,52 +1480,65 @@ DISAS_INSN(arith_im)
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{
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{
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TCGContext *tcg_ctx = s->uc->tcg_ctx;
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TCGContext *tcg_ctx = s->uc->tcg_ctx;
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int op;
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int op;
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uint32_t im;
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TCGv im;
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TCGv src1;
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TCGv src1;
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TCGv dest;
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TCGv dest;
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TCGv addr;
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TCGv addr;
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int opsize;
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op = (insn >> 9) & 7;
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op = (insn >> 9) & 7;
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SRC_EA(env, src1, OS_LONG, 0, (op == 6) ? NULL : &addr);
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opsize = insn_opsize(insn);
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im = read_im32(env, s);
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switch (opsize) {
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case OS_BYTE:
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im = tcg_const_i32(tcg_ctx, (int8_t)read_im8(env, s));
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break;
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case OS_WORD:
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im = tcg_const_i32(tcg_ctx, (int16_t)read_im16(env, s));
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break;
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case OS_LONG:
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im = tcg_const_i32(tcg_ctx, read_im32(env, s));
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break;
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default:
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abort();
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}
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SRC_EA(env, src1, opsize, 1, (op == 6) ? NULL : &addr);
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dest = tcg_temp_new(tcg_ctx);
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dest = tcg_temp_new(tcg_ctx);
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switch (op) {
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switch (op) {
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case 0: /* ori */
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case 0: /* ori */
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tcg_gen_ori_i32(tcg_ctx, dest, src1, im);
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tcg_gen_or_i32(tcg_ctx, dest, src1, im);
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gen_logic_cc(s, dest, OS_LONG);
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gen_logic_cc(s, dest, opsize);
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break;
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break;
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case 1: /* andi */
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case 1: /* andi */
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tcg_gen_andi_i32(tcg_ctx, dest, src1, im);
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tcg_gen_and_i32(tcg_ctx, dest, src1, im);
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gen_logic_cc(s, dest, OS_LONG);
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gen_logic_cc(s, dest, opsize);
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break;
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break;
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case 2: /* subi */
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case 2: /* subi */
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tcg_gen_mov_i32(tcg_ctx, dest, src1);
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tcg_gen_setcond_i32(tcg_ctx, TCG_COND_LTU, tcg_ctx->QREG_CC_X, src1, im);
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tcg_gen_setcondi_i32(tcg_ctx, TCG_COND_LTU, tcg_ctx->QREG_CC_X, dest, im);
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tcg_gen_sub_i32(tcg_ctx, dest, src1, im);
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tcg_gen_subi_i32(tcg_ctx, dest, dest, im);
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gen_update_cc_add(s, dest, im, opsize);
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gen_update_cc_add(s, dest, tcg_const_i32(tcg_ctx, im), OS_LONG);
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set_cc_op(s, CC_OP_SUBB + opsize);
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set_cc_op(s, CC_OP_SUBL);
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break;
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break;
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case 3: /* addi */
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case 3: /* addi */
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tcg_gen_mov_i32(tcg_ctx, dest, src1);
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tcg_gen_add_i32(tcg_ctx, dest, src1, im);
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tcg_gen_addi_i32(tcg_ctx, dest, dest, im);
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gen_update_cc_add(s, dest, im, opsize);
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gen_update_cc_add(s, dest, tcg_const_i32(tcg_ctx, im), OS_LONG);
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tcg_gen_setcond_i32(tcg_ctx, TCG_COND_LTU, tcg_ctx->QREG_CC_X, dest, im);
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tcg_gen_setcondi_i32(tcg_ctx, TCG_COND_LTU, tcg_ctx->QREG_CC_X, dest, im);
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set_cc_op(s, CC_OP_ADDB + opsize);
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set_cc_op(s, CC_OP_ADDL);
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break;
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break;
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case 5: /* eori */
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case 5: /* eori */
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tcg_gen_xori_i32(tcg_ctx, dest, src1, im);
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tcg_gen_xor_i32(tcg_ctx, dest, src1, im);
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gen_logic_cc(s, dest, OS_LONG);
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gen_logic_cc(s, dest, opsize);
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break;
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break;
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case 6: /* cmpi */
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case 6: /* cmpi */
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gen_update_cc_add(s, src1, tcg_const_i32(tcg_ctx, im), OS_LONG);
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gen_update_cc_cmp(s, src1, im, opsize);
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set_cc_op(s, CC_OP_CMPL);
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break;
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break;
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default:
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default:
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abort();
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abort();
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}
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}
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tcg_temp_free(tcg_ctx, im);
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if (op != 6) {
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if (op != 6) {
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DEST_EA(env, insn, OS_LONG, dest, &addr);
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DEST_EA(env, insn, opsize, dest, &addr);
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}
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}
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tcg_temp_free(tcg_ctx, dest);
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}
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}
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DISAS_INSN(byterev)
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DISAS_INSN(byterev)
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