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target-m68k: manage pre-dec et post-inc in CAS

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In these cases we must update the address register after
the operation.

Backports commit 308feb935249ad745ef763707e1db69bc10ba789 from qemu
This commit is contained in:
Laurent Vivier 2018-03-01 19:14:31 -05:00 committed by Lioncash
parent 1197d778cc
commit 636bf36272
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1 changed files with 9 additions and 0 deletions
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9
qemu/target-m68k/translate.c
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@ -2000,6 +2000,15 @@ DISAS_INSN(cas)
gen_partset_reg(s, opsize, DREG(ext, 0), load); gen_partset_reg(s, opsize, DREG(ext, 0), load);
tcg_temp_free(tcg_ctx, load); tcg_temp_free(tcg_ctx, load);
switch (extract32(insn, 3, 3)) {
case 3: /* Indirect postincrement. */
tcg_gen_addi_i32(tcg_ctx, AREG(insn, 0), addr, opsize_bytes(opsize));
break;
case 4: /* Indirect predecrememnt. */
tcg_gen_mov_i32(tcg_ctx, AREG(insn, 0), addr);
break;
}
} }
DISAS_INSN(cas2w) DISAS_INSN(cas2w)