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target/arm/translate: make DISAS_UPDATE match declared semantics

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DISAS_UPDATE should be used when the wider CPU state other than just
the PC has been updated and we should therefore exit the TCG runtime
and return to the main execution loop rather assuming DISAS_JUMP would
do that.

Backports commit e8d5230221851e8933811f1579fd13371f576955 from qemu
This commit is contained in:
Alex Bennée 2018-03-03 22:32:59 -05:00 committed by Lioncash
parent 7d02489baf
commit 63d40e1a55
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GPG key ID: 4E3C3CC1031BA9C7
3 changed files with 11 additions and 11 deletions
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14
qemu/target/arm/translate-a64.c
View file

@ -11609,16 +11609,9 @@ tb_end:
case DISAS_NEXT: case DISAS_NEXT:
gen_goto_tb(dc, 1, dc->pc); gen_goto_tb(dc, 1, dc->pc);
break; break;
default:
case DISAS_UPDATE:
gen_a64_set_pc_im(dc, dc->pc);
/* fall through */
case DISAS_JUMP: case DISAS_JUMP:
tcg_gen_lookup_and_goto_ptr(tcg_ctx, tcg_ctx->cpu_pc); tcg_gen_lookup_and_goto_ptr(tcg_ctx, tcg_ctx->cpu_pc);
break; break;
case DISAS_EXIT:
tcg_gen_exit_tb(tcg_ctx, 0);
break;
case DISAS_TB_JUMP: case DISAS_TB_JUMP:
case DISAS_EXC: case DISAS_EXC:
case DISAS_SWI: case DISAS_SWI:
@ -11642,6 +11635,13 @@ tb_end:
*/ */
tcg_gen_exit_tb(tcg_ctx, 0); tcg_gen_exit_tb(tcg_ctx, 0);
break; break;
case DISAS_UPDATE:
gen_a64_set_pc_im(dc, dc->pc);
/* fall through */
case DISAS_EXIT:
default:
tcg_gen_exit_tb(tcg_ctx, 0);
break;
} }
} }

6
qemu/target/arm/translate.c
View file

@ -12329,12 +12329,12 @@ tb_end:
case DISAS_NEXT: case DISAS_NEXT:
gen_goto_tb(dc, 1, dc->pc); gen_goto_tb(dc, 1, dc->pc);
break; break;
case DISAS_UPDATE:
gen_set_pc_im(dc, dc->pc);
/* fall through */
case DISAS_JUMP: case DISAS_JUMP:
gen_goto_ptr(dc); gen_goto_ptr(dc);
break; break;
case DISAS_UPDATE:
gen_set_pc_im(dc, dc->pc);
/* fall through */
default: default:
/* indicate that the hash table must be used to find the next TB */ /* indicate that the hash table must be used to find the next TB */
tcg_gen_exit_tb(tcg_ctx, 0); tcg_gen_exit_tb(tcg_ctx, 0);

2
qemu/target/arm/translate.h
View file

@ -156,7 +156,7 @@ static inline void gen_intermediate_code_a64(ARMCPU *cpu, TranslationBlock *tb)
{ {
} }
static inline void gen_a64_set_pc_im(uint64_t val) static inline void gen_a64_set_pc_im(DisasContext *s, uint64_t val)
{ {
} }
#endif #endif