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target-arm: Implement missing ACTLR registers
We already implemented ACTLR_EL1; add the missing ACTLR_EL2 and ACTLR_EL3, for consistency. Since we don't currently have any CPUs that need the EL2/EL3 versions to reset to non-zero values, implement as RAZ/WI. Backports commit 834a6c6920316d39aaf0e68ac936c0a3ad164815 from qemu
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@ -3366,11 +3366,16 @@ void register_cp_regs_for_features(ARMCPU *cpu)
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}
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if (arm_feature(env, ARM_FEATURE_AUXCR)) {
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ARMCPRegInfo auxcr = {
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"ACTLR_EL1", 0,1,0, 3,0,1, ARM_CP_STATE_BOTH,
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ARM_CP_CONST, PL1_RW, 0, NULL, cpu->reset_auxcr
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ARMCPRegInfo auxcr_reginfo[] = {
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{ "ACTLR_EL1", 0,1,0, 3,0,1, ARM_CP_STATE_BOTH,
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ARM_CP_CONST, PL1_RW, 0, NULL, cpu->reset_auxcr },
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{ "ACTLR_EL2",0,1,0, 3,4,1, ARM_CP_STATE_BOTH, ARM_CP_CONST,
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PL2_RW, 0, NULL, 0 },
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{ "ACTLR_EL3", 0,1,0, 3,6,1, ARM_CP_STATE_AA64, ARM_CP_CONST,
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PL3_RW, 0, NULL, 0 },
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REGINFO_SENTINEL
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};
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define_one_arm_cp_reg(cpu, &auxcr);
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define_arm_cp_regs(cpu, auxcr_reginfo);
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}
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if (arm_feature(env, ARM_FEATURE_CBAR)) {
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