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target/arm: Implement fp16 for Neon VRINTX
Convert the Neon VRINTX insn to use gvec, and use this to implement fp16 support for it. Backports 23afcdd2511f2a3dc05bed650d27bd25cf9b2a3c
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@ -1850,6 +1850,8 @@
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#define helper_gvec_vcvt_rm_uh helper_gvec_vcvt_rm_uh_aarch64
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#define helper_gvec_vrint_rm_h helper_gvec_vrint_rm_h_aarch64
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#define helper_gvec_vrint_rm_s helper_gvec_vrint_rm_s_aarch64
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#define helper_gvec_vrintx_h helper_gvec_vrintx_h_aarch64
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#define helper_gvec_vrintx_s helper_gvec_vrintx_s_aarch64
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#define helper_power_down helper_power_down_aarch64
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#define helper_pre_hvc helper_pre_hvc_aarch64
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#define helper_pre_smc helper_pre_smc_aarch64
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@ -1850,6 +1850,8 @@
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#define helper_gvec_vcvt_rm_uh helper_gvec_vcvt_rm_uh_aarch64eb
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#define helper_gvec_vrint_rm_h helper_gvec_vrint_rm_h_aarch64eb
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#define helper_gvec_vrint_rm_s helper_gvec_vrint_rm_s_aarch64eb
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#define helper_gvec_vrintx_h helper_gvec_vrintx_h_aarch64eb
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#define helper_gvec_vrintx_s helper_gvec_vrintx_s_aarch64eb
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#define helper_power_down helper_power_down_aarch64eb
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#define helper_pre_hvc helper_pre_hvc_aarch64eb
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#define helper_pre_smc helper_pre_smc_aarch64eb
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@ -1850,6 +1850,8 @@
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#define helper_gvec_vcvt_rm_uh helper_gvec_vcvt_rm_uh_arm
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#define helper_gvec_vrint_rm_h helper_gvec_vrint_rm_h_arm
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#define helper_gvec_vrint_rm_s helper_gvec_vrint_rm_s_arm
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#define helper_gvec_vrintx_h helper_gvec_vrintx_h_arm
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#define helper_gvec_vrintx_s helper_gvec_vrintx_s_arm
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#define helper_power_down helper_power_down_arm
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#define helper_pre_hvc helper_pre_hvc_arm
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#define helper_pre_smc helper_pre_smc_arm
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@ -1850,6 +1850,8 @@
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#define helper_gvec_vcvt_rm_uh helper_gvec_vcvt_rm_uh_armeb
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#define helper_gvec_vrint_rm_h helper_gvec_vrint_rm_h_armeb
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#define helper_gvec_vrint_rm_s helper_gvec_vrint_rm_s_armeb
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#define helper_gvec_vrintx_h helper_gvec_vrintx_h_armeb
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#define helper_gvec_vrintx_s helper_gvec_vrintx_s_armeb
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#define helper_power_down helper_power_down_armeb
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#define helper_pre_hvc helper_pre_hvc_armeb
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#define helper_pre_smc helper_pre_smc_armeb
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@ -1856,6 +1856,8 @@ symbols = (
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'helper_gvec_vcvt_rm_uh',
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'helper_gvec_vrint_rm_h',
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'helper_gvec_vrint_rm_s',
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'helper_gvec_vrintx_h',
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'helper_gvec_vrintx_s',
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'helper_power_down',
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'helper_pre_hvc',
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'helper_pre_smc',
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@ -1850,6 +1850,8 @@
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#define helper_gvec_vcvt_rm_uh helper_gvec_vcvt_rm_uh_m68k
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#define helper_gvec_vrint_rm_h helper_gvec_vrint_rm_h_m68k
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#define helper_gvec_vrint_rm_s helper_gvec_vrint_rm_s_m68k
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#define helper_gvec_vrintx_h helper_gvec_vrintx_h_m68k
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#define helper_gvec_vrintx_s helper_gvec_vrintx_s_m68k
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#define helper_power_down helper_power_down_m68k
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#define helper_pre_hvc helper_pre_hvc_m68k
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#define helper_pre_smc helper_pre_smc_m68k
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@ -1850,6 +1850,8 @@
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#define helper_gvec_vcvt_rm_uh helper_gvec_vcvt_rm_uh_mips
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#define helper_gvec_vrint_rm_h helper_gvec_vrint_rm_h_mips
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#define helper_gvec_vrint_rm_s helper_gvec_vrint_rm_s_mips
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#define helper_gvec_vrintx_h helper_gvec_vrintx_h_mips
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#define helper_gvec_vrintx_s helper_gvec_vrintx_s_mips
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#define helper_power_down helper_power_down_mips
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#define helper_pre_hvc helper_pre_hvc_mips
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#define helper_pre_smc helper_pre_smc_mips
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@ -1850,6 +1850,8 @@
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#define helper_gvec_vcvt_rm_uh helper_gvec_vcvt_rm_uh_mips64
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#define helper_gvec_vrint_rm_h helper_gvec_vrint_rm_h_mips64
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#define helper_gvec_vrint_rm_s helper_gvec_vrint_rm_s_mips64
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#define helper_gvec_vrintx_h helper_gvec_vrintx_h_mips64
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#define helper_gvec_vrintx_s helper_gvec_vrintx_s_mips64
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#define helper_power_down helper_power_down_mips64
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#define helper_pre_hvc helper_pre_hvc_mips64
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#define helper_pre_smc helper_pre_smc_mips64
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@ -1850,6 +1850,8 @@
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#define helper_gvec_vcvt_rm_uh helper_gvec_vcvt_rm_uh_mips64el
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#define helper_gvec_vrint_rm_h helper_gvec_vrint_rm_h_mips64el
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#define helper_gvec_vrint_rm_s helper_gvec_vrint_rm_s_mips64el
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#define helper_gvec_vrintx_h helper_gvec_vrintx_h_mips64el
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#define helper_gvec_vrintx_s helper_gvec_vrintx_s_mips64el
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#define helper_power_down helper_power_down_mips64el
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#define helper_pre_hvc helper_pre_hvc_mips64el
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#define helper_pre_smc helper_pre_smc_mips64el
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@ -1850,6 +1850,8 @@
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#define helper_gvec_vcvt_rm_uh helper_gvec_vcvt_rm_uh_mipsel
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#define helper_gvec_vrint_rm_h helper_gvec_vrint_rm_h_mipsel
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#define helper_gvec_vrint_rm_s helper_gvec_vrint_rm_s_mipsel
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#define helper_gvec_vrintx_h helper_gvec_vrintx_h_mipsel
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#define helper_gvec_vrintx_s helper_gvec_vrintx_s_mipsel
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#define helper_power_down helper_power_down_mipsel
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#define helper_pre_hvc helper_pre_hvc_mipsel
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#define helper_pre_smc helper_pre_smc_mipsel
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@ -1850,6 +1850,8 @@
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#define helper_gvec_vcvt_rm_uh helper_gvec_vcvt_rm_uh_powerpc
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#define helper_gvec_vrint_rm_h helper_gvec_vrint_rm_h_powerpc
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#define helper_gvec_vrint_rm_s helper_gvec_vrint_rm_s_powerpc
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#define helper_gvec_vrintx_h helper_gvec_vrintx_h_powerpc
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#define helper_gvec_vrintx_s helper_gvec_vrintx_s_powerpc
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#define helper_power_down helper_power_down_powerpc
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#define helper_pre_hvc helper_pre_hvc_powerpc
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#define helper_pre_smc helper_pre_smc_powerpc
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@ -1850,6 +1850,8 @@
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#define helper_gvec_vcvt_rm_uh helper_gvec_vcvt_rm_uh_riscv32
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#define helper_gvec_vrint_rm_h helper_gvec_vrint_rm_h_riscv32
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#define helper_gvec_vrint_rm_s helper_gvec_vrint_rm_s_riscv32
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#define helper_gvec_vrintx_h helper_gvec_vrintx_h_riscv32
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#define helper_gvec_vrintx_s helper_gvec_vrintx_s_riscv32
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#define helper_power_down helper_power_down_riscv32
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#define helper_pre_hvc helper_pre_hvc_riscv32
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#define helper_pre_smc helper_pre_smc_riscv32
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@ -1850,6 +1850,8 @@
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#define helper_gvec_vcvt_rm_uh helper_gvec_vcvt_rm_uh_riscv64
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#define helper_gvec_vrint_rm_h helper_gvec_vrint_rm_h_riscv64
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#define helper_gvec_vrint_rm_s helper_gvec_vrint_rm_s_riscv64
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#define helper_gvec_vrintx_h helper_gvec_vrintx_h_riscv64
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#define helper_gvec_vrintx_s helper_gvec_vrintx_s_riscv64
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#define helper_power_down helper_power_down_riscv64
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#define helper_pre_hvc helper_pre_hvc_riscv64
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#define helper_pre_smc helper_pre_smc_riscv64
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@ -1850,6 +1850,8 @@
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#define helper_gvec_vcvt_rm_uh helper_gvec_vcvt_rm_uh_sparc
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#define helper_gvec_vrint_rm_h helper_gvec_vrint_rm_h_sparc
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#define helper_gvec_vrint_rm_s helper_gvec_vrint_rm_s_sparc
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#define helper_gvec_vrintx_h helper_gvec_vrintx_h_sparc
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#define helper_gvec_vrintx_s helper_gvec_vrintx_s_sparc
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#define helper_power_down helper_power_down_sparc
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#define helper_pre_hvc helper_pre_hvc_sparc
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#define helper_pre_smc helper_pre_smc_sparc
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@ -1850,6 +1850,8 @@
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#define helper_gvec_vcvt_rm_uh helper_gvec_vcvt_rm_uh_sparc64
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#define helper_gvec_vrint_rm_h helper_gvec_vrint_rm_h_sparc64
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#define helper_gvec_vrint_rm_s helper_gvec_vrint_rm_s_sparc64
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#define helper_gvec_vrintx_h helper_gvec_vrintx_h_sparc64
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#define helper_gvec_vrintx_s helper_gvec_vrintx_s_sparc64
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#define helper_power_down helper_power_down_sparc64
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#define helper_pre_hvc helper_pre_hvc_sparc64
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#define helper_pre_smc helper_pre_smc_sparc64
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@ -638,6 +638,9 @@ DEF_HELPER_FLAGS_4(gvec_vcvt_rm_uh, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
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DEF_HELPER_FLAGS_4(gvec_vrint_rm_h, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
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DEF_HELPER_FLAGS_4(gvec_vrint_rm_s, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
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DEF_HELPER_FLAGS_4(gvec_vrintx_h, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
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DEF_HELPER_FLAGS_4(gvec_vrintx_s, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
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DEF_HELPER_FLAGS_4(gvec_frecpe_h, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
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DEF_HELPER_FLAGS_4(gvec_frecpe_s, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
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DEF_HELPER_FLAGS_4(gvec_frecpe_d, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
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@ -3729,48 +3729,6 @@ static bool trans_VQNEG(DisasContext *s, arg_2misc *a)
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return do_2misc(s, a, fn[a->size]);
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}
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static bool do_2misc_fp(DisasContext *s, arg_2misc *a,
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NeonGenOneSingleOpFn *fn)
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{
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TCGContext *tcg_ctx = s->uc->tcg_ctx;
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int pass;
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TCGv_ptr fpst;
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/* Handle a 2-reg-misc operation by iterating 32 bits at a time */
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if (!arm_dc_feature(s, ARM_FEATURE_NEON)) {
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return false;
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}
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/* UNDEF accesses to D16-D31 if they don't exist. */
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if (!dc_isar_feature(aa32_simd_r32, s) &&
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((a->vd | a->vm) & 0x10)) {
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return false;
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}
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if (a->size != 2) {
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/* TODO: FP16 will be the size == 1 case */
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return false;
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}
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if ((a->vd | a->vm) & a->q) {
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return false;
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}
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if (!vfp_access_check(s)) {
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return true;
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}
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fpst = fpstatus_ptr(tcg_ctx, FPST_STD);
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for (pass = 0; pass < (a->q ? 4 : 2); pass++) {
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TCGv_i32 tmp = neon_load_reg(s, a->vm, pass);
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fn(tcg_ctx, tmp, tmp, fpst);
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neon_store_reg(s, a->vd, pass, tmp);
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}
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tcg_temp_free_ptr(tcg_ctx, fpst);
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return true;
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}
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#define DO_2MISC_FP_VEC(INSN, HFUNC, SFUNC) \
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static void gen_##INSN(TCGContext *s, unsigned vece, uint32_t rd_ofs, \
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uint32_t rm_ofs, \
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DO_2MISC_FP_VEC(VCVT_SF, gen_helper_gvec_tosszh, gen_helper_gvec_tosizs)
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DO_2MISC_FP_VEC(VCVT_UF, gen_helper_gvec_touszh, gen_helper_gvec_touizs)
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DO_2MISC_FP_VEC(VRINTX_impl, gen_helper_gvec_vrintx_h, gen_helper_gvec_vrintx_s)
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static bool trans_VRINTX(DisasContext *s, arg_2misc *a)
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{
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if (!arm_dc_feature(s, ARM_FEATURE_V8)) {
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return false;
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}
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return do_2misc_fp(s, a, gen_helper_rints_exact);
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return trans_VRINTX_impl(s, a);
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}
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#define DO_VEC_RMODE(INSN, RMODE, OP) \
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DO_2OP(gvec_frsqrte_s, helper_rsqrte_f32, float32)
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DO_2OP(gvec_frsqrte_d, helper_rsqrte_f64, float64)
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DO_2OP(gvec_vrintx_h, float16_round_to_int, float16)
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DO_2OP(gvec_vrintx_s, float32_round_to_int, float32)
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DO_2OP(gvec_sitos, helper_vfp_sitos, int32_t)
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DO_2OP(gvec_uitos, helper_vfp_uitos, uint32_t)
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DO_2OP(gvec_tosizs, helper_vfp_tosizs, float32)
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#define helper_gvec_vcvt_rm_uh helper_gvec_vcvt_rm_uh_x86_64
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#define helper_gvec_vrint_rm_h helper_gvec_vrint_rm_h_x86_64
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#define helper_gvec_vrint_rm_s helper_gvec_vrint_rm_s_x86_64
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#define helper_gvec_vrintx_h helper_gvec_vrintx_h_x86_64
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#define helper_gvec_vrintx_s helper_gvec_vrintx_s_x86_64
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#define helper_power_down helper_power_down_x86_64
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#define helper_pre_hvc helper_pre_hvc_x86_64
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#define helper_pre_smc helper_pre_smc_x86_64
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