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target/mips: Add a placeholder for R5900 MMI0 instruction subclass

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Add a placeholder for MMI0 subclass.

Backports commit 88eafe0b28c8e88ed6d38eb27dbf482f9c885745 from qemu
This commit is contained in:
Fredrik Noring 2018-11-10 11:50:46 -05:00 committed by Lioncash
parent e71d43fd8d
commit 685ccc52e7
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GPG key ID: 4E3C3CC1031BA9C7
1 changed files with 42 additions and 1 deletions
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43
qemu/target/mips/translate.c
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@ -24570,15 +24570,56 @@ static void decode_opc_special3_legacy(CPUMIPSState *env, DisasContext *ctx)
}
}
static void decode_tx79_mmi0(CPUMIPSState *env, DisasContext *ctx)
{
uint32_t opc = MASK_TX79_MMI0(ctx->opcode);
switch (opc) {
case TX79_MMI0_PADDW: /* TODO: TX79_MMI0_PADDW */
case TX79_MMI0_PSUBW: /* TODO: TX79_MMI0_PSUBW */
case TX79_MMI0_PCGTW: /* TODO: TX79_MMI0_PCGTW */
case TX79_MMI0_PMAXW: /* TODO: TX79_MMI0_PMAXW */
case TX79_MMI0_PADDH: /* TODO: TX79_MMI0_PADDH */
case TX79_MMI0_PSUBH: /* TODO: TX79_MMI0_PSUBH */
case TX79_MMI0_PCGTH: /* TODO: TX79_MMI0_PCGTH */
case TX79_MMI0_PMAXH: /* TODO: TX79_MMI0_PMAXH */
case TX79_MMI0_PADDB: /* TODO: TX79_MMI0_PADDB */
case TX79_MMI0_PSUBB: /* TODO: TX79_MMI0_PSUBB */
case TX79_MMI0_PCGTB: /* TODO: TX79_MMI0_PCGTB */
case TX79_MMI0_PADDSW: /* TODO: TX79_MMI0_PADDSW */
case TX79_MMI0_PSUBSW: /* TODO: TX79_MMI0_PSUBSW */
case TX79_MMI0_PEXTLW: /* TODO: TX79_MMI0_PEXTLW */
case TX79_MMI0_PPACW: /* TODO: TX79_MMI0_PPACW */
case TX79_MMI0_PADDSH: /* TODO: TX79_MMI0_PADDSH */
case TX79_MMI0_PSUBSH: /* TODO: TX79_MMI0_PSUBSH */
case TX79_MMI0_PEXTLH: /* TODO: TX79_MMI0_PEXTLH */
case TX79_MMI0_PPACH: /* TODO: TX79_MMI0_PPACH */
case TX79_MMI0_PADDSB: /* TODO: TX79_MMI0_PADDSB */
case TX79_MMI0_PSUBSB: /* TODO: TX79_MMI0_PSUBSB */
case TX79_MMI0_PEXTLB: /* TODO: TX79_MMI0_PEXTLB */
case TX79_MMI0_PPACB: /* TODO: TX79_MMI0_PPACB */
case TX79_MMI0_PEXT5: /* TODO: TX79_MMI0_PEXT5 */
case TX79_MMI0_PPAC5: /* TODO: TX79_MMI0_PPAC5 */
generate_exception_end(ctx, EXCP_RI); /* TODO: TX79_MMI_CLASS_MMI0 */
break;
default:
MIPS_INVAL("TX79 MMI class MMI0");
generate_exception_end(ctx, EXCP_RI);
break;
}
}
static void decode_tx79_mmi(CPUMIPSState *env, DisasContext *ctx)
{
uint32_t opc = MASK_TX79_MMI(ctx->opcode);
switch (opc) {
case TX79_MMI_CLASS_MMI0:
decode_tx79_mmi0(env, ctx);
break;
case TX79_MMI_MADD: /* TODO: TX79_MMI_MADD */
case TX79_MMI_MADDU: /* TODO: TX79_MMI_MADDU */
case TX79_MMI_PLZCW: /* TODO: TX79_MMI_PLZCW */
case TX79_MMI_CLASS_MMI0: /* TODO: TX79_MMI_CLASS_MMI0 */
case TX79_MMI_CLASS_MMI2: /* TODO: TX79_MMI_CLASS_MMI2 */
case TX79_MMI_MFHI1: /* TODO: TX79_MMI_MFHI1 */
case TX79_MMI_MTHI1: /* TODO: TX79_MMI_MTHI1 */