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target/mips: Add emulation of nanoMIPS instructions MOVE.P and MOVE.PREV

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Add emulation of nanoMIPS instructions MOVE.P and MOVE.PREV.

Backports commit 4d18232ca0f903df099d243ccfe28b0e545dc92d from qemu
This commit is contained in:
Yongbok Kim 2018-08-27 04:50:29 -04:00 committed by Lioncash
parent 48d61aee0b
commit 6c31da99e3
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GPG key ID: 4E3C3CC1031BA9C7
1 changed files with 32 additions and 0 deletions
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32
qemu/target/mips/translate.c
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@ -17553,6 +17553,38 @@ static int decode_nanomips_opc(CPUMIPSState *env, DisasContext *ctx)
case NM_MOVEP:
break;
case NM_MOVEPREV:
{
static const int gpr2reg1[] = {4, 5, 6, 7};
static const int gpr2reg2[] = {5, 6, 7, 8};
int re;
int rd2 = extract32(ctx->opcode, 3, 1) << 1 |
extract32(ctx->opcode, 8, 1);
int r1 = gpr2reg1[rd2];
int r2 = gpr2reg2[rd2];
int r3 = extract32(ctx->opcode, 4, 1) << 3 |
extract32(ctx->opcode, 0, 3);
int r4 = extract32(ctx->opcode, 9, 1) << 3 |
extract32(ctx->opcode, 5, 3);
TCGv t0 = tcg_temp_new(tcg_ctx);
TCGv t1 = tcg_temp_new(tcg_ctx);
if (op == NM_MOVEP) {
rd = r1;
re = r2;
rs = decode_gpr_gpr4_zero(r3);
rt = decode_gpr_gpr4_zero(r4);
} else {
rd = decode_gpr_gpr4(r3);
re = decode_gpr_gpr4(r4);
rs = r1;
rt = r2;
}
gen_load_gpr(ctx, t0, rs);
gen_load_gpr(ctx, t1, rt);
tcg_gen_mov_tl(tcg_ctx, tcg_ctx->cpu_gpr[rd], t0);
tcg_gen_mov_tl(tcg_ctx, tcg_ctx->cpu_gpr[re], t1);
tcg_temp_free(tcg_ctx, t0);
tcg_temp_free(tcg_ctx, t1);
}
break;
default:
return decode_nanomips_32_48_opc(env, ctx);