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target-i386: Enable CR4/XCR0 features for user-mode

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Backports commit a114d25d5b42600871d75929604c0b9fcc448ec0 from qemu
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Richard Henderson 2018-02-20 14:37:30 -05:00 committed by Lioncash
parent 86cc5862a1
commit 6ca787fb48
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GPG key ID: 4E3C3CC1031BA9C7
1 changed files with 22 additions and 2 deletions
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24
qemu/target-i386/cpu.c
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@ -2579,6 +2579,8 @@ static void x86_cpu_reset(CPUState *s)
X86CPUClass *xcc = X86_CPU_GET_CLASS(s->uc, cpu); X86CPUClass *xcc = X86_CPU_GET_CLASS(s->uc, cpu);
CPUX86State *env = &cpu->env; CPUX86State *env = &cpu->env;
int i; int i;
target_ulong cr4;
uint64_t xcr0;
xcc->parent_reset(s); xcc->parent_reset(s);
@ -2637,7 +2639,8 @@ static void x86_cpu_reset(CPUState *s)
cpu_set_fpuc(env, 0x37f); cpu_set_fpuc(env, 0x37f);
env->mxcsr = 0x1f80; env->mxcsr = 0x1f80;
env->xstate_bv = XSTATE_FP | XSTATE_SSE; /* All units are in INIT state. */
env->xstate_bv = 0;
env->pat = 0x0007040600070406ULL; env->pat = 0x0007040600070406ULL;
env->msr_ia32_misc_enable = MSR_IA32_MISC_ENABLE_DEFAULT; env->msr_ia32_misc_enable = MSR_IA32_MISC_ENABLE_DEFAULT;
@ -2648,7 +2651,24 @@ static void x86_cpu_reset(CPUState *s)
cpu_breakpoint_remove_all(s, BP_CPU); cpu_breakpoint_remove_all(s, BP_CPU);
cpu_watchpoint_remove_all(s, BP_CPU); cpu_watchpoint_remove_all(s, BP_CPU);
env->xcr0 = 1; cr4 = 0;
xcr0 = XSTATE_FP;
#ifdef CONFIG_USER_ONLY
/* Enable all the features for user-mode. */
if (env->features[FEAT_1_EDX] & CPUID_SSE) {
xcr0 |= XSTATE_SSE;
}
if (env->features[FEAT_7_0_EBX] & CPUID_7_0_EBX_MPX) {
xcr0 |= XSTATE_BNDREGS | XSTATE_BNDCSR;
}
if (env->features[FEAT_1_ECX] & CPUID_EXT_XSAVE) {
cr4 |= CR4_OSFXSR_MASK | CR4_OSXSAVE_MASK;
}
#endif
env->xcr0 = xcr0;
cpu_x86_update_cr4(env, cr4);
/* /*
* SDM 11.11.5 requires: * SDM 11.11.5 requires: