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tcg: Make sparc_cpu_pc a TCGv
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parent
e5a776b495
commit
6ccd4479d7
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@ -307,12 +307,12 @@ static inline void gen_goto_tb(DisasContext *s, int tb_num,
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!s->singlestep) {
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/* jump to same page: we can use a direct jump */
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tcg_gen_goto_tb(tcg_ctx, tb_num);
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tcg_gen_movi_tl(tcg_ctx, *(TCGv *)tcg_ctx->sparc_cpu_pc, pc);
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tcg_gen_movi_tl(tcg_ctx, tcg_ctx->sparc_cpu_pc, pc);
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tcg_gen_movi_tl(tcg_ctx, *(TCGv *)tcg_ctx->cpu_npc, npc);
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tcg_gen_exit_tb(tcg_ctx, (uintptr_t)tb + tb_num);
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} else {
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/* jump to another page: currently not optimized */
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tcg_gen_movi_tl(tcg_ctx, *(TCGv *)tcg_ctx->sparc_cpu_pc, pc);
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tcg_gen_movi_tl(tcg_ctx, tcg_ctx->sparc_cpu_pc, pc);
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tcg_gen_movi_tl(tcg_ctx, *(TCGv *)tcg_ctx->cpu_npc, npc);
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tcg_gen_exit_tb(tcg_ctx, 0);
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}
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@ -1043,7 +1043,7 @@ static void gen_branch_n(DisasContext *dc, target_ulong pc1)
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} else {
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TCGv t, z;
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tcg_gen_mov_tl(tcg_ctx, *(TCGv *)tcg_ctx->sparc_cpu_pc, *(TCGv *)tcg_ctx->cpu_npc);
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tcg_gen_mov_tl(tcg_ctx, tcg_ctx->sparc_cpu_pc, *(TCGv *)tcg_ctx->cpu_npc);
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tcg_gen_addi_tl(tcg_ctx, *(TCGv *)tcg_ctx->cpu_npc, *(TCGv *)tcg_ctx->cpu_npc, 4);
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t = tcg_const_tl(tcg_ctx, pc1);
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@ -1104,7 +1104,7 @@ static inline void update_psr(DisasContext *dc)
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static inline void save_state(DisasContext *dc)
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{
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TCGContext *tcg_ctx = dc->uc->tcg_ctx;
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tcg_gen_movi_tl(tcg_ctx, *(TCGv *)tcg_ctx->sparc_cpu_pc, dc->pc);
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tcg_gen_movi_tl(tcg_ctx, tcg_ctx->sparc_cpu_pc, dc->pc);
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save_npc(dc);
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}
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@ -1113,10 +1113,10 @@ static inline void gen_mov_pc_npc(DisasContext *dc)
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TCGContext *tcg_ctx = dc->uc->tcg_ctx;
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if (dc->npc == JUMP_PC) {
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gen_generic_branch(dc);
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tcg_gen_mov_tl(tcg_ctx, *(TCGv *)tcg_ctx->sparc_cpu_pc, *(TCGv *)tcg_ctx->cpu_npc);
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tcg_gen_mov_tl(tcg_ctx, tcg_ctx->sparc_cpu_pc, *(TCGv *)tcg_ctx->cpu_npc);
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dc->pc = DYNAMIC_PC;
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} else if (dc->npc == DYNAMIC_PC) {
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tcg_gen_mov_tl(tcg_ctx, *(TCGv *)tcg_ctx->sparc_cpu_pc, *(TCGv *)tcg_ctx->cpu_npc);
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tcg_gen_mov_tl(tcg_ctx, tcg_ctx->sparc_cpu_pc, *(TCGv *)tcg_ctx->cpu_npc);
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dc->pc = DYNAMIC_PC;
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} else {
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dc->pc = dc->npc;
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@ -1126,7 +1126,7 @@ static inline void gen_mov_pc_npc(DisasContext *dc)
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static inline void gen_op_next_insn(DisasContext *dc)
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{
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TCGContext *tcg_ctx = dc->uc->tcg_ctx;
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tcg_gen_mov_tl(tcg_ctx, *(TCGv *)tcg_ctx->sparc_cpu_pc, *(TCGv *)tcg_ctx->cpu_npc);
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tcg_gen_mov_tl(tcg_ctx, tcg_ctx->sparc_cpu_pc, *(TCGv *)tcg_ctx->cpu_npc);
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tcg_gen_addi_tl(tcg_ctx, *(TCGv *)tcg_ctx->cpu_npc, *(TCGv *)tcg_ctx->cpu_npc, 4);
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}
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@ -1492,7 +1492,7 @@ static void do_branch(DisasContext *dc, int32_t offset, uint32_t insn, int cc)
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} else {
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dc->pc = dc->npc;
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dc->npc = target;
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tcg_gen_mov_tl(tcg_ctx, *(TCGv *)tcg_ctx->sparc_cpu_pc, *(TCGv *)tcg_ctx->cpu_npc);
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tcg_gen_mov_tl(tcg_ctx, tcg_ctx->sparc_cpu_pc, *(TCGv *)tcg_ctx->cpu_npc);
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}
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} else {
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flush_cond(dc);
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@ -1533,7 +1533,7 @@ static void do_fbranch(DisasContext *dc, int32_t offset, uint32_t insn, int cc)
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} else {
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dc->pc = dc->npc;
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dc->npc = target;
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tcg_gen_mov_tl(tcg_ctx, *(TCGv *)tcg_ctx->sparc_cpu_pc, *(TCGv *)tcg_ctx->cpu_npc);
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tcg_gen_mov_tl(tcg_ctx, tcg_ctx->sparc_cpu_pc, *(TCGv *)tcg_ctx->cpu_npc);
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}
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} else {
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flush_cond(dc);
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@ -5483,7 +5483,7 @@ void gen_intermediate_code(CPUSPARCState * env, TranslationBlock * tb)
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gen_goto_tb(dc, 0, dc->pc, dc->npc);
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} else {
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if (dc->pc != DYNAMIC_PC) {
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tcg_gen_movi_tl(tcg_ctx, *(TCGv *)tcg_ctx->sparc_cpu_pc, dc->pc);
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tcg_gen_movi_tl(tcg_ctx, tcg_ctx->sparc_cpu_pc, dc->pc);
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}
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save_npc(dc);
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tcg_gen_exit_tb(tcg_ctx, 0);
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@ -5603,8 +5603,7 @@ void gen_intermediate_code_init(CPUSPARCState *env)
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tcg_ctx->cpu_fsr = tcg_global_mem_new(tcg_ctx, tcg_ctx->cpu_env, offsetof(CPUSPARCState, fsr),
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"fsr");
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tcg_ctx->sparc_cpu_pc = g_malloc0(sizeof(TCGv));
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*(TCGv *)tcg_ctx->sparc_cpu_pc = tcg_global_mem_new(tcg_ctx, tcg_ctx->cpu_env, offsetof(CPUSPARCState, pc),
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tcg_ctx->sparc_cpu_pc = tcg_global_mem_new(tcg_ctx, tcg_ctx->cpu_env, offsetof(CPUSPARCState, pc),
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"pc");
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tcg_ctx->cpu_npc = g_malloc0(sizeof(TCGv));
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@ -38,7 +38,6 @@ void sparc_release(void *ctx)
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g_free(tcg_ctx->cpu_cc_src);
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g_free(tcg_ctx->cpu_cc_src2);
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g_free(tcg_ctx->cpu_cc_dst);
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g_free(tcg_ctx->sparc_cpu_pc);
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g_free(tcg_ctx->cpu_npc);
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for (i = 0; i < 32; i++) {
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@ -833,7 +833,7 @@ struct TCGContext {
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TCGv_i64 cpu_fpr[32]; // TARGET_DPREGS = 32 for Sparc64, 16 for Sparc
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TCGv cpu_fsr;
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void *sparc_cpu_pc;
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TCGv sparc_cpu_pc;
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void *cpu_npc;
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void *cpu_regs_sparc[32];
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TCGv cpu_y;
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