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target-mips: Copy restrictions from ext/ins to dext/dins
The checks in dins is required to avoid triggering an assertion in tcg_gen_deposit_tl. The check in dext is just for completeness. Fold the other D cases in via fallthru. Backports commit b7f26e523914b982a1c1bfa8295f77ff9787c33c from qemu
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@ -4731,48 +4731,53 @@ static void gen_bitops (DisasContext *ctx, uint32_t opc, int rt,
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gen_load_gpr(ctx, t1, rs);
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switch (opc) {
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case OPC_EXT:
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if (lsb + msb > 31)
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if (lsb + msb > 31) {
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goto fail;
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}
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tcg_gen_shri_tl(tcg_ctx, t0, t1, lsb);
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if (msb != 31) {
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tcg_gen_andi_tl(tcg_ctx, t0, t0, (1 << (msb + 1)) - 1);
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tcg_gen_andi_tl(tcg_ctx, t0, t0, (1U << (msb + 1)) - 1);
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} else {
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tcg_gen_ext32s_tl(tcg_ctx, t0, t0);
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}
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break;
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#if defined(TARGET_MIPS64)
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case OPC_DEXTM:
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tcg_gen_shri_tl(tcg_ctx, t0, t1, lsb);
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if (msb != 31) {
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tcg_gen_andi_tl(tcg_ctx, t0, t0, (1ULL << (msb + 1 + 32)) - 1);
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}
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break;
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case OPC_DEXTU:
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tcg_gen_shri_tl(tcg_ctx, t0, t1, lsb + 32);
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tcg_gen_andi_tl(tcg_ctx, t0, t0, (1ULL << (msb + 1)) - 1);
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break;
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lsb += 32;
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goto do_dext;
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case OPC_DEXTM:
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msb += 32;
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goto do_dext;
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case OPC_DEXT:
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do_dext:
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if (lsb + msb > 63) {
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goto fail;
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}
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tcg_gen_shri_tl(tcg_ctx, t0, t1, lsb);
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tcg_gen_andi_tl(tcg_ctx, t0, t0, (1ULL << (msb + 1)) - 1);
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if (msb != 63) {
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tcg_gen_andi_tl(tcg_ctx, t0, t0, (1ULL << (msb + 1)) - 1);
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}
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break;
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#endif
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case OPC_INS:
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if (lsb > msb)
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if (lsb > msb) {
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goto fail;
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}
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gen_load_gpr(ctx, t0, rt);
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tcg_gen_deposit_tl(tcg_ctx, t0, t0, t1, lsb, msb - lsb + 1);
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tcg_gen_ext32s_tl(tcg_ctx, t0, t0);
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break;
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#if defined(TARGET_MIPS64)
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case OPC_DINSM:
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gen_load_gpr(ctx, t0, rt);
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tcg_gen_deposit_tl(tcg_ctx, t0, t0, t1, lsb, msb + 32 - lsb + 1);
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break;
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case OPC_DINSU:
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gen_load_gpr(ctx, t0, rt);
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tcg_gen_deposit_tl(tcg_ctx, t0, t0, t1, lsb + 32, msb - lsb + 1);
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break;
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lsb += 32;
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/* FALLTHRU */
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case OPC_DINSM:
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msb += 32;
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/* FALLTHRU */
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case OPC_DINS:
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if (lsb > msb) {
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goto fail;
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}
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gen_load_gpr(ctx, t0, rt);
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tcg_gen_deposit_tl(tcg_ctx, t0, t0, t1, lsb, msb - lsb + 1);
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break;
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