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https://github.com/yuzu-emu/unicorn.git
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target/sparc: convert to DisasContextBase
Notes: - pc and npc are left unmodified, since they can point to out-of-TB jump targets. - Got rid of last_pc in gen_intermediate_code(), using base.pc_next instead. Only update pc_next (1) on a breakpoint (so that tb->size includes the insn), and (2) after reading the current instruction from memory. This allows us to use base.pc_next in the BP check, which is what the translator loop does. Backports commit af00be490b30d7f576d12ac7b2bc5406ca6fda3f from qemu
This commit is contained in:
Emilio G. Cota
Lioncash
parent
3180dcaa98
commit
7071a144c2
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@ -38,14 +38,13 @@
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typedef struct DisasContext {
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DisasContextBase base;
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target_ulong pc; /* current Program Counter: integer or DYNAMIC_PC */
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target_ulong npc; /* next PC: integer or DYNAMIC_PC or JUMP_PC */
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target_ulong jump_pc[2]; /* used when JUMP_PC pc value is used */
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DisasJumpType is_jmp;
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int mem_idx;
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bool fpu_enabled;
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bool address_mask_32bit;
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bool singlestep;
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#ifndef CONFIG_USER_ONLY
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bool supervisor;
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#ifdef TARGET_SPARC64
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@ -53,7 +52,6 @@ typedef struct DisasContext {
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#endif
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#endif
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uint32_t cc_op; /* current CC operation */
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struct TranslationBlock *tb;
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sparc_def_t *def;
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TCGv_i32 t32[3];
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TCGv ttl[5];
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@ -339,13 +337,13 @@ static inline TCGv gen_dest_gpr(DisasContext *dc, int reg)
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static inline bool use_goto_tb(DisasContext *s, target_ulong pc,
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target_ulong npc)
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{
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if (unlikely(s->singlestep)) {
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if (unlikely(s->base.singlestep_enabled)) {
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return false;
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}
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#ifndef CONFIG_USER_ONLY
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return (pc & TARGET_PAGE_MASK) == (s->tb->pc & TARGET_PAGE_MASK) &&
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(npc & TARGET_PAGE_MASK) == (s->tb->pc & TARGET_PAGE_MASK);
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return (pc & TARGET_PAGE_MASK) == (s->base.tb->pc & TARGET_PAGE_MASK) &&
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(npc & TARGET_PAGE_MASK) == (s->base.tb->pc & TARGET_PAGE_MASK);
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#else
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return true;
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#endif
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@ -361,7 +359,7 @@ static inline void gen_goto_tb(DisasContext *s, int tb_num,
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tcg_gen_goto_tb(tcg_ctx, tb_num);
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tcg_gen_movi_tl(tcg_ctx, tcg_ctx->sparc_cpu_pc, pc);
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tcg_gen_movi_tl(tcg_ctx, tcg_ctx->cpu_npc, npc);
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tcg_gen_exit_tb(tcg_ctx, (uintptr_t)s->tb + tb_num);
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tcg_gen_exit_tb(tcg_ctx, (uintptr_t)s->base.tb + tb_num);
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} else {
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/* jump to another page: currently not optimized */
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tcg_gen_movi_tl(tcg_ctx, tcg_ctx->sparc_cpu_pc, pc);
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@ -1071,7 +1069,7 @@ static void gen_branch_a(DisasContext *dc, target_ulong pc1)
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gen_set_label(tcg_ctx, l1);
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gen_goto_tb(dc, 1, npc + 4, npc + 8);
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dc->is_jmp = DISAS_NORETURN;
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dc->base.is_jmp = DISAS_NORETURN;
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}
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static void gen_branch_n(DisasContext *dc, target_ulong pc1)
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@ -1161,7 +1159,7 @@ static void gen_exception(DisasContext *dc, int which)
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t = tcg_const_i32(tcg_ctx, which);
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gen_helper_raise_exception(tcg_ctx, tcg_ctx->cpu_env, t);
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tcg_temp_free_i32(tcg_ctx, t);
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dc->is_jmp = DISAS_NORETURN;
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dc->base.is_jmp = DISAS_NORETURN;
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}
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static void gen_check_align(DisasContext *dc, TCGv addr, int mask)
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@ -3533,7 +3531,7 @@ static void disas_sparc_insn(DisasContext * dc, unsigned int insn, bool hook_ins
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if (cond == 8) {
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/* An unconditional trap ends the TB. */
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dc->is_jmp = DISAS_NORETURN;
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dc->base.is_jmp = DISAS_NORETURN;
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goto jmp_insn;
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} else {
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/* A conditional trap falls through to the next insn. */
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@ -4513,7 +4511,7 @@ static void disas_sparc_insn(DisasContext * dc, unsigned int insn, bool hook_ins
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save_state(dc);
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gen_op_next_insn(dc);
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tcg_gen_exit_tb(tcg_ctx, 0);
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dc->is_jmp = DISAS_NORETURN;
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dc->base.is_jmp = DISAS_NORETURN;
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break;
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case 0x6: /* V9 wrfprs */
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tcg_gen_xor_tl(tcg_ctx, cpu_tmp0, cpu_src1, cpu_src2);
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@ -4522,7 +4520,7 @@ static void disas_sparc_insn(DisasContext * dc, unsigned int insn, bool hook_ins
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save_state(dc);
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gen_op_next_insn(dc);
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tcg_gen_exit_tb(tcg_ctx, 0);
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dc->is_jmp = DISAS_NORETURN;
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dc->base.is_jmp = DISAS_NORETURN;
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break;
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case 0xf: /* V9 sir, nop if user */
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#if !defined(CONFIG_USER_ONLY)
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@ -4650,7 +4648,7 @@ static void disas_sparc_insn(DisasContext * dc, unsigned int insn, bool hook_ins
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save_state(dc);
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gen_op_next_insn(dc);
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tcg_gen_exit_tb(tcg_ctx, 0);
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dc->is_jmp = DISAS_NORETURN;
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dc->base.is_jmp = DISAS_NORETURN;
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#endif
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}
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break;
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@ -4806,7 +4804,7 @@ static void disas_sparc_insn(DisasContext * dc, unsigned int insn, bool hook_ins
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save_state(dc);
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gen_op_next_insn(dc);
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tcg_gen_exit_tb(tcg_ctx, 0);
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dc->is_jmp = DISAS_NORETURN;
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dc->base.is_jmp = DISAS_NORETURN;
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break;
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case 1: // htstate
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// XXX gen_op_wrhtstate();
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@ -5875,7 +5873,7 @@ static void disas_sparc_insn(DisasContext * dc, unsigned int insn, bool hook_ins
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} else if (dc->npc == JUMP_PC) {
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/* we can do a static jump */
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gen_branch2(dc, dc->jump_pc[0], dc->jump_pc[1], tcg_ctx->cpu_cond);
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dc->is_jmp = DISAS_NORETURN;
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dc->base.is_jmp = DISAS_NORETURN;
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} else {
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dc->pc = dc->npc;
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dc->npc = dc->npc + 4;
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@ -5926,28 +5924,28 @@ static void disas_sparc_insn(DisasContext * dc, unsigned int insn, bool hook_ins
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void gen_intermediate_code(CPUState *cs, TranslationBlock * tb)
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{
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CPUSPARCState *env = cs->env_ptr;
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target_ulong pc_start, last_pc;
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DisasContext dc1, *dc = &dc1;
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int num_insns = 0;
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int max_insns;
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unsigned int insn;
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TCGContext *tcg_ctx = env->uc->tcg_ctx;
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bool block_full = false;
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memset(dc, 0, sizeof(DisasContext));
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dc->base.tb = tb;
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dc->base.pc_first = tb->pc;
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dc->base.pc_next = tb->pc;
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dc->base.is_jmp = DISAS_NEXT;
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dc->base.num_insns = 0;
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dc->base.singlestep_enabled = cs->singlestep_enabled;
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dc->uc = env->uc;
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dc->tb = tb;
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pc_start = tb->pc;
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dc->pc = pc_start;
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last_pc = dc->pc;
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dc->is_jmp = DISAS_NEXT;
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dc->pc = dc->base.pc_first;
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dc->npc = (target_ulong) tb->cs_base;
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dc->cc_op = CC_OP_DYNAMIC;
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dc->mem_idx = tb->flags & TB_FLAG_MMU_MASK;
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dc->def = &env->def;
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dc->fpu_enabled = tb_fpu_enabled(tb->flags);
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dc->address_mask_32bit = tb_am_enabled(tb->flags);
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dc->singlestep = (cs->singlestep_enabled); // || singlestep);
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#ifndef CONFIG_USER_ONLY
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dc->supervisor = (tb->flags & TB_FLAG_SUPER) != 0;
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#endif
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@ -5960,7 +5958,7 @@ void gen_intermediate_code(CPUState *cs, TranslationBlock * tb)
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#endif
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// early check to see if the address of this block is the until address
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if (pc_start == env->uc->addr_end) {
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if (dc->base.pc_first == env->uc->addr_end) {
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gen_tb_start(tcg_ctx, tb);
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gen_helper_power_down(tcg_ctx, tcg_ctx->cpu_env);
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goto done_generating;
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@ -5973,6 +5971,9 @@ void gen_intermediate_code(CPUState *cs, TranslationBlock * tb)
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if (max_insns > TCG_MAX_INSNS) {
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max_insns = TCG_MAX_INSNS;
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}
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if (dc->base.singlestep_enabled) {
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max_insns = 1;
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}
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// Unicorn: early check to see if the address of this block is the until address
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if (tb->pc == env->uc->addr_end) {
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@ -6003,20 +6004,20 @@ void gen_intermediate_code(CPUState *cs, TranslationBlock * tb)
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} else {
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tcg_gen_insn_start(tcg_ctx, dc->pc, dc->npc);
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}
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num_insns++;
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last_pc = dc->pc;
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dc->base.num_insns++;
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if (unlikely(cpu_breakpoint_test(cs, dc->pc, BP_ANY))) {
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if (dc->pc != pc_start) {
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if (unlikely(cpu_breakpoint_test(cs, dc->base.pc_next, BP_ANY))) {
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if (dc->pc != dc->base.pc_first) {
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save_state(dc);
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}
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gen_helper_debug(tcg_ctx, tcg_ctx->cpu_env);
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tcg_gen_exit_tb(tcg_ctx, 0);
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dc->is_jmp = DISAS_NORETURN;
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dc->base.is_jmp = DISAS_NORETURN;
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dc->base.pc_next += 4;
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goto exit_gen_loop;
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}
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//if (num_insns == max_insns && (tb->cflags & CF_LAST_IO)) {
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//if (dc->base.num_insns == max_insns && (tb_cflags(tb) & CF_LAST_IO)) {
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// gen_io_start();
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//}
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@ -6027,39 +6028,35 @@ void gen_intermediate_code(CPUState *cs, TranslationBlock * tb)
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break;
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} else {
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insn = cpu_ldl_code(env, dc->pc);
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dc->base.pc_next += 4;
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}
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disas_sparc_insn(dc, insn, true);
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if (dc->is_jmp == DISAS_NORETURN) {
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if (dc->base.is_jmp == DISAS_NORETURN) {
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break;
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}
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/* if the next PC is different, we abort now */
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if (dc->pc != (last_pc + 4))
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if (dc->pc != dc->base.pc_next) {
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break;
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}
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/* if we reach a page boundary, we stop generation so that the
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PC of a TT_TFAULT exception is always in the right page */
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if ((dc->pc & (TARGET_PAGE_SIZE - 1)) == 0)
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break;
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/* if single step mode, we generate only one instruction and
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generate an exception */
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if (dc->singlestep) {
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break;
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}
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} while (!tcg_op_buf_full(tcg_ctx) &&
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(dc->pc - pc_start) < (TARGET_PAGE_SIZE - 32) &&
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num_insns < max_insns);
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(dc->pc - dc->base.pc_first) < (TARGET_PAGE_SIZE - 32) &&
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dc->base.num_insns < max_insns);
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/* if too long translation, save this info */
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if (tcg_op_buf_full(tcg_ctx) || num_insns >= max_insns)
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if (tcg_op_buf_full(tcg_ctx) || dc->base.num_insns >= max_insns)
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block_full = true;
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exit_gen_loop:
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//if (tb->cflags & CF_LAST_IO) {
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// gen_io_end();
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//}
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if (dc->is_jmp != DISAS_NORETURN) {
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if (dc->base.is_jmp != DISAS_NORETURN) {
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if (dc->pc != DYNAMIC_PC &&
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(dc->npc != DYNAMIC_PC && dc->npc != JUMP_PC)) {
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/* static PC and NPC: we can use direct chaining */
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@ -6074,10 +6071,10 @@ void gen_intermediate_code(CPUState *cs, TranslationBlock * tb)
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}
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done_generating:
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gen_tb_end(tcg_ctx, tb, num_insns);
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gen_tb_end(tcg_ctx, tb, dc->base.num_insns);
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tb->size = last_pc + 4 - pc_start;
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tb->icount = num_insns;
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tb->size = dc->base.pc_next - dc->base.pc_first;
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tb->icount = dc->base.num_insns;
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env->uc->block_full = block_full;
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}
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