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tcg: Make cpu_A0 a TCGv

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Commit 5d4e1a1081d3f1ec2908ff0eaebe312389971ab4 allows us to make the type concrete.
This commit is contained in:
Lioncash 2018-02-20 23:43:52 -05:00
parent ccbf1ed6ed
commit 72170ae5c0
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GPG key ID: 4E3C3CC1031BA9C7
3 changed files with 3 additions and 6 deletions
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6
qemu/target-i386/translate.c
View file

@ -4884,7 +4884,7 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
TCGv_i32 cpu_tmp2_i32 = tcg_ctx->cpu_tmp2_i32; TCGv_i32 cpu_tmp2_i32 = tcg_ctx->cpu_tmp2_i32;
TCGv_i32 cpu_tmp3_i32 = tcg_ctx->cpu_tmp3_i32; TCGv_i32 cpu_tmp3_i32 = tcg_ctx->cpu_tmp3_i32;
TCGv_i64 cpu_tmp1_i64 = tcg_ctx->cpu_tmp1_i64; TCGv_i64 cpu_tmp1_i64 = tcg_ctx->cpu_tmp1_i64;
TCGv cpu_A0 = *(TCGv *)tcg_ctx->cpu_A0; TCGv cpu_A0 = tcg_ctx->cpu_A0;
TCGv cpu_cc_dst = *(TCGv *)tcg_ctx->cpu_cc_dst; TCGv cpu_cc_dst = *(TCGv *)tcg_ctx->cpu_cc_dst;
TCGv cpu_cc_src = *(TCGv *)tcg_ctx->cpu_cc_src; TCGv cpu_cc_src = *(TCGv *)tcg_ctx->cpu_cc_src;
TCGv cpu_cc_srcT = *(TCGv *)tcg_ctx->cpu_cc_srcT; TCGv cpu_cc_srcT = *(TCGv *)tcg_ctx->cpu_cc_srcT;
@ -8947,9 +8947,7 @@ void gen_intermediate_code(CPUX86State *env, TranslationBlock *tb)
tcg_ctx->cpu_T1 = g_malloc0(sizeof(TCGv)); tcg_ctx->cpu_T1 = g_malloc0(sizeof(TCGv));
*((TCGv *)tcg_ctx->cpu_T1) = tcg_temp_new(tcg_ctx); *((TCGv *)tcg_ctx->cpu_T1) = tcg_temp_new(tcg_ctx);
if (!env->uc->init_tcg) tcg_ctx->cpu_A0 = tcg_temp_new(tcg_ctx);
tcg_ctx->cpu_A0 = g_malloc0(sizeof(TCGv));
*((TCGv *)tcg_ctx->cpu_A0) = tcg_temp_new(tcg_ctx);
if (!env->uc->init_tcg) if (!env->uc->init_tcg)
tcg_ctx->cpu_tmp0 = g_malloc0(sizeof(TCGv)); tcg_ctx->cpu_tmp0 = g_malloc0(sizeof(TCGv));

1
qemu/target-i386/unicorn.c
View file

@ -37,7 +37,6 @@ void x86_release(void *ctx)
release_common(ctx); release_common(ctx);
// arch specific // arch specific
g_free(s->cpu_A0);
g_free(s->cpu_T0); g_free(s->cpu_T0);
g_free(s->cpu_T1); g_free(s->cpu_T1);
g_free(s->cpu_tmp0); g_free(s->cpu_tmp0);

2
qemu/tcg/tcg.h
View file

@ -736,7 +736,7 @@ struct TCGContext {
int x86_64_hregs; // qemu/target-i386/translate.c int x86_64_hregs; // qemu/target-i386/translate.c
/* qemu/target-i386/translate.c: global TCGv vars */ /* qemu/target-i386/translate.c: global TCGv vars */
void *cpu_A0; TCGv cpu_A0;
void *cpu_cc_dst, *cpu_cc_src, *cpu_cc_src2, *cpu_cc_srcT; void *cpu_cc_dst, *cpu_cc_src, *cpu_cc_src2, *cpu_cc_srcT;
/* qemu/target-i386/translate.c: local temps */ /* qemu/target-i386/translate.c: local temps */