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target-m68k: Optimize some comparisons

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Backports commit 9d896621c1820fd8f437fac26fd7d2e0921091c3 from qemu
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Richard Henderson 2018-02-27 10:13:43 -05:00 committed by Lioncash
parent 672a28173f
commit 7403e63f2f
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GPG key ID: 4E3C3CC1031BA9C7
1 changed files with 102 additions and 6 deletions
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108
qemu/target-m68k/translate.c
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@ -763,10 +763,43 @@ static void gen_cc_cond(DisasCompare *c, DisasContext *s, int cond)
TCGContext *tcg_ctx = s->uc->tcg_ctx; TCGContext *tcg_ctx = s->uc->tcg_ctx;
TCGv tmp, tmp2; TCGv tmp, tmp2;
TCGCond tcond; TCGCond tcond;
CCOp op = s->cc_op;
/* TODO: Optimize compare/branch pairs rather than always flushing /* The CC_OP_CMP form can handle most normal comparisons directly. */
flag state to CC_OP_FLAGS. */ if (op == CC_OP_CMP) {
gen_flush_flags(s); c->g1 = c->g2 = 1;
c->v1 = tcg_ctx->QREG_CC_N;
c->v2 = tcg_ctx->QREG_CC_V;
switch (cond) {
case 2: /* HI */
case 3: /* LS */
tcond = TCG_COND_LEU;
goto done;
case 4: /* CC */
case 5: /* CS */
tcond = TCG_COND_LTU;
goto done;
case 6: /* NE */
case 7: /* EQ */
tcond = TCG_COND_EQ;
goto done;
case 10: /* PL */
case 11: /* MI */
c->g1 = c->g2 = 0;
c->v2 = tcg_const_i32(tcg_ctx, 0);
c->v1 = tmp = tcg_temp_new(tcg_ctx);
tcg_gen_sub_i32(tcg_ctx, tmp, tcg_ctx->QREG_CC_N, tcg_ctx->QREG_CC_V);
/* fallthru */
case 12: /* GE */
case 13: /* LT */
tcond = TCG_COND_LT;
goto done;
case 14: /* GT */
case 15: /* LE */
tcond = TCG_COND_LE;
goto done;
}
}
c->g1 = 1; c->g1 = 1;
c->g2 = 0; c->g2 = 0;
@ -777,7 +810,72 @@ static void gen_cc_cond(DisasCompare *c, DisasContext *s, int cond)
case 1: /* F */ case 1: /* F */
c->v1 = c->v2; c->v1 = c->v2;
tcond = TCG_COND_NEVER; tcond = TCG_COND_NEVER;
goto done;
case 14: /* GT (!(Z || (N ^ V))) */
case 15: /* LE (Z || (N ^ V)) */
/* Logic operations clear V, which simplifies LE to (Z || N),
and since Z and N are co-located, this becomes a normal
comparison vs N. */
if (op == CC_OP_LOGIC) {
c->v1 = tcg_ctx->QREG_CC_N;
tcond = TCG_COND_LE;
goto done;
}
break; break;
case 12: /* GE (!(N ^ V)) */
case 13: /* LT (N ^ V) */
/* Logic operations clear V, which simplifies this to N. */
if (op != CC_OP_LOGIC) {
break;
}
/* fallthru */
case 10: /* PL (!N) */
case 11: /* MI (N) */
/* Several cases represent N normally. */
if (op == CC_OP_ADD || op == CC_OP_SUB || op == CC_OP_LOGIC) {
c->v1 = tcg_ctx->QREG_CC_N;
tcond = TCG_COND_LT;
goto done;
}
break;
case 6: /* NE (!Z) */
case 7: /* EQ (Z) */
/* Some cases fold Z into N. */
if (op == CC_OP_ADD || op == CC_OP_SUB || op == CC_OP_LOGIC) {
tcond = TCG_COND_EQ;
c->v1 = tcg_ctx->QREG_CC_N;
goto done;
}
break;
case 4: /* CC (!C) */
case 5: /* CS (C) */
/* Some cases fold C into X. */
if (op == CC_OP_ADD || op == CC_OP_SUB) {
tcond = TCG_COND_NE;
c->v1 = tcg_ctx->QREG_CC_X;
goto done;
}
/* fallthru */
case 8: /* VC (!V) */
case 9: /* VS (V) */
/* Logic operations clear V and C. */
if (op == CC_OP_LOGIC) {
tcond = TCG_COND_NEVER;
c->v1 = c->v2;
goto done;
}
break;
}
/* Otherwise, flush flag state to CC_OP_FLAGS. */
gen_flush_flags(s);
switch (cond) {
case 0: /* T */
case 1: /* F */
default:
/* Invalid, or handled above. */
abort();
case 2: /* HI (!C && !Z) -> !(C || Z)*/ case 2: /* HI (!C && !Z) -> !(C || Z)*/
case 3: /* LS (C || Z) */ case 3: /* LS (C || Z) */
c->v1 = tmp = tcg_temp_new(tcg_ctx); c->v1 = tmp = tcg_temp_new(tcg_ctx);
@ -826,10 +924,8 @@ static void gen_cc_cond(DisasCompare *c, DisasContext *s, int cond)
tcg_temp_free(tcg_ctx, tmp2); tcg_temp_free(tcg_ctx, tmp2);
tcond = TCG_COND_LT; tcond = TCG_COND_LT;
break; break;
default:
/* Should ever happen. */
abort();
} }
done:
if ((cond & 1) == 0) { if ((cond & 1) == 0) {
tcond = tcg_invert_cond(tcond); tcond = tcg_invert_cond(tcond);
} }