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target/arm: Make arm_cpu_dump_state() handle the M-profile XPSR
Make the arm_cpu_dump_state() debug logging handle the M-profile XPSR rather than assuming it's an A-profile CPSR. On M profile the PSR line of a register dump will now look like this: XPSR=41000000 -Z-- T priv-thread Backports commit 5b906f3589443a3c69d8feeaac37263843ecfb8d from qemu
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@ -12440,7 +12440,6 @@ void arm_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf,
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ARMCPU *cpu = ARM_CPU(cs);
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CPUARMState *env = &cpu->env;
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int i;
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const char *ns_status;
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if (is_a64(env)) {
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aarch64_cpu_dump_state(cs, f, cpu_fprintf, flags);
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@ -12455,21 +12454,10 @@ void arm_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf,
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cpu_fprintf(f, " ");
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}
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if (arm_feature(env, ARM_FEATURE_EL3) &&
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(psr & CPSR_M) != ARM_CPU_MODE_MON) {
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ns_status = env->cp15.scr_el3 & SCR_NS ? "NS " : "S ";
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} else {
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ns_status = "";
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}
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if (arm_feature(env, ARM_FEATURE_M)) {
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uint32_t xpsr = xpsr_read(env);
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const char *mode;
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if (arm_feature(env, ARM_FEATURE_M_SECURITY)) {
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ns_status = env->v7m.secure ? "S " : "NS ";
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}
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if (xpsr & XPSR_EXCP) {
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mode = "handler";
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} else {
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@ -12480,14 +12468,13 @@ void arm_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf,
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}
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}
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cpu_fprintf(f, "XPSR=%08x %c%c%c%c %c %s%s\n",
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cpu_fprintf(f, "XPSR=%08x %c%c%c%c %c %s\n",
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xpsr,
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xpsr & XPSR_N ? 'N' : '-',
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xpsr & XPSR_Z ? 'Z' : '-',
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xpsr & XPSR_C ? 'C' : '-',
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xpsr & XPSR_V ? 'V' : '-',
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xpsr & XPSR_T ? 'T' : 'A',
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ns_status,
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mode);
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} else {
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uint32_t psr = cpsr_read(env);
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@ -12500,10 +12487,10 @@ void arm_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf,
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cpu_fprintf(f, "PSR=%08x %c%c%c%c %c %s%s%d\n",
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psr,
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psr & (1 << 31) ? 'N' : '-',
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psr & (1 << 30) ? 'Z' : '-',
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psr & (1 << 29) ? 'C' : '-',
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psr & (1 << 28) ? 'V' : '-',
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psr & CPSR_N ? 'N' : '-',
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psr & CPSR_Z ? 'Z' : '-',
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psr & CPSR_C ? 'C' : '-',
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psr & CPSR_V ? 'V' : '-',
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psr & CPSR_T ? 'T' : 'A',
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ns_status,
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cpu_mode_names[psr & 0xf], (psr & 0x10) ? 32 : 26);
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