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target-arm: Bring AArch64 debug CPU display of PSTATE into line with AArch32
The AArch64 debug CPU display of PSTATE as "PSTATE=200003c5 (flags --C-)" on the end of the same line as the last of the general purpose registers is unnecessarily different from the AArch32 display of PSR as "PSR=200001d3 --C- A svc32" on its own line. Update the AArch64 code to put PSTATE in its own line and in the same format, including printing the exception level (mode). Backports commit 08b8e0f527930208a548b424d2ab3103bf3c8c02 from qemu
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@ -139,6 +139,7 @@ void aarch64_cpu_dump_state(CPUState *cs, FILE *f,
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CPUARMState *env = &cpu->env;
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uint32_t psr = pstate_read(env);
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int i;
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int el = arm_current_el(env);
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cpu_fprintf(f, "PC=%016"PRIx64" SP=%016"PRIx64"\n",
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env->pc, env->xregs[31]);
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@ -150,13 +151,14 @@ void aarch64_cpu_dump_state(CPUState *cs, FILE *f,
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cpu_fprintf(f, " ");
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}
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}
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cpu_fprintf(f, "PSTATE=%08x (flags %c%c%c%c)\n",
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cpu_fprintf(f, "\nPSTATE=%08x %c%c%c%c EL%d%c\n",
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psr,
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psr & PSTATE_N ? 'N' : '-',
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psr & PSTATE_Z ? 'Z' : '-',
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psr & PSTATE_C ? 'C' : '-',
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psr & PSTATE_V ? 'V' : '-');
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cpu_fprintf(f, "\n");
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psr & PSTATE_V ? 'V' : '-',
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el,
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psr & PSTATE_SP ? 'h' : 't');
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if (flags & CPU_DUMP_FPU) {
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int numvfpregs = 32;
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