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target/arm: [tcg,a64] Port to tb_stop
Incrementally paves the way towards using the generic instruction translation loop. Backports commit be4079641f1bc755fc5d3ff194cf505c506227d8 from qemu
This commit is contained in:
Lluís Vilanova
Lioncash
parent
d8def0cdb5
commit
7a02cb360c
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@ -11576,6 +11576,73 @@ static void aarch64_tr_translate_insn(DisasContextBase *dcbase, CPUState *cpu)
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dc->base.pc_next = dc->pc;
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dc->base.pc_next = dc->pc;
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}
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}
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static void aarch64_tr_tb_stop(DisasContextBase *dcbase, CPUState *cpu)
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{
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DisasContext *dc = container_of(dcbase, DisasContext, base);
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TCGContext *tcg_ctx = cpu->uc->tcg_ctx;
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if (unlikely(dc->base.singlestep_enabled || dc->ss_active)) {
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/* Note that this means single stepping WFI doesn't halt the CPU.
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* For conditional branch insns this is harmless unreachable code as
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* gen_goto_tb() has already handled emitting the debug exception
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* (and thus a tb-jump is not possible when singlestepping).
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*/
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switch (dc->base.is_jmp) {
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default:
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gen_a64_set_pc_im(dc, dc->pc);
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/* fall through */
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case DISAS_JUMP:
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if (dc->base.singlestep_enabled) {
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gen_exception_internal(dc, EXCP_DEBUG);
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} else {
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gen_step_complete_exception(dc);
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}
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break;
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case DISAS_NORETURN:
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break;
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}
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} else {
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switch (dc->base.is_jmp) {
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case DISAS_NEXT:
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case DISAS_TOO_MANY:
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gen_goto_tb(dc, 1, dc->pc);
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break;
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default:
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case DISAS_UPDATE:
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gen_a64_set_pc_im(dc, dc->pc);
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/* fall through */
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case DISAS_JUMP:
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tcg_gen_lookup_and_goto_ptr(tcg_ctx, tcg_ctx->cpu_pc);
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break;
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case DISAS_EXIT:
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tcg_gen_exit_tb(tcg_ctx, 0);
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break;
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case DISAS_NORETURN:
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case DISAS_SWI:
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break;
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case DISAS_WFE:
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gen_a64_set_pc_im(dc, dc->pc);
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gen_helper_wfe(tcg_ctx, tcg_ctx->cpu_env);
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break;
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case DISAS_YIELD:
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gen_a64_set_pc_im(dc, dc->pc);
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gen_helper_yield(tcg_ctx, tcg_ctx->cpu_env);
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break;
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case DISAS_WFI:
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/* This is a special case because we don't want to just halt the CPU
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* if trying to debug across a WFI.
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*/
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gen_a64_set_pc_im(dc, dc->pc);
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gen_helper_wfi(tcg_ctx, tcg_ctx->cpu_env);
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/* The helper doesn't necessarily throw an exception, but we
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* must go back to the main loop to check for interrupts anyway.
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*/
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tcg_gen_exit_tb(tcg_ctx, 0);
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break;
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}
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}
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}
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void gen_intermediate_code_a64(DisasContextBase *dcbase, CPUState *cs,
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void gen_intermediate_code_a64(DisasContextBase *dcbase, CPUState *cs,
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TranslationBlock *tb)
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TranslationBlock *tb)
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{
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{
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@ -11676,66 +11743,7 @@ void gen_intermediate_code_a64(DisasContextBase *dcbase, CPUState *cs,
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//}
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//}
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tb_end:
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tb_end:
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if (unlikely(cs->singlestep_enabled || dc->ss_active)) {
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aarch64_tr_tb_stop(&dc->base, cs);
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/* Note that this means single stepping WFI doesn't halt the CPU.
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* For conditional branch insns this is harmless unreachable code as
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* gen_goto_tb() has already handled emitting the debug exception
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* (and thus a tb-jump is not possible when singlestepping).
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*/
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switch (dc->base.is_jmp) {
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default:
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gen_a64_set_pc_im(dc, dc->pc);
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/* fall through */
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case DISAS_JUMP:
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if (cs->singlestep_enabled) {
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gen_exception_internal(dc, EXCP_DEBUG);
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} else {
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gen_step_complete_exception(dc);
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}
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break;
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case DISAS_NORETURN:
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break;
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}
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} else {
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switch (dc->base.is_jmp) {
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case DISAS_NEXT:
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case DISAS_TOO_MANY:
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gen_goto_tb(dc, 1, dc->pc);
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break;
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case DISAS_JUMP:
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tcg_gen_lookup_and_goto_ptr(tcg_ctx, tcg_ctx->cpu_pc);
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break;
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case DISAS_NORETURN:
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case DISAS_SWI:
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break;
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case DISAS_WFE:
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gen_a64_set_pc_im(dc, dc->pc);
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gen_helper_wfe(tcg_ctx, tcg_ctx->cpu_env);
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break;
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case DISAS_YIELD:
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gen_a64_set_pc_im(dc, dc->pc);
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gen_helper_yield(tcg_ctx, tcg_ctx->cpu_env);
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break;
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case DISAS_WFI:
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/* This is a special case because we don't want to just halt the CPU
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* if trying to debug across a WFI.
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*/
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gen_a64_set_pc_im(dc, dc->pc);
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gen_helper_wfi(tcg_ctx, tcg_ctx->cpu_env);
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/* The helper doesn't necessarily throw an exception, but we
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* must go back to the main loop to check for interrupts anyway.
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*/
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tcg_gen_exit_tb(tcg_ctx, 0);
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break;
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case DISAS_UPDATE:
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gen_a64_set_pc_im(dc, dc->pc);
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/* fall through */
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case DISAS_EXIT:
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default:
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tcg_gen_exit_tb(tcg_ctx, 0);
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break;
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}
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}
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gen_tb_end(tcg_ctx, tb, dc->base.num_insns);
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gen_tb_end(tcg_ctx, tb, dc->base.num_insns);
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