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target/riscv: add log of PMP permission checking
Like MMU translation, add qemu log of PMP permission checking for debugging. Backports 663e119317d77780949830226f5575305405ab75
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@ -784,6 +784,12 @@ bool riscv_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
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if (ret == TRANSLATE_SUCCESS) {
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if (ret == TRANSLATE_SUCCESS) {
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ret = get_physical_address_pmp(env, &prot_pmp, &tlb_size, pa,
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ret = get_physical_address_pmp(env, &prot_pmp, &tlb_size, pa,
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size, access_type, mode);
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size, access_type, mode);
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qemu_log_mask(CPU_LOG_MMU,
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"%s PMP address=" TARGET_FMT_plx " ret %d prot"
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" %d tlb_size " TARGET_FMT_lu "\n",
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__func__, pa, ret, prot_pmp, tlb_size);
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prot &= prot_pmp;
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prot &= prot_pmp;
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}
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}
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@ -811,6 +817,12 @@ bool riscv_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
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if (ret == TRANSLATE_SUCCESS) {
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if (ret == TRANSLATE_SUCCESS) {
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ret = get_physical_address_pmp(env, &prot_pmp, &tlb_size, pa,
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ret = get_physical_address_pmp(env, &prot_pmp, &tlb_size, pa,
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size, access_type, mode);
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size, access_type, mode);
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qemu_log_mask(CPU_LOG_MMU,
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"%s PMP address=" TARGET_FMT_plx " ret %d prot"
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" %d tlb_size " TARGET_FMT_lu "\n",
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__func__, pa, ret, prot_pmp, tlb_size);
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prot &= prot_pmp;
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prot &= prot_pmp;
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}
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}
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}
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}
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