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target/mips/op_helper: Perform comparison pass with qemu
Keeps code and formatting in sync
This commit is contained in:
Lioncash
parent
48429b2bcb
commit
7db1bff993
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@ -35,7 +35,7 @@ void helper_raise_exception_err(CPUMIPSState *env, uint32_t exception,
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void helper_raise_exception(CPUMIPSState *env, uint32_t exception)
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{
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do_raise_exception(env, exception, 0);
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do_raise_exception(env, exception, GETPC());
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}
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void helper_raise_exception_debug(CPUMIPSState *env)
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@ -115,10 +115,8 @@ static inline uint64_t get_HILO(CPUMIPSState *env)
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static inline target_ulong set_HIT0_LO(CPUMIPSState *env, uint64_t HILO)
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{
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target_ulong tmp;
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env->active_tc.LO[0] = (int32_t)(HILO & 0xFFFFFFFF);
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tmp = env->active_tc.HI[0] = (int32_t)(HILO >> 32);
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return tmp;
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return env->active_tc.HI[0] = (int32_t)(HILO >> 32);
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}
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static inline target_ulong set_HI_LOT0(CPUMIPSState *env, uint64_t HILO)
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@ -404,6 +402,7 @@ void helper_sdl(CPUMIPSState *env, target_ulong arg1, target_ulong arg2,
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do_sb(env, GET_OFFSET(arg2, 6), (uint8_t)(arg1 >> 8), mem_idx,
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GETPC());
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}
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if (GET_LMASK64(arg2) <= 0) {
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do_sb(env, GET_OFFSET(arg2, 7), (uint8_t)arg1, mem_idx,
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GETPC());
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@ -1311,7 +1310,6 @@ void helper_mtc0_pagemask(CPUMIPSState *env, target_ulong arg1)
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void helper_mtc0_pagegrain(CPUMIPSState *env, target_ulong arg1)
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{
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/* SmartMIPS not implemented */
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/* Large physaddr (PABITS) not implemented */
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/* 1k pages not implemented */
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env->CP0_PageGrain = (arg1 & env->CP0_PageGrain_rw_bitmask) |
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(env->CP0_PageGrain & ~env->CP0_PageGrain_rw_bitmask);
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@ -1870,17 +1868,17 @@ target_ulong helper_dvpe(CPUMIPSState *env)
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//CPUState *other_cs = uc->cpu;
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target_ulong prev = env->mvp->CP0_MVPControl;
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// TODO: #642 SMP groups
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/*
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// Unicorn if'd out
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#if 0
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CPU_FOREACH(other_cs) {
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MIPSCPU *other_cpu = MIPS_CPU(uc, other_cs);
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// Turn off all VPEs except the one executing the dvpe.
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/* Turn off all VPEs except the one executing the dvpe. */
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if (&other_cpu->env != env) {
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other_cpu->env.mvp->CP0_MVPControl &= ~(1 << CP0MVPCo_EVP);
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mips_vpe_sleep(other_cpu);
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}
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}
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*/
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#endif
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return prev;
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}
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@ -1890,20 +1888,20 @@ target_ulong helper_evpe(CPUMIPSState *env)
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//CPUState *other_cs = uc->cpu;
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target_ulong prev = env->mvp->CP0_MVPControl;
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// TODO: #642 SMP groups
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/*
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// Unicorn: if'd out
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#if 0
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CPU_FOREACH(other_cs) {
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MIPSCPU *other_cpu = MIPS_CPU(uc, other_cs);
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if (&other_cpu->env != env
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// If the VPE is WFI, don't disturb its sleep.
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/* If the VPE is WFI, don't disturb its sleep. */
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&& !mips_vpe_is_wfi(other_cpu)) {
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// Enable the VPE.
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/* Enable the VPE. */
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other_cpu->env.mvp->CP0_MVPControl |= (1 << CP0MVPCo_EVP);
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mips_vpe_wake(other_cpu); // And wake it up.
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mips_vpe_wake(other_cpu); /* And wake it up. */
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}
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}
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*/
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#endif
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return prev;
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}
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#endif /* !CONFIG_USER_ONLY */
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@ -2524,7 +2522,7 @@ target_ulong helper_cfc1(CPUMIPSState *env, uint32_t reg)
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if (env->CP0_Config5 & (1 << CP0C5_UFE)) {
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arg1 = (env->CP0_Config5 >> CP0C5_FRE) & 1;
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} else {
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do_raise_exception(env, EXCP_RI, GETPC());
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helper_raise_exception(env, EXCP_RI);
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}
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}
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break;
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@ -2557,7 +2555,7 @@ void helper_ctc1(CPUMIPSState *env, target_ulong arg1, uint32_t fs, uint32_t rt)
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env->CP0_Status &= ~(1 << CP0St_FR);
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compute_hflags(env);
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} else {
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helper_raise_exception(env, EXCP_RI);
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do_raise_exception(env, EXCP_RI, GETPC());
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}
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break;
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case 4:
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@ -2569,7 +2567,7 @@ void helper_ctc1(CPUMIPSState *env, target_ulong arg1, uint32_t fs, uint32_t rt)
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env->CP0_Status |= (1 << CP0St_FR);
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compute_hflags(env);
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} else {
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helper_raise_exception(env, EXCP_RI);
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do_raise_exception(env, EXCP_RI, GETPC());
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}
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break;
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case 5:
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@ -4158,6 +4156,18 @@ void helper_msa_ld_ ## TYPE(CPUMIPSState *env, uint32_t wd, \
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memcpy(pwd, &wx, sizeof(wr_t)); \
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}
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#if !defined(CONFIG_USER_ONLY)
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MSA_LD_DF(DF_BYTE, b, helper_ret_ldub_mmu, oi, GETPC())
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MSA_LD_DF(DF_HALF, h, helper_ret_lduw_mmu, oi, GETPC())
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MSA_LD_DF(DF_WORD, w, helper_ret_ldul_mmu, oi, GETPC())
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MSA_LD_DF(DF_DOUBLE, d, helper_ret_ldq_mmu, oi, GETPC())
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#else
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MSA_LD_DF(DF_BYTE, b, cpu_ldub_data)
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MSA_LD_DF(DF_HALF, h, cpu_lduw_data)
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MSA_LD_DF(DF_WORD, w, cpu_ldl_data)
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MSA_LD_DF(DF_DOUBLE, d, cpu_ldq_data)
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#endif
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#define MSA_PAGESPAN(x) \
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((((x) & ~TARGET_PAGE_MASK) + MSA_WRLEN/8 - 1) >= TARGET_PAGE_SIZE)
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@ -4219,15 +4229,3 @@ void helper_cache(CPUMIPSState *env, target_ulong addr, uint32_t op)
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}
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#endif
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}
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#if !defined(CONFIG_USER_ONLY)
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MSA_LD_DF(DF_BYTE, b, helper_ret_ldub_mmu, oi, GETPC())
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MSA_LD_DF(DF_HALF, h, helper_ret_lduw_mmu, oi, GETPC())
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MSA_LD_DF(DF_WORD, w, helper_ret_ldul_mmu, oi, GETPC())
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MSA_LD_DF(DF_DOUBLE, d, helper_ret_ldq_mmu, oi, GETPC())
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#else
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MSA_LD_DF(DF_BYTE, b, cpu_ldub_data)
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MSA_LD_DF(DF_HALF, h, cpu_lduw_data)
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MSA_LD_DF(DF_WORD, w, cpu_ldl_data)
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MSA_LD_DF(DF_DOUBLE, d, cpu_ldq_data)
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#endif
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