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memory: Replace io_mem_read/write with memory_region_dispatch_read/write

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Rather than retaining io_mem_read/write as simple wrappers around
the memory_region_dispatch_read/write functions, make the latter
public and change all the callers to use them, since we need to
touch all the callsites anyway to add MemTxAttrs and MemTxResult
support. Delete io_mem_read and io_mem_write entirely.

(All the callers currently pass MEMTXATTRS_UNSPECIFIED
and convert the return value back to bool or ignore it.)

Backports commit 3b6434953934e6d4a776ed426d8c6d6badee176f from qemu
This commit is contained in:
Peter Maydell 2018-02-12 17:26:24 -05:00 committed by Lioncash
parent b2962f4613
commit 825e74410f
No known key found for this signature in database
GPG key ID: 4E3C3CC1031BA9C7
19 changed files with 82 additions and 74 deletions
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2
qemu/aarch64.h
View file

@ -1932,8 +1932,6 @@
#define int64_to_floatx80 int64_to_floatx80_aarch64
#define invalidate_and_set_dirty invalidate_and_set_dirty_aarch64
#define invalidate_page_bitmap invalidate_page_bitmap_aarch64
#define io_mem_read io_mem_read_aarch64
#define io_mem_write io_mem_write_aarch64
#define io_readb io_readb_aarch64
#define io_readl io_readl_aarch64
#define io_readq io_readq_aarch64

2
qemu/aarch64eb.h
View file

@ -1932,8 +1932,6 @@
#define int64_to_floatx80 int64_to_floatx80_aarch64eb
#define invalidate_and_set_dirty invalidate_and_set_dirty_aarch64eb
#define invalidate_page_bitmap invalidate_page_bitmap_aarch64eb
#define io_mem_read io_mem_read_aarch64eb
#define io_mem_write io_mem_write_aarch64eb
#define io_readb io_readb_aarch64eb
#define io_readl io_readl_aarch64eb
#define io_readq io_readq_aarch64eb

2
qemu/arm.h
View file

@ -1932,8 +1932,6 @@
#define int64_to_floatx80 int64_to_floatx80_arm
#define invalidate_and_set_dirty invalidate_and_set_dirty_arm
#define invalidate_page_bitmap invalidate_page_bitmap_arm
#define io_mem_read io_mem_read_arm
#define io_mem_write io_mem_write_arm
#define io_readb io_readb_arm
#define io_readl io_readl_arm
#define io_readq io_readq_arm

2
qemu/armeb.h
View file

@ -1932,8 +1932,6 @@
#define int64_to_floatx80 int64_to_floatx80_armeb
#define invalidate_and_set_dirty invalidate_and_set_dirty_armeb
#define invalidate_page_bitmap invalidate_page_bitmap_armeb
#define io_mem_read io_mem_read_armeb
#define io_mem_write io_mem_write_armeb
#define io_readb io_readb_armeb
#define io_readl io_readl_armeb
#define io_readq io_readq_armeb

53
qemu/exec.c
View file

@ -1643,7 +1643,8 @@ bool address_space_rw(AddressSpace *as, hwaddr addr, uint8_t *buf,
uint64_t val;
hwaddr addr1;
MemoryRegion *mr;
bool error = false;
MemTxResult result = MEMTX_OK;
MemTxAttrs attrs = MEMTXATTRS_UNSPECIFIED;
while (len > 0) {
l = len;
@ -1661,22 +1662,28 @@ bool address_space_rw(AddressSpace *as, hwaddr addr, uint8_t *buf,
case 8:
/* 64 bit write access */
val = ldq_p(buf);
error |= io_mem_write(mr, addr1, val, 8);
result |= memory_region_dispatch_write(mr, addr1, val, 8,
attrs);
break;
case 4:
/* 32 bit write access */
val = ldl_p(buf);
error |= io_mem_write(mr, addr1, val, 4);
result |= memory_region_dispatch_write(mr, addr1, val, 4,
attrs);
break;
case 2:
/* 16 bit write access */
val = lduw_p(buf);
error |= io_mem_write(mr, addr1, val, 2);
result |= memory_region_dispatch_write(mr, addr1, val, 2,
attrs);
break;
case 1:
/* 8 bit write access */
val = ldub_p(buf);
error |= io_mem_write(mr, addr1, val, 1);
result |= memory_region_dispatch_write(mr, addr1, val, 1,
attrs);
break;
default:
abort();
@ -1696,22 +1703,30 @@ bool address_space_rw(AddressSpace *as, hwaddr addr, uint8_t *buf,
switch (l) {
case 8:
/* 64 bit read access */
error |= io_mem_read(mr, addr1, &val, 8);
result |= memory_region_dispatch_read(mr, addr1, &val, 8,
attrs);
stq_p(buf, val);
break;
case 4:
/* 32 bit read access */
error |= io_mem_read(mr, addr1, &val, 4);
result |= memory_region_dispatch_read(mr, addr1, &val, 4,
attrs);
stl_p(buf, val);
break;
case 2:
/* 16 bit read access */
error |= io_mem_read(mr, addr1, &val, 2);
result |= memory_region_dispatch_read(mr, addr1, &val, 2,
attrs);
stw_p(buf, val);
break;
case 1:
/* 8 bit read access */
error |= io_mem_read(mr, addr1, &val, 1);
result |= memory_region_dispatch_read(mr, addr1, &val, 1,
attrs);
stb_p(buf, val);
break;
default:
@ -1728,7 +1743,7 @@ bool address_space_rw(AddressSpace *as, hwaddr addr, uint8_t *buf,
addr += l;
}
return error;
return result;
}
bool address_space_write(AddressSpace *as, hwaddr addr,
@ -1955,7 +1970,8 @@ static inline uint32_t ldl_phys_internal(AddressSpace *as, hwaddr addr,
mr = address_space_translate(as, addr, &addr1, &l, false);
if (l < 4 || !memory_access_is_direct(mr, false)) {
/* I/O case */
io_mem_read(mr, addr1, &val, 4);
memory_region_dispatch_read(mr, addr1, &val, 4,
MEMTXATTRS_UNSPECIFIED);
#if defined(TARGET_WORDS_BIGENDIAN)
if (endian == DEVICE_LITTLE_ENDIAN) {
val = bswap32(val);
@ -2014,7 +2030,8 @@ static inline uint64_t ldq_phys_internal(AddressSpace *as, hwaddr addr,
false);
if (l < 8 || !memory_access_is_direct(mr, false)) {
/* I/O case */
io_mem_read(mr, addr1, &val, 8);
memory_region_dispatch_read(mr, addr1, &val, 8,
MEMTXATTRS_UNSPECIFIED);
#if defined(TARGET_WORDS_BIGENDIAN)
if (endian == DEVICE_LITTLE_ENDIAN) {
val = bswap64(val);
@ -2081,7 +2098,8 @@ static inline uint32_t lduw_phys_internal(AddressSpace *as, hwaddr addr,
false);
if (l < 2 || !memory_access_is_direct(mr, false)) {
/* I/O case */
io_mem_read(mr, addr1, &val, 2);
memory_region_dispatch_read(mr, addr1, &val, 2,
MEMTXATTRS_UNSPECIFIED);
#if defined(TARGET_WORDS_BIGENDIAN)
if (endian == DEVICE_LITTLE_ENDIAN) {
val = bswap16(val);
@ -2139,7 +2157,8 @@ void stl_phys_notdirty(AddressSpace *as, hwaddr addr, uint32_t val)
mr = address_space_translate(as, addr, &addr1, &l,
true);
if (l < 4 || !memory_access_is_direct(mr, true)) {
io_mem_write(mr, addr1, val, 4);
memory_region_dispatch_write(mr, addr1, val, 4,
MEMTXATTRS_UNSPECIFIED);
} else {
addr1 += memory_region_get_ram_addr(mr) & TARGET_PAGE_MASK;
ptr = qemu_get_ram_ptr(as->uc, addr1);
@ -2169,7 +2188,8 @@ static inline void stl_phys_internal(AddressSpace *as,
val = bswap32(val);
}
#endif
io_mem_write(mr, addr1, val, 4);
memory_region_dispatch_write(mr, addr1, val, 4,
MEMTXATTRS_UNSPECIFIED);
} else {
/* RAM case */
addr1 += memory_region_get_ram_addr(mr) & TARGET_PAGE_MASK;
@ -2232,7 +2252,8 @@ static inline void stw_phys_internal(AddressSpace *as,
val = bswap16(val);
}
#endif
io_mem_write(mr, addr1, val, 2);
memory_region_dispatch_write(mr, addr1, val, 2,
MEMTXATTRS_UNSPECIFIED);
} else {
/* RAM case */
addr1 += memory_region_get_ram_addr(mr) & TARGET_PAGE_MASK;

2
qemu/header_gen.py
View file

@ -1938,8 +1938,6 @@ symbols = (
'int64_to_floatx80',
'invalidate_and_set_dirty',
'invalidate_page_bitmap',
'io_mem_read',
'io_mem_write',
'io_readb',
'io_readl',
'io_readq',

5
qemu/include/exec/exec-all.h
View file

@ -336,11 +336,6 @@ void phys_mem_set_alloc(void *(*alloc)(size_t, uint64_t *align));
struct MemoryRegion *iotlb_to_region(CPUState *cpu,
hwaddr index);
bool io_mem_read(struct MemoryRegion *mr, hwaddr addr,
uint64_t *pvalue, unsigned size);
bool io_mem_write(struct MemoryRegion *mr, hwaddr addr,
uint64_t value, unsigned size);
void tlb_fill(CPUState *cpu, target_ulong addr, int is_write, int mmu_idx,
uintptr_t retaddr);

31
qemu/include/exec/memory.h
View file

@ -751,6 +751,37 @@ void memory_listener_register(struct uc_struct* uc, MemoryListener *listener, Ad
*/
void memory_listener_unregister(struct uc_struct* uc, MemoryListener *listener);
/**
* memory_region_dispatch_read: perform a read directly to the specified
* MemoryRegion.
*
* @mr: #MemoryRegion to access
* @addr: address within that region
* @pval: pointer to uint64_t which the data is written to
* @size: size of the access in bytes
* @attrs: memory transaction attributes to use for the access
*/
MemTxResult memory_region_dispatch_read(MemoryRegion *mr,
hwaddr addr,
uint64_t *pval,
unsigned size,
MemTxAttrs attrs);
/**
* memory_region_dispatch_write: perform a write directly to the specified
* MemoryRegion.
*
* @mr: #MemoryRegion to access
* @addr: address within that region
* @data: data to write
* @size: size of the access in bytes
* @attrs: memory transaction attributes to use for the access
*/
MemTxResult memory_region_dispatch_write(MemoryRegion *mr,
hwaddr addr,
uint64_t data,
unsigned size,
MemTxAttrs attrs);
/**
* address_space_init: initializes an address space
*

2
qemu/m68k.h
View file

@ -1932,8 +1932,6 @@
#define int64_to_floatx80 int64_to_floatx80_m68k
#define invalidate_and_set_dirty invalidate_and_set_dirty_m68k
#define invalidate_page_bitmap invalidate_page_bitmap_m68k
#define io_mem_read io_mem_read_m68k
#define io_mem_write io_mem_write_m68k
#define io_readb io_readb_m68k
#define io_readl io_readl_m68k
#define io_readq io_readq_m68k

33
qemu/memory.c
View file

@ -1076,11 +1076,11 @@ static MemTxResult memory_region_dispatch_read1(MemoryRegion *mr,
}
}
static MemTxResult memory_region_dispatch_read(MemoryRegion *mr,
hwaddr addr,
uint64_t *pval,
unsigned size,
MemTxAttrs attrs)
MemTxResult memory_region_dispatch_read(MemoryRegion *mr,
hwaddr addr,
uint64_t *pval,
unsigned size,
MemTxAttrs attrs)
{
MemTxResult r;
@ -1094,11 +1094,11 @@ static MemTxResult memory_region_dispatch_read(MemoryRegion *mr,
return r;
}
static MemTxResult memory_region_dispatch_write(MemoryRegion *mr,
hwaddr addr,
uint64_t data,
unsigned size,
MemTxAttrs attrs)
MemTxResult memory_region_dispatch_write(MemoryRegion *mr,
hwaddr addr,
uint64_t data,
unsigned size,
MemTxAttrs attrs)
{
if (!memory_region_access_valid(mr, addr, size, true)) {
unassigned_mem_write(mr->uc, addr, data, size);
@ -1658,19 +1658,6 @@ void address_space_destroy(AddressSpace *as)
g_free(as->name);
}
bool io_mem_read(MemoryRegion *mr, hwaddr addr, uint64_t *pval, unsigned size)
{
return memory_region_dispatch_read(mr, addr, pval, size,
MEMTXATTRS_UNSPECIFIED);
}
bool io_mem_write(MemoryRegion *mr, hwaddr addr,
uint64_t val, unsigned size)
{
return memory_region_dispatch_write(mr, addr, val, size,
MEMTXATTRS_UNSPECIFIED);
}
typedef struct MemoryRegionList MemoryRegionList;
struct MemoryRegionList {

2
qemu/mips.h
View file

@ -1932,8 +1932,6 @@
#define int64_to_floatx80 int64_to_floatx80_mips
#define invalidate_and_set_dirty invalidate_and_set_dirty_mips
#define invalidate_page_bitmap invalidate_page_bitmap_mips
#define io_mem_read io_mem_read_mips
#define io_mem_write io_mem_write_mips
#define io_readb io_readb_mips
#define io_readl io_readl_mips
#define io_readq io_readq_mips

2
qemu/mips64.h
View file

@ -1932,8 +1932,6 @@
#define int64_to_floatx80 int64_to_floatx80_mips64
#define invalidate_and_set_dirty invalidate_and_set_dirty_mips64
#define invalidate_page_bitmap invalidate_page_bitmap_mips64
#define io_mem_read io_mem_read_mips64
#define io_mem_write io_mem_write_mips64
#define io_readb io_readb_mips64
#define io_readl io_readl_mips64
#define io_readq io_readq_mips64

2
qemu/mips64el.h
View file

@ -1932,8 +1932,6 @@
#define int64_to_floatx80 int64_to_floatx80_mips64el
#define invalidate_and_set_dirty invalidate_and_set_dirty_mips64el
#define invalidate_page_bitmap invalidate_page_bitmap_mips64el
#define io_mem_read io_mem_read_mips64el
#define io_mem_write io_mem_write_mips64el
#define io_readb io_readb_mips64el
#define io_readl io_readl_mips64el
#define io_readq io_readq_mips64el

2
qemu/mipsel.h
View file

@ -1932,8 +1932,6 @@
#define int64_to_floatx80 int64_to_floatx80_mipsel
#define invalidate_and_set_dirty invalidate_and_set_dirty_mipsel
#define invalidate_page_bitmap invalidate_page_bitmap_mipsel
#define io_mem_read io_mem_read_mipsel
#define io_mem_write io_mem_write_mipsel
#define io_readb io_readb_mipsel
#define io_readl io_readl_mipsel
#define io_readq io_readq_mipsel

2
qemu/powerpc.h
View file

@ -1932,8 +1932,6 @@
#define int64_to_floatx80 int64_to_floatx80_powerpc
#define invalidate_and_set_dirty invalidate_and_set_dirty_powerpc
#define invalidate_page_bitmap invalidate_page_bitmap_powerpc
#define io_mem_read io_mem_read_powerpc
#define io_mem_write io_mem_write_powerpc
#define io_readb io_readb_powerpc
#define io_readl io_readl_powerpc
#define io_readq io_readq_powerpc

6
qemu/softmmu_template.h
View file

@ -173,7 +173,8 @@ static inline DATA_TYPE glue(io_read, SUFFIX)(CPUArchState *env,
}
cpu->mem_io_vaddr = addr;
io_mem_read(mr, physaddr, &val, 1 << SHIFT);
memory_region_dispatch_read(mr, physaddr, &val, 1 << SHIFT,
MEMTXATTRS_UNSPECIFIED);
return (DATA_TYPE)val;
}
#endif
@ -673,7 +674,8 @@ static inline void glue(io_write, SUFFIX)(CPUArchState *env,
cpu->mem_io_vaddr = addr;
cpu->mem_io_pc = retaddr;
io_mem_write(mr, physaddr, val, 1 << SHIFT);
memory_region_dispatch_write(mr, physaddr, val, 1 << SHIFT,
MEMTXATTRS_UNSPECIFIED);
}
void helper_le_st_name(CPUArchState *env, target_ulong addr, DATA_TYPE val,

2
qemu/sparc.h
View file

@ -1932,8 +1932,6 @@
#define int64_to_floatx80 int64_to_floatx80_sparc
#define invalidate_and_set_dirty invalidate_and_set_dirty_sparc
#define invalidate_page_bitmap invalidate_page_bitmap_sparc
#define io_mem_read io_mem_read_sparc
#define io_mem_write io_mem_write_sparc
#define io_readb io_readb_sparc
#define io_readl io_readl_sparc
#define io_readq io_readq_sparc

2
qemu/sparc64.h
View file

@ -1932,8 +1932,6 @@
#define int64_to_floatx80 int64_to_floatx80_sparc64
#define invalidate_and_set_dirty invalidate_and_set_dirty_sparc64
#define invalidate_page_bitmap invalidate_page_bitmap_sparc64
#define io_mem_read io_mem_read_sparc64
#define io_mem_write io_mem_write_sparc64
#define io_readb io_readb_sparc64
#define io_readl io_readl_sparc64
#define io_readq io_readq_sparc64

2
qemu/x86_64.h
View file

@ -1932,8 +1932,6 @@
#define int64_to_floatx80 int64_to_floatx80_x86_64
#define invalidate_and_set_dirty invalidate_and_set_dirty_x86_64
#define invalidate_page_bitmap invalidate_page_bitmap_x86_64
#define io_mem_read io_mem_read_x86_64
#define io_mem_write io_mem_write_x86_64
#define io_readb io_readb_x86_64
#define io_readl io_readl_x86_64
#define io_readq io_readq_x86_64