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tcg/mips: fix TLB loading for BE host with 32-bit guests

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For 32-bit guest, we load a 32-bit address from the TLB, so there is no
need to compensate for the low or high part. This fixes 32-bit guests on
big-endian hosts.

Backports commit e72c4fb81db52be881c9356f1c60e0a7817d2d32 from qemu
This commit is contained in:
Aurelien Jarno 2018-02-14 17:13:25 -05:00 committed by Lioncash
parent 57cf90de18
commit 8396601082
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GPG key ID: 4E3C3CC1031BA9C7
1 changed files with 3 additions and 1 deletions
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4
qemu/tcg/mips/tcg-target.c
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@ -963,9 +963,11 @@ static void tcg_out_tlb_load(TCGContext *s, TCGReg base, TCGReg addrl,
}
/* Load the tlb comparator. */
tcg_out_opc_imm(s, OPC_LW, TCG_TMP0, TCG_REG_A0, cmp_off + LO_OFF);
if (TARGET_LONG_BITS == 64) {
tcg_out_opc_imm(s, OPC_LW, TCG_TMP0, TCG_REG_A0, cmp_off + LO_OFF);
tcg_out_opc_imm(s, OPC_LW, base, TCG_REG_A0, cmp_off + HI_OFF);
} else {
tcg_out_opc_imm(s, OPC_LW, TCG_TMP0, TCG_REG_A0, cmp_off);
}
/* Mask the page bits, keeping the alignment bits to compare against.