target-mips: Add nan2008 flavor of <CEIL|CVT|FLOOR|ROUND|TRUNC>.<L|W>.<S|D>

New set of helpers for handling nan2008-syle versions of instructions
<CEIL|CVT|FLOOR|ROUND|TRUNC>.<L|W>.<S|D>, for Mips R6.

All involved instructions have float operand and integer result. Their
core functionality is implemented via invocations of appropriate SoftFloat
functions. The problematic cases are when the operand is a NaN, and also
when the operand (float) is out of the range of the result.

Here one can distinguish three cases:

CASE MIPS-A: (FCR31.NAN2008 == 1)

1. Operand is a NaN, result should be 0;
2. Operand is larger than INT_MAX, result should be INT_MAX;
3. Operand is smaller than INT_MIN, result should be INT_MIN.

CASE MIPS-B: (FCR31.NAN2008 == 0)

1. Operand is a NaN, result should be INT_MAX;
2. Operand is larger than INT_MAX, result should be INT_MAX;
3. Operand is smaller than INT_MIN, result should be INT_MAX.

CASE SoftFloat:

1. Operand is a NaN, result is INT_MAX;
2. Operand is larger than INT_MAX, result is INT_MAX;
3. Operand is smaller than INT_MIN, result is INT_MIN.

Current implementation of <CEIL|CVT|FLOOR|ROUND|TRUNC>.<L|W>.<S|D>
implements case MIPS-B. This patch relates to case MIPS-A. For case
MIPS-A, only return value for NaN-operands should be corrected after
appropriate SoftFloat library function is called.

Related MSA instructions FTRUNC_S and FTINT_S already handle well
all cases, in the fashion similar to the code from this patch.

Backports commit 87552089b62fa229d2ff86906e4e779177fb5835 from qemu

qemu/header_gen.py

@@ -3741,8 +3741,12 @@ mips_symbols = (
     'helper_float_cvtd_s',
     'helper_float_cvtd_w',
     'helper_float_cvtd_l',
-    'helper_float_cvtl_d',
+    'helper_float_cvt_l_d',
-    'helper_float_cvtl_s',
+    'helper_float_cvt_l_s',
+    'helper_float_cvt_2008_l_d',
+    'helper_float_cvt_2008_l_s',
+    'helper_float_cvt_2008_w_d',
+    'helper_float_cvt_2008_w_s',
     'helper_float_cvtps_pw',
     'helper_float_cvtpw_ps',
     'helper_float_cvts_d',
@@ -3750,24 +3754,40 @@ mips_symbols = (
     'helper_float_cvts_l',
     'helper_float_cvts_pl',
     'helper_float_cvts_pu',
-    'helper_float_cvtw_s',
+    'helper_float_cvt_w_s',
-    'helper_float_cvtw_d',
+    'helper_float_cvt_w_d',
-    'helper_float_roundl_d',
+    'helper_float_round_l_d',
-    'helper_float_roundl_s',
+    'helper_float_round_l_s',
-    'helper_float_roundw_d',
+    'helper_float_round_w_d',
-    'helper_float_roundw_s',
+    'helper_float_round_w_s',
-    'helper_float_truncl_d',
+    'helper_float_round_2008_l_d',
-    'helper_float_truncl_s',
+    'helper_float_round_2008_l_s',
-    'helper_float_truncw_d',
+    'helper_float_round_2008_w_d',
-    'helper_float_truncw_s',
+    'helper_float_round_2008_w_s',
-    'helper_float_ceill_d',
+    'helper_float_trunc_l_d',
-    'helper_float_ceill_s',
+    'helper_float_trunc_l_s',
-    'helper_float_ceilw_d',
+    'helper_float_trunc_w_d',
-    'helper_float_ceilw_s',
+    'helper_float_trunc_w_s',
-    'helper_float_floorl_d',
+    'helper_float_trunc_2008_l_d',
-    'helper_float_floorl_s',
+    'helper_float_trunc_2008_l_s',
-    'helper_float_floorw_d',
+    'helper_float_trunc_2008_w_d',
-    'helper_float_floorw_s',
+    'helper_float_trunc_2008_w_s',
+    'helper_float_ceil_l_d',
+    'helper_float_ceil_l_s',
+    'helper_float_ceil_w_d',
+    'helper_float_ceil_w_s',
+    'helper_float_ceil_2008_l_d',
+    'helper_float_ceil_2008_l_s',
+    'helper_float_ceil_2008_w_d',
+    'helper_float_ceil_2008_w_s',
+    'helper_float_floor_l_d',
+    'helper_float_floor_l_s',
+    'helper_float_floor_w_d',
+    'helper_float_floor_w_s',
+    'helper_float_floor_2008_l_d',
+    'helper_float_floor_2008_l_s',
+    'helper_float_floor_2008_w_d',
+    'helper_float_floor_2008_w_s',
     'helper_float_abs_d',
     'helper_float_abs_s',
     'helper_float_abs_ps',

qemu/mips.h

@@ -3686,8 +3686,12 @@
 #define helper_float_cvtd_s helper_float_cvtd_s_mips
 #define helper_float_cvtd_w helper_float_cvtd_w_mips
 #define helper_float_cvtd_l helper_float_cvtd_l_mips
-#define helper_float_cvtl_d helper_float_cvtl_d_mips
+#define helper_float_cvt_l_d helper_float_cvt_l_d_mips
-#define helper_float_cvtl_s helper_float_cvtl_s_mips
+#define helper_float_cvt_l_s helper_float_cvt_l_s_mips
+#define helper_float_cvt_2008_l_d helper_float_cvt_2008_l_d_mips
+#define helper_float_cvt_2008_l_s helper_float_cvt_2008_l_s_mips
+#define helper_float_cvt_2008_w_d helper_float_cvt_2008_w_d_mips
+#define helper_float_cvt_2008_w_s helper_float_cvt_2008_w_s_mips
 #define helper_float_cvtps_pw helper_float_cvtps_pw_mips
 #define helper_float_cvtpw_ps helper_float_cvtpw_ps_mips
 #define helper_float_cvts_d helper_float_cvts_d_mips
@@ -3695,24 +3699,40 @@
 #define helper_float_cvts_l helper_float_cvts_l_mips
 #define helper_float_cvts_pl helper_float_cvts_pl_mips
 #define helper_float_cvts_pu helper_float_cvts_pu_mips
-#define helper_float_cvtw_s helper_float_cvtw_s_mips
+#define helper_float_cvt_w_s helper_float_cvt_w_s_mips
-#define helper_float_cvtw_d helper_float_cvtw_d_mips
+#define helper_float_cvt_w_d helper_float_cvt_w_d_mips
-#define helper_float_roundl_d helper_float_roundl_d_mips
+#define helper_float_round_l_d helper_float_round_l_d_mips
-#define helper_float_roundl_s helper_float_roundl_s_mips
+#define helper_float_round_l_s helper_float_round_l_s_mips
-#define helper_float_roundw_d helper_float_roundw_d_mips
+#define helper_float_round_w_d helper_float_round_w_d_mips
-#define helper_float_roundw_s helper_float_roundw_s_mips
+#define helper_float_round_w_s helper_float_round_w_s_mips
-#define helper_float_truncl_d helper_float_truncl_d_mips
+#define helper_float_round_2008_l_d helper_float_round_2008_l_d_mips
-#define helper_float_truncl_s helper_float_truncl_s_mips
+#define helper_float_round_2008_l_s helper_float_round_2008_l_s_mips
-#define helper_float_truncw_d helper_float_truncw_d_mips
+#define helper_float_round_2008_w_d helper_float_round_2008_w_d_mips
-#define helper_float_truncw_s helper_float_truncw_s_mips
+#define helper_float_round_2008_w_s helper_float_round_2008_w_s_mips
-#define helper_float_ceill_d helper_float_ceill_d_mips
+#define helper_float_trunc_l_d helper_float_trunc_l_d_mips
-#define helper_float_ceill_s helper_float_ceill_s_mips
+#define helper_float_trunc_l_s helper_float_trunc_l_s_mips
-#define helper_float_ceilw_d helper_float_ceilw_d_mips
+#define helper_float_trunc_w_d helper_float_trunc_w_d_mips
-#define helper_float_ceilw_s helper_float_ceilw_s_mips
+#define helper_float_trunc_w_s helper_float_trunc_w_s_mips
-#define helper_float_floorl_d helper_float_floorl_d_mips
+#define helper_float_trunc_2008_l_d helper_float_trunc_2008_l_d_mips
-#define helper_float_floorl_s helper_float_floorl_s_mips
+#define helper_float_trunc_2008_l_s helper_float_trunc_2008_l_s_mips
-#define helper_float_floorw_d helper_float_floorw_d_mips
+#define helper_float_trunc_2008_w_d helper_float_trunc_2008_w_d_mips
-#define helper_float_floorw_s helper_float_floorw_s_mips
+#define helper_float_trunc_2008_w_s helper_float_trunc_2008_w_s_mips
+#define helper_float_ceil_l_d helper_float_ceil_l_d_mips
+#define helper_float_ceil_l_s helper_float_ceil_l_s_mips
+#define helper_float_ceil_w_d helper_float_ceil_w_d_mips
+#define helper_float_ceil_w_s helper_float_ceil_w_s_mips
+#define helper_float_ceil_2008_l_d helper_float_ceil_2008_l_d_mips
+#define helper_float_ceil_2008_l_s helper_float_ceil_2008_l_s_mips
+#define helper_float_ceil_2008_w_d helper_float_ceil_2008_w_d_mips
+#define helper_float_ceil_2008_w_s helper_float_ceil_2008_w_s_mips
+#define helper_float_floor_l_d helper_float_floor_l_d_mips
+#define helper_float_floor_l_s helper_float_floor_l_s_mips
+#define helper_float_floor_w_d helper_float_floor_w_d_mips
+#define helper_float_floor_w_s helper_float_floor_w_s_mips
+#define helper_float_floor_2008_l_d helper_float_floor_2008_l_d_mips
+#define helper_float_floor_2008_l_s helper_float_floor_2008_l_s_mips
+#define helper_float_floor_2008_w_d helper_float_floor_2008_w_d_mips
+#define helper_float_floor_2008_w_s helper_float_floor_2008_w_s_mips
 #define helper_float_abs_d helper_float_abs_d_mips
 #define helper_float_abs_s helper_float_abs_s_mips
 #define helper_float_abs_ps helper_float_abs_ps_mips

qemu/mips64.h

@@ -3686,8 +3686,12 @@
 #define helper_float_cvtd_s helper_float_cvtd_s_mips64
 #define helper_float_cvtd_w helper_float_cvtd_w_mips64
 #define helper_float_cvtd_l helper_float_cvtd_l_mips64
-#define helper_float_cvtl_d helper_float_cvtl_d_mips64
+#define helper_float_cvt_l_d helper_float_cvt_l_d_mips64
-#define helper_float_cvtl_s helper_float_cvtl_s_mips64
+#define helper_float_cvt_l_s helper_float_cvt_l_s_mips64
+#define helper_float_cvt_2008_l_d helper_float_cvt_2008_l_d_mips64
+#define helper_float_cvt_2008_l_s helper_float_cvt_2008_l_s_mips64
+#define helper_float_cvt_2008_w_d helper_float_cvt_2008_w_d_mips64
+#define helper_float_cvt_2008_w_s helper_float_cvt_2008_w_s_mips64
 #define helper_float_cvtps_pw helper_float_cvtps_pw_mips64
 #define helper_float_cvtpw_ps helper_float_cvtpw_ps_mips64
 #define helper_float_cvts_d helper_float_cvts_d_mips64
@@ -3695,24 +3699,40 @@
 #define helper_float_cvts_l helper_float_cvts_l_mips64
 #define helper_float_cvts_pl helper_float_cvts_pl_mips64
 #define helper_float_cvts_pu helper_float_cvts_pu_mips64
-#define helper_float_cvtw_s helper_float_cvtw_s_mips64
+#define helper_float_cvt_w_s helper_float_cvt_w_s_mips64
-#define helper_float_cvtw_d helper_float_cvtw_d_mips64
+#define helper_float_cvt_w_d helper_float_cvt_w_d_mips64
-#define helper_float_roundl_d helper_float_roundl_d_mips64
+#define helper_float_round_l_d helper_float_round_l_d_mips64
-#define helper_float_roundl_s helper_float_roundl_s_mips64
+#define helper_float_round_l_s helper_float_round_l_s_mips64
-#define helper_float_roundw_d helper_float_roundw_d_mips64
+#define helper_float_round_w_d helper_float_round_w_d_mips64
-#define helper_float_roundw_s helper_float_roundw_s_mips64
+#define helper_float_round_w_s helper_float_round_w_s_mips64
-#define helper_float_truncl_d helper_float_truncl_d_mips64
+#define helper_float_round_2008_l_d helper_float_round_2008_l_d_mips64
-#define helper_float_truncl_s helper_float_truncl_s_mips64
+#define helper_float_round_2008_l_s helper_float_round_2008_l_s_mips64
-#define helper_float_truncw_d helper_float_truncw_d_mips64
+#define helper_float_round_2008_w_d helper_float_round_2008_w_d_mips64
-#define helper_float_truncw_s helper_float_truncw_s_mips64
+#define helper_float_round_2008_w_s helper_float_round_2008_w_s_mips64
-#define helper_float_ceill_d helper_float_ceill_d_mips64
+#define helper_float_trunc_l_d helper_float_trunc_l_d_mips64
-#define helper_float_ceill_s helper_float_ceill_s_mips64
+#define helper_float_trunc_l_s helper_float_trunc_l_s_mips64
-#define helper_float_ceilw_d helper_float_ceilw_d_mips64
+#define helper_float_trunc_w_d helper_float_trunc_w_d_mips64
-#define helper_float_ceilw_s helper_float_ceilw_s_mips64
+#define helper_float_trunc_w_s helper_float_trunc_w_s_mips64
-#define helper_float_floorl_d helper_float_floorl_d_mips64
+#define helper_float_trunc_2008_l_d helper_float_trunc_2008_l_d_mips64
-#define helper_float_floorl_s helper_float_floorl_s_mips64
+#define helper_float_trunc_2008_l_s helper_float_trunc_2008_l_s_mips64
-#define helper_float_floorw_d helper_float_floorw_d_mips64
+#define helper_float_trunc_2008_w_d helper_float_trunc_2008_w_d_mips64
-#define helper_float_floorw_s helper_float_floorw_s_mips64
+#define helper_float_trunc_2008_w_s helper_float_trunc_2008_w_s_mips64
+#define helper_float_ceil_l_d helper_float_ceil_l_d_mips64
+#define helper_float_ceil_l_s helper_float_ceil_l_s_mips64
+#define helper_float_ceil_w_d helper_float_ceil_w_d_mips64
+#define helper_float_ceil_w_s helper_float_ceil_w_s_mips64
+#define helper_float_ceil_2008_l_d helper_float_ceil_2008_l_d_mips64
+#define helper_float_ceil_2008_l_s helper_float_ceil_2008_l_s_mips64
+#define helper_float_ceil_2008_w_d helper_float_ceil_2008_w_d_mips64
+#define helper_float_ceil_2008_w_s helper_float_ceil_2008_w_s_mips64
+#define helper_float_floor_l_d helper_float_floor_l_d_mips64
+#define helper_float_floor_l_s helper_float_floor_l_s_mips64
+#define helper_float_floor_w_d helper_float_floor_w_d_mips64
+#define helper_float_floor_w_s helper_float_floor_w_s_mips64
+#define helper_float_floor_2008_l_d helper_float_floor_2008_l_d_mips64
+#define helper_float_floor_2008_l_s helper_float_floor_2008_l_s_mips64
+#define helper_float_floor_2008_w_d helper_float_floor_2008_w_d_mips64
+#define helper_float_floor_2008_w_s helper_float_floor_2008_w_s_mips64
 #define helper_float_abs_d helper_float_abs_d_mips64
 #define helper_float_abs_s helper_float_abs_s_mips64
 #define helper_float_abs_ps helper_float_abs_ps_mips64

qemu/mips64el.h

@@ -3686,8 +3686,12 @@
 #define helper_float_cvtd_s helper_float_cvtd_s_mips64el
 #define helper_float_cvtd_w helper_float_cvtd_w_mips64el
 #define helper_float_cvtd_l helper_float_cvtd_l_mips64el
-#define helper_float_cvtl_d helper_float_cvtl_d_mips64el
+#define helper_float_cvt_l_d helper_float_cvt_l_d_mips64el
-#define helper_float_cvtl_s helper_float_cvtl_s_mips64el
+#define helper_float_cvt_l_s helper_float_cvt_l_s_mips64el
+#define helper_float_cvt_2008_l_d helper_float_cvt_2008_l_d_mips64el
+#define helper_float_cvt_2008_l_s helper_float_cvt_2008_l_s_mips64el
+#define helper_float_cvt_2008_w_d helper_float_cvt_2008_w_d_mips64el
+#define helper_float_cvt_2008_w_s helper_float_cvt_2008_w_s_mips64el
 #define helper_float_cvtps_pw helper_float_cvtps_pw_mips64el
 #define helper_float_cvtpw_ps helper_float_cvtpw_ps_mips64el
 #define helper_float_cvts_d helper_float_cvts_d_mips64el
@@ -3695,24 +3699,40 @@
 #define helper_float_cvts_l helper_float_cvts_l_mips64el
 #define helper_float_cvts_pl helper_float_cvts_pl_mips64el
 #define helper_float_cvts_pu helper_float_cvts_pu_mips64el
-#define helper_float_cvtw_s helper_float_cvtw_s_mips64el
+#define helper_float_cvt_w_s helper_float_cvt_w_s_mips64el
-#define helper_float_cvtw_d helper_float_cvtw_d_mips64el
+#define helper_float_cvt_w_d helper_float_cvt_w_d_mips64el
-#define helper_float_roundl_d helper_float_roundl_d_mips64el
+#define helper_float_round_l_d helper_float_round_l_d_mips64el
-#define helper_float_roundl_s helper_float_roundl_s_mips64el
+#define helper_float_round_l_s helper_float_round_l_s_mips64el
-#define helper_float_roundw_d helper_float_roundw_d_mips64el
+#define helper_float_round_w_d helper_float_round_w_d_mips64el
-#define helper_float_roundw_s helper_float_roundw_s_mips64el
+#define helper_float_round_w_s helper_float_round_w_s_mips64el
-#define helper_float_truncl_d helper_float_truncl_d_mips64el
+#define helper_float_round_2008_l_d helper_float_round_2008_l_d_mips64el
-#define helper_float_truncl_s helper_float_truncl_s_mips64el
+#define helper_float_round_2008_l_s helper_float_round_2008_l_s_mips64el
-#define helper_float_truncw_d helper_float_truncw_d_mips64el
+#define helper_float_round_2008_w_d helper_float_round_2008_w_d_mips64el
-#define helper_float_truncw_s helper_float_truncw_s_mips64el
+#define helper_float_round_2008_w_s helper_float_round_2008_w_s_mips64el
-#define helper_float_ceill_d helper_float_ceill_d_mips64el
+#define helper_float_trunc_l_d helper_float_trunc_l_d_mips64el
-#define helper_float_ceill_s helper_float_ceill_s_mips64el
+#define helper_float_trunc_l_s helper_float_trunc_l_s_mips64el
-#define helper_float_ceilw_d helper_float_ceilw_d_mips64el
+#define helper_float_trunc_w_d helper_float_trunc_w_d_mips64el
-#define helper_float_ceilw_s helper_float_ceilw_s_mips64el
+#define helper_float_trunc_w_s helper_float_trunc_w_s_mips64el
-#define helper_float_floorl_d helper_float_floorl_d_mips64el
+#define helper_float_trunc_2008_l_d helper_float_trunc_2008_l_d_mips64el
-#define helper_float_floorl_s helper_float_floorl_s_mips64el
+#define helper_float_trunc_2008_l_s helper_float_trunc_2008_l_s_mips64el
-#define helper_float_floorw_d helper_float_floorw_d_mips64el
+#define helper_float_trunc_2008_w_d helper_float_trunc_2008_w_d_mips64el
-#define helper_float_floorw_s helper_float_floorw_s_mips64el
+#define helper_float_trunc_2008_w_s helper_float_trunc_2008_w_s_mips64el
+#define helper_float_ceil_l_d helper_float_ceil_l_d_mips64el
+#define helper_float_ceil_l_s helper_float_ceil_l_s_mips64el
+#define helper_float_ceil_w_d helper_float_ceil_w_d_mips64el
+#define helper_float_ceil_w_s helper_float_ceil_w_s_mips64el
+#define helper_float_ceil_2008_l_d helper_float_ceil_2008_l_d_mips64el
+#define helper_float_ceil_2008_l_s helper_float_ceil_2008_l_s_mips64el
+#define helper_float_ceil_2008_w_d helper_float_ceil_2008_w_d_mips64el
+#define helper_float_ceil_2008_w_s helper_float_ceil_2008_w_s_mips64el
+#define helper_float_floor_l_d helper_float_floor_l_d_mips64el
+#define helper_float_floor_l_s helper_float_floor_l_s_mips64el
+#define helper_float_floor_w_d helper_float_floor_w_d_mips64el
+#define helper_float_floor_w_s helper_float_floor_w_s_mips64el
+#define helper_float_floor_2008_l_d helper_float_floor_2008_l_d_mips64el
+#define helper_float_floor_2008_l_s helper_float_floor_2008_l_s_mips64el
+#define helper_float_floor_2008_w_d helper_float_floor_2008_w_d_mips64el
+#define helper_float_floor_2008_w_s helper_float_floor_2008_w_s_mips64el
 #define helper_float_abs_d helper_float_abs_d_mips64el
 #define helper_float_abs_s helper_float_abs_s_mips64el
 #define helper_float_abs_ps helper_float_abs_ps_mips64el

qemu/mipsel.h

@@ -3686,8 +3686,12 @@
 #define helper_float_cvtd_s helper_float_cvtd_s_mipsel
 #define helper_float_cvtd_w helper_float_cvtd_w_mipsel
 #define helper_float_cvtd_l helper_float_cvtd_l_mipsel
-#define helper_float_cvtl_d helper_float_cvtl_d_mipsel
+#define helper_float_cvt_l_d helper_float_cvt_l_d_mipsel
-#define helper_float_cvtl_s helper_float_cvtl_s_mipsel
+#define helper_float_cvt_l_s helper_float_cvt_l_s_mipsel
+#define helper_float_cvt_2008_l_d helper_float_cvt_2008_l_d_mipsel
+#define helper_float_cvt_2008_l_s helper_float_cvt_2008_l_s_mipsel
+#define helper_float_cvt_2008_w_d helper_float_cvt_2008_w_d_mipsel
+#define helper_float_cvt_2008_w_s helper_float_cvt_2008_w_s_mipsel
 #define helper_float_cvtps_pw helper_float_cvtps_pw_mipsel
 #define helper_float_cvtpw_ps helper_float_cvtpw_ps_mipsel
 #define helper_float_cvts_d helper_float_cvts_d_mipsel
@@ -3695,24 +3699,40 @@
 #define helper_float_cvts_l helper_float_cvts_l_mipsel
 #define helper_float_cvts_pl helper_float_cvts_pl_mipsel
 #define helper_float_cvts_pu helper_float_cvts_pu_mipsel
-#define helper_float_cvtw_s helper_float_cvtw_s_mipsel
+#define helper_float_cvt_w_s helper_float_cvt_w_s_mipsel
-#define helper_float_cvtw_d helper_float_cvtw_d_mipsel
+#define helper_float_cvt_w_d helper_float_cvt_w_d_mipsel
-#define helper_float_roundl_d helper_float_roundl_d_mipsel
+#define helper_float_round_l_d helper_float_round_l_d_mipsel
-#define helper_float_roundl_s helper_float_roundl_s_mipsel
+#define helper_float_round_l_s helper_float_round_l_s_mipsel
-#define helper_float_roundw_d helper_float_roundw_d_mipsel
+#define helper_float_round_w_d helper_float_round_w_d_mipsel
-#define helper_float_roundw_s helper_float_roundw_s_mipsel
+#define helper_float_round_w_s helper_float_round_w_s_mipsel
-#define helper_float_truncl_d helper_float_truncl_d_mipsel
+#define helper_float_round_2008_l_d helper_float_round_2008_l_d_mipsel
-#define helper_float_truncl_s helper_float_truncl_s_mipsel
+#define helper_float_round_2008_l_s helper_float_round_2008_l_s_mipsel
-#define helper_float_truncw_d helper_float_truncw_d_mipsel
+#define helper_float_round_2008_w_d helper_float_round_2008_w_d_mipsel
-#define helper_float_truncw_s helper_float_truncw_s_mipsel
+#define helper_float_round_2008_w_s helper_float_round_2008_w_s_mipsel
-#define helper_float_ceill_d helper_float_ceill_d_mipsel
+#define helper_float_trunc_l_d helper_float_trunc_l_d_mipsel
-#define helper_float_ceill_s helper_float_ceill_s_mipsel
+#define helper_float_trunc_l_s helper_float_trunc_l_s_mipsel
-#define helper_float_ceilw_d helper_float_ceilw_d_mipsel
+#define helper_float_trunc_w_d helper_float_trunc_w_d_mipsel
-#define helper_float_ceilw_s helper_float_ceilw_s_mipsel
+#define helper_float_trunc_w_s helper_float_trunc_w_s_mipsel
-#define helper_float_floorl_d helper_float_floorl_d_mipsel
+#define helper_float_trunc_2008_l_d helper_float_trunc_2008_l_d_mipsel
-#define helper_float_floorl_s helper_float_floorl_s_mipsel
+#define helper_float_trunc_2008_l_s helper_float_trunc_2008_l_s_mipsel
-#define helper_float_floorw_d helper_float_floorw_d_mipsel
+#define helper_float_trunc_2008_w_d helper_float_trunc_2008_w_d_mipsel
-#define helper_float_floorw_s helper_float_floorw_s_mipsel
+#define helper_float_trunc_2008_w_s helper_float_trunc_2008_w_s_mipsel
+#define helper_float_ceil_l_d helper_float_ceil_l_d_mipsel
+#define helper_float_ceil_l_s helper_float_ceil_l_s_mipsel
+#define helper_float_ceil_w_d helper_float_ceil_w_d_mipsel
+#define helper_float_ceil_w_s helper_float_ceil_w_s_mipsel
+#define helper_float_ceil_2008_l_d helper_float_ceil_2008_l_d_mipsel
+#define helper_float_ceil_2008_l_s helper_float_ceil_2008_l_s_mipsel
+#define helper_float_ceil_2008_w_d helper_float_ceil_2008_w_d_mipsel
+#define helper_float_ceil_2008_w_s helper_float_ceil_2008_w_s_mipsel
+#define helper_float_floor_l_d helper_float_floor_l_d_mipsel
+#define helper_float_floor_l_s helper_float_floor_l_s_mipsel
+#define helper_float_floor_w_d helper_float_floor_w_d_mipsel
+#define helper_float_floor_w_s helper_float_floor_w_s_mipsel
+#define helper_float_floor_2008_l_d helper_float_floor_2008_l_d_mipsel
+#define helper_float_floor_2008_l_s helper_float_floor_2008_l_s_mipsel
+#define helper_float_floor_2008_w_d helper_float_floor_2008_w_d_mipsel
+#define helper_float_floor_2008_w_s helper_float_floor_2008_w_s_mipsel
 #define helper_float_abs_d helper_float_abs_d_mipsel
 #define helper_float_abs_s helper_float_abs_s_mipsel
 #define helper_float_abs_ps helper_float_abs_ps_mipsel

qemu/target-mips/helper.h

@@ -206,8 +206,6 @@ DEF_HELPER_4(ctc1, void, env, tl, i32, i32)
 DEF_HELPER_2(float_cvtd_s, i64, env, i32)
 DEF_HELPER_2(float_cvtd_w, i64, env, i32)
 DEF_HELPER_2(float_cvtd_l, i64, env, i64)
-DEF_HELPER_2(float_cvtl_d, i64, env, i64)
-DEF_HELPER_2(float_cvtl_s, i64, env, i32)
 DEF_HELPER_2(float_cvtps_pw, i64, env, i64)
 DEF_HELPER_2(float_cvtpw_ps, i64, env, i64)
 DEF_HELPER_2(float_cvts_d, i32, env, i64)
@@ -215,8 +213,6 @@ DEF_HELPER_2(float_cvts_w, i32, env, i32)
 DEF_HELPER_2(float_cvts_l, i32, env, i64)
 DEF_HELPER_2(float_cvts_pl, i32, env, i32)
 DEF_HELPER_2(float_cvts_pu, i32, env, i32)
-DEF_HELPER_2(float_cvtw_s, i32, env, i32)
-DEF_HELPER_2(float_cvtw_d, i32, env, i64)
 
 DEF_HELPER_3(float_addr_ps, i64, env, i64, i64)
 DEF_HELPER_3(float_mulr_ps, i64, env, i64, i64)
@@ -241,14 +237,20 @@ FOP_PROTO(mina)
 #undef FOP_PROTO
 
 #define FOP_PROTO(op)                            \
-DEF_HELPER_2(float_ ## op ## l_s, i64, env, i32) \
+DEF_HELPER_2(float_ ## op ## _l_s, i64, env, i32) \
-DEF_HELPER_2(float_ ## op ## l_d, i64, env, i64) \
+DEF_HELPER_2(float_ ## op ## _l_d, i64, env, i64) \
-DEF_HELPER_2(float_ ## op ## w_s, i32, env, i32) \
+DEF_HELPER_2(float_ ## op ## _w_s, i32, env, i32) \
-DEF_HELPER_2(float_ ## op ## w_d, i32, env, i64)
+DEF_HELPER_2(float_ ## op ## _w_d, i32, env, i64)
+FOP_PROTO(cvt)
 FOP_PROTO(round)
 FOP_PROTO(trunc)
 FOP_PROTO(ceil)
 FOP_PROTO(floor)
+FOP_PROTO(cvt_2008)
+FOP_PROTO(round_2008)
+FOP_PROTO(trunc_2008)
+FOP_PROTO(ceil_2008)
+FOP_PROTO(floor_2008)
 #undef FOP_PROTO
 
 #define FOP_PROTO(op)                            \

qemu/target-mips/op_helper.c

@@ -2432,6 +2432,7 @@ void mips_cpu_unassigned_access(CPUState *cs, hwaddr addr,
 
 #define FLOAT_TWO32 make_float32(1 << 30)
 #define FLOAT_TWO64 make_float64(1ULL << 62)
+
 #define FP_TO_INT32_OVERFLOW 0x7fffffff
 #define FP_TO_INT64_OVERFLOW 0x7fffffffffffffffULL
 
@@ -2667,7 +2668,7 @@ uint64_t helper_float_cvtd_l(CPUMIPSState *env, uint64_t dt0)
     return fdt2;
 }
 
-uint64_t helper_float_cvtl_d(CPUMIPSState *env, uint64_t fdt0)
+uint64_t helper_float_cvt_l_d(CPUMIPSState *env, uint64_t fdt0)
 {
     uint64_t dt2;
 
@@ -2680,7 +2681,7 @@ uint64_t helper_float_cvtl_d(CPUMIPSState *env, uint64_t fdt0)
     return dt2;
 }
 
-uint64_t helper_float_cvtl_s(CPUMIPSState *env, uint32_t fst0)
+uint64_t helper_float_cvt_l_s(CPUMIPSState *env, uint32_t fst0)
 {
     uint64_t dt2;
 
@@ -2775,7 +2776,7 @@ uint32_t helper_float_cvts_pu(CPUMIPSState *env, uint32_t wth0)
     return wt2;
 }
 
-uint32_t helper_float_cvtw_s(CPUMIPSState *env, uint32_t fst0)
+uint32_t helper_float_cvt_w_s(CPUMIPSState *env, uint32_t fst0)
 {
     uint32_t wt2;
 
@@ -2788,7 +2789,7 @@ uint32_t helper_float_cvtw_s(CPUMIPSState *env, uint32_t fst0)
     return wt2;
 }
 
-uint32_t helper_float_cvtw_d(CPUMIPSState *env, uint64_t fdt0)
+uint32_t helper_float_cvt_w_d(CPUMIPSState *env, uint64_t fdt0)
 {
     uint32_t wt2;
 
@@ -2801,7 +2802,7 @@ uint32_t helper_float_cvtw_d(CPUMIPSState *env, uint64_t fdt0)
     return wt2;
 }
 
-uint64_t helper_float_roundl_d(CPUMIPSState *env, uint64_t fdt0)
+uint64_t helper_float_round_l_d(CPUMIPSState *env, uint64_t fdt0)
 {
     uint64_t dt2;
 
@@ -2816,7 +2817,7 @@ uint64_t helper_float_roundl_d(CPUMIPSState *env, uint64_t fdt0)
     return dt2;
 }
 
-uint64_t helper_float_roundl_s(CPUMIPSState *env, uint32_t fst0)
+uint64_t helper_float_round_l_s(CPUMIPSState *env, uint32_t fst0)
 {
     uint64_t dt2;
 
@@ -2831,7 +2832,7 @@ uint64_t helper_float_roundl_s(CPUMIPSState *env, uint32_t fst0)
     return dt2;
 }
 
-uint32_t helper_float_roundw_d(CPUMIPSState *env, uint64_t fdt0)
+uint32_t helper_float_round_w_d(CPUMIPSState *env, uint64_t fdt0)
 {
     uint32_t wt2;
 
@@ -2846,7 +2847,7 @@ uint32_t helper_float_roundw_d(CPUMIPSState *env, uint64_t fdt0)
     return wt2;
 }
 
-uint32_t helper_float_roundw_s(CPUMIPSState *env, uint32_t fst0)
+uint32_t helper_float_round_w_s(CPUMIPSState *env, uint32_t fst0)
 {
     uint32_t wt2;
 
@@ -2861,7 +2862,7 @@ uint32_t helper_float_roundw_s(CPUMIPSState *env, uint32_t fst0)
     return wt2;
 }
 
-uint64_t helper_float_truncl_d(CPUMIPSState *env, uint64_t fdt0)
+uint64_t helper_float_trunc_l_d(CPUMIPSState *env, uint64_t fdt0)
 {
     uint64_t dt2;
 
@@ -2874,7 +2875,7 @@ uint64_t helper_float_truncl_d(CPUMIPSState *env, uint64_t fdt0)
     return dt2;
 }
 
-uint64_t helper_float_truncl_s(CPUMIPSState *env, uint32_t fst0)
+uint64_t helper_float_trunc_l_s(CPUMIPSState *env, uint32_t fst0)
 {
     uint64_t dt2;
 
@@ -2887,7 +2888,7 @@ uint64_t helper_float_truncl_s(CPUMIPSState *env, uint32_t fst0)
     return dt2;
 }
 
-uint32_t helper_float_truncw_d(CPUMIPSState *env, uint64_t fdt0)
+uint32_t helper_float_trunc_w_d(CPUMIPSState *env, uint64_t fdt0)
 {
     uint32_t wt2;
 
@@ -2900,7 +2901,7 @@ uint32_t helper_float_truncw_d(CPUMIPSState *env, uint64_t fdt0)
     return wt2;
 }
 
-uint32_t helper_float_truncw_s(CPUMIPSState *env, uint32_t fst0)
+uint32_t helper_float_trunc_w_s(CPUMIPSState *env, uint32_t fst0)
 {
     uint32_t wt2;
 
@@ -2913,7 +2914,7 @@ uint32_t helper_float_truncw_s(CPUMIPSState *env, uint32_t fst0)
     return wt2;
 }
 
-uint64_t helper_float_ceill_d(CPUMIPSState *env, uint64_t fdt0)
+uint64_t helper_float_ceil_l_d(CPUMIPSState *env, uint64_t fdt0)
 {
     uint64_t dt2;
 
@@ -2928,7 +2929,7 @@ uint64_t helper_float_ceill_d(CPUMIPSState *env, uint64_t fdt0)
     return dt2;
 }
 
-uint64_t helper_float_ceill_s(CPUMIPSState *env, uint32_t fst0)
+uint64_t helper_float_ceil_l_s(CPUMIPSState *env, uint32_t fst0)
 {
     uint64_t dt2;
 
@@ -2943,7 +2944,7 @@ uint64_t helper_float_ceill_s(CPUMIPSState *env, uint32_t fst0)
     return dt2;
 }
 
-uint32_t helper_float_ceilw_d(CPUMIPSState *env, uint64_t fdt0)
+uint32_t helper_float_ceil_w_d(CPUMIPSState *env, uint64_t fdt0)
 {
     uint32_t wt2;
 
@@ -2958,7 +2959,7 @@ uint32_t helper_float_ceilw_d(CPUMIPSState *env, uint64_t fdt0)
     return wt2;
 }
 
-uint32_t helper_float_ceilw_s(CPUMIPSState *env, uint32_t fst0)
+uint32_t helper_float_ceil_w_s(CPUMIPSState *env, uint32_t fst0)
 {
     uint32_t wt2;
 
@@ -2973,7 +2974,7 @@ uint32_t helper_float_ceilw_s(CPUMIPSState *env, uint32_t fst0)
     return wt2;
 }
 
-uint64_t helper_float_floorl_d(CPUMIPSState *env, uint64_t fdt0)
+uint64_t helper_float_floor_l_d(CPUMIPSState *env, uint64_t fdt0)
 {
     uint64_t dt2;
 
@@ -2988,7 +2989,7 @@ uint64_t helper_float_floorl_d(CPUMIPSState *env, uint64_t fdt0)
     return dt2;
 }
 
-uint64_t helper_float_floorl_s(CPUMIPSState *env, uint32_t fst0)
+uint64_t helper_float_floor_l_s(CPUMIPSState *env, uint32_t fst0)
 {
     uint64_t dt2;
 
@@ -3003,7 +3004,7 @@ uint64_t helper_float_floorl_s(CPUMIPSState *env, uint32_t fst0)
     return dt2;
 }
 
-uint32_t helper_float_floorw_d(CPUMIPSState *env, uint64_t fdt0)
+uint32_t helper_float_floor_w_d(CPUMIPSState *env, uint64_t fdt0)
 {
     uint32_t wt2;
 
@@ -3018,7 +3019,7 @@ uint32_t helper_float_floorw_d(CPUMIPSState *env, uint64_t fdt0)
     return wt2;
 }
 
-uint32_t helper_float_floorw_s(CPUMIPSState *env, uint32_t fst0)
+uint32_t helper_float_floor_w_s(CPUMIPSState *env, uint32_t fst0)
 {
     uint32_t wt2;
 
@@ -3033,6 +3034,334 @@ uint32_t helper_float_floorw_s(CPUMIPSState *env, uint32_t fst0)
     return wt2;
 }
 
+uint64_t helper_float_cvt_2008_l_d(CPUMIPSState *env, uint64_t fdt0)
+{
+    uint64_t dt2;
+
+    dt2 = float64_to_int64(fdt0, &env->active_fpu.fp_status);
+    if (get_float_exception_flags(&env->active_fpu.fp_status)
+            & float_flag_invalid) {
+        if (float64_is_any_nan(fdt0)) {
+            dt2 = 0;
+        }
+    }
+    update_fcr31(env, GETPC());
+    return dt2;
+}
+
+uint64_t helper_float_cvt_2008_l_s(CPUMIPSState *env, uint32_t fst0)
+{
+    uint64_t dt2;
+
+    dt2 = float32_to_int64(fst0, &env->active_fpu.fp_status);
+    if (get_float_exception_flags(&env->active_fpu.fp_status)
+            & float_flag_invalid) {
+        if (float32_is_any_nan(fst0)) {
+            dt2 = 0;
+        }
+    }
+    update_fcr31(env, GETPC());
+    return dt2;
+}
+
+uint32_t helper_float_cvt_2008_w_d(CPUMIPSState *env, uint64_t fdt0)
+{
+    uint32_t wt2;
+
+    wt2 = float64_to_int32(fdt0, &env->active_fpu.fp_status);
+    if (get_float_exception_flags(&env->active_fpu.fp_status)
+            & float_flag_invalid) {
+        if (float64_is_any_nan(fdt0)) {
+            wt2 = 0;
+        }
+    }
+    update_fcr31(env, GETPC());
+    return wt2;
+}
+
+uint32_t helper_float_cvt_2008_w_s(CPUMIPSState *env, uint32_t fst0)
+{
+    uint32_t wt2;
+
+    wt2 = float32_to_int32(fst0, &env->active_fpu.fp_status);
+    if (get_float_exception_flags(&env->active_fpu.fp_status)
+            & float_flag_invalid) {
+        if (float32_is_any_nan(fst0)) {
+            wt2 = 0;
+        }
+    }
+    update_fcr31(env, GETPC());
+    return wt2;
+}
+
+uint64_t helper_float_round_2008_l_d(CPUMIPSState *env, uint64_t fdt0)
+{
+    uint64_t dt2;
+
+    set_float_rounding_mode(float_round_nearest_even,
+            &env->active_fpu.fp_status);
+    dt2 = float64_to_int64(fdt0, &env->active_fpu.fp_status);
+    restore_rounding_mode(env);
+    if (get_float_exception_flags(&env->active_fpu.fp_status)
+            & float_flag_invalid) {
+        if (float64_is_any_nan(fdt0)) {
+            dt2 = 0;
+        }
+    }
+    update_fcr31(env, GETPC());
+    return dt2;
+}
+
+uint64_t helper_float_round_2008_l_s(CPUMIPSState *env, uint32_t fst0)
+{
+    uint64_t dt2;
+
+    set_float_rounding_mode(float_round_nearest_even,
+            &env->active_fpu.fp_status);
+    dt2 = float32_to_int64(fst0, &env->active_fpu.fp_status);
+    restore_rounding_mode(env);
+    if (get_float_exception_flags(&env->active_fpu.fp_status)
+            & float_flag_invalid) {
+        if (float32_is_any_nan(fst0)) {
+            dt2 = 0;
+        }
+    }
+    update_fcr31(env, GETPC());
+    return dt2;
+}
+
+uint32_t helper_float_round_2008_w_d(CPUMIPSState *env, uint64_t fdt0)
+{
+    uint32_t wt2;
+
+    set_float_rounding_mode(float_round_nearest_even,
+            &env->active_fpu.fp_status);
+    wt2 = float64_to_int32(fdt0, &env->active_fpu.fp_status);
+    restore_rounding_mode(env);
+    if (get_float_exception_flags(&env->active_fpu.fp_status)
+            & float_flag_invalid) {
+        if (float64_is_any_nan(fdt0)) {
+            wt2 = 0;
+        }
+    }
+    update_fcr31(env, GETPC());
+    return wt2;
+}
+
+uint32_t helper_float_round_2008_w_s(CPUMIPSState *env, uint32_t fst0)
+{
+    uint32_t wt2;
+
+    set_float_rounding_mode(float_round_nearest_even,
+            &env->active_fpu.fp_status);
+    wt2 = float32_to_int32(fst0, &env->active_fpu.fp_status);
+    restore_rounding_mode(env);
+    if (get_float_exception_flags(&env->active_fpu.fp_status)
+            & float_flag_invalid) {
+        if (float32_is_any_nan(fst0)) {
+            wt2 = 0;
+        }
+    }
+    update_fcr31(env, GETPC());
+    return wt2;
+}
+
+uint64_t helper_float_trunc_2008_l_d(CPUMIPSState *env, uint64_t fdt0)
+{
+    uint64_t dt2;
+
+    dt2 = float64_to_int64_round_to_zero(fdt0, &env->active_fpu.fp_status);
+    if (get_float_exception_flags(&env->active_fpu.fp_status)
+            & float_flag_invalid) {
+        if (float64_is_any_nan(fdt0)) {
+            dt2 = 0;
+        }
+    }
+    update_fcr31(env, GETPC());
+    return dt2;
+}
+
+uint64_t helper_float_trunc_2008_l_s(CPUMIPSState *env, uint32_t fst0)
+{
+    uint64_t dt2;
+
+    dt2 = float32_to_int64_round_to_zero(fst0, &env->active_fpu.fp_status);
+    if (get_float_exception_flags(&env->active_fpu.fp_status)
+            & float_flag_invalid) {
+        if (float32_is_any_nan(fst0)) {
+            dt2 = 0;
+        }
+    }
+    update_fcr31(env, GETPC());
+    return dt2;
+}
+
+uint32_t helper_float_trunc_2008_w_d(CPUMIPSState *env, uint64_t fdt0)
+{
+    uint32_t wt2;
+
+    wt2 = float64_to_int32_round_to_zero(fdt0, &env->active_fpu.fp_status);
+    if (get_float_exception_flags(&env->active_fpu.fp_status)
+            & float_flag_invalid) {
+        if (float64_is_any_nan(fdt0)) {
+            wt2 = 0;
+        }
+    }
+    update_fcr31(env, GETPC());
+    return wt2;
+}
+
+uint32_t helper_float_trunc_2008_w_s(CPUMIPSState *env, uint32_t fst0)
+{
+    uint32_t wt2;
+
+    wt2 = float32_to_int32_round_to_zero(fst0, &env->active_fpu.fp_status);
+    if (get_float_exception_flags(&env->active_fpu.fp_status)
+            & float_flag_invalid) {
+        if (float32_is_any_nan(fst0)) {
+            wt2 = 0;
+        }
+    }
+    update_fcr31(env, GETPC());
+    return wt2;
+}
+
+uint64_t helper_float_ceil_2008_l_d(CPUMIPSState *env, uint64_t fdt0)
+{
+    uint64_t dt2;
+
+    set_float_rounding_mode(float_round_up, &env->active_fpu.fp_status);
+    dt2 = float64_to_int64(fdt0, &env->active_fpu.fp_status);
+    restore_rounding_mode(env);
+    if (get_float_exception_flags(&env->active_fpu.fp_status)
+            & float_flag_invalid) {
+        if (float64_is_any_nan(fdt0)) {
+            dt2 = 0;
+        }
+    }
+    update_fcr31(env, GETPC());
+    return dt2;
+}
+
+uint64_t helper_float_ceil_2008_l_s(CPUMIPSState *env, uint32_t fst0)
+{
+    uint64_t dt2;
+
+    set_float_rounding_mode(float_round_up, &env->active_fpu.fp_status);
+    dt2 = float32_to_int64(fst0, &env->active_fpu.fp_status);
+    restore_rounding_mode(env);
+    if (get_float_exception_flags(&env->active_fpu.fp_status)
+            & float_flag_invalid) {
+        if (float32_is_any_nan(fst0)) {
+            dt2 = 0;
+        }
+    }
+    update_fcr31(env, GETPC());
+    return dt2;
+}
+
+uint32_t helper_float_ceil_2008_w_d(CPUMIPSState *env, uint64_t fdt0)
+{
+    uint32_t wt2;
+
+    set_float_rounding_mode(float_round_up, &env->active_fpu.fp_status);
+    wt2 = float64_to_int32(fdt0, &env->active_fpu.fp_status);
+    restore_rounding_mode(env);
+    if (get_float_exception_flags(&env->active_fpu.fp_status)
+            & float_flag_invalid) {
+        if (float64_is_any_nan(fdt0)) {
+            wt2 = 0;
+        }
+    }
+    update_fcr31(env, GETPC());
+    return wt2;
+}
+
+uint32_t helper_float_ceil_2008_w_s(CPUMIPSState *env, uint32_t fst0)
+{
+    uint32_t wt2;
+
+    set_float_rounding_mode(float_round_up, &env->active_fpu.fp_status);
+    wt2 = float32_to_int32(fst0, &env->active_fpu.fp_status);
+    restore_rounding_mode(env);
+    if (get_float_exception_flags(&env->active_fpu.fp_status)
+            & float_flag_invalid) {
+        if (float32_is_any_nan(fst0)) {
+            wt2 = 0;
+        }
+    }
+    update_fcr31(env, GETPC());
+    return wt2;
+}
+
+uint64_t helper_float_floor_2008_l_d(CPUMIPSState *env, uint64_t fdt0)
+{
+    uint64_t dt2;
+
+    set_float_rounding_mode(float_round_down, &env->active_fpu.fp_status);
+    dt2 = float64_to_int64(fdt0, &env->active_fpu.fp_status);
+    restore_rounding_mode(env);
+    if (get_float_exception_flags(&env->active_fpu.fp_status)
+            & float_flag_invalid) {
+        if (float64_is_any_nan(fdt0)) {
+            dt2 = 0;
+        }
+    }
+    update_fcr31(env, GETPC());
+    return dt2;
+}
+
+uint64_t helper_float_floor_2008_l_s(CPUMIPSState *env, uint32_t fst0)
+{
+    uint64_t dt2;
+
+    set_float_rounding_mode(float_round_down, &env->active_fpu.fp_status);
+    dt2 = float32_to_int64(fst0, &env->active_fpu.fp_status);
+    restore_rounding_mode(env);
+    if (get_float_exception_flags(&env->active_fpu.fp_status)
+            & float_flag_invalid) {
+        if (float32_is_any_nan(fst0)) {
+            dt2 = 0;
+        }
+    }
+    update_fcr31(env, GETPC());
+    return dt2;
+}
+
+uint32_t helper_float_floor_2008_w_d(CPUMIPSState *env, uint64_t fdt0)
+{
+    uint32_t wt2;
+
+    set_float_rounding_mode(float_round_down, &env->active_fpu.fp_status);
+    wt2 = float64_to_int32(fdt0, &env->active_fpu.fp_status);
+    restore_rounding_mode(env);
+    if (get_float_exception_flags(&env->active_fpu.fp_status)
+            & float_flag_invalid) {
+        if (float64_is_any_nan(fdt0)) {
+            wt2 = 0;
+        }
+    }
+    update_fcr31(env, GETPC());
+    return wt2;
+}
+
+uint32_t helper_float_floor_2008_w_s(CPUMIPSState *env, uint32_t fst0)
+{
+    uint32_t wt2;
+
+    set_float_rounding_mode(float_round_down, &env->active_fpu.fp_status);
+    wt2 = float32_to_int32(fst0, &env->active_fpu.fp_status);
+    restore_rounding_mode(env);
+    if (get_float_exception_flags(&env->active_fpu.fp_status)
+            & float_flag_invalid) {
+        if (float32_is_any_nan(fst0)) {
+            wt2 = 0;
+        }
+    }
+    update_fcr31(env, GETPC());
+    return wt2;
+}
+
 /* unary operations, not modifying fp status  */
 #define FLOAT_UNOP(name)                                       \
 uint64_t helper_float_ ## name ## _d(uint64_t fdt0)                \

qemu/target-mips/translate.c

@@ -1420,6 +1420,7 @@ typedef struct DisasContext {
     bool vp;
     bool cmgcr;
     bool mrp;
+    bool nan2008;
     bool abs2008;
     // Unicorn engine
     struct uc_struct *uc;
@@ -9000,7 +9001,11 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
             TCGv_i64 fp64 = tcg_temp_new_i64(tcg_ctx);
 
             gen_load_fpr32(ctx, fp32, fs);
-            gen_helper_float_roundl_s(tcg_ctx, fp64, tcg_ctx->cpu_env, fp32);
+            if (ctx->nan2008) {
+                gen_helper_float_round_2008_l_s(tcg_ctx, fp64, tcg_ctx->cpu_env, fp32);
+            } else {
+                gen_helper_float_round_l_s(tcg_ctx, fp64, tcg_ctx->cpu_env, fp32);
+            }
             tcg_temp_free_i32(tcg_ctx, fp32);
             gen_store_fpr64(ctx, fp64, fd);
             tcg_temp_free_i64(tcg_ctx, fp64);
@@ -9013,7 +9018,11 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
             TCGv_i64 fp64 = tcg_temp_new_i64(tcg_ctx);
 
             gen_load_fpr32(ctx, fp32, fs);
-            gen_helper_float_truncl_s(tcg_ctx, fp64, tcg_ctx->cpu_env, fp32);
+            if (ctx->nan2008) {
+                gen_helper_float_trunc_2008_l_s(tcg_ctx, fp64, tcg_ctx->cpu_env, fp32);
+            } else {
+                gen_helper_float_trunc_l_s(tcg_ctx, fp64, tcg_ctx->cpu_env, fp32);
+            }
             tcg_temp_free_i32(tcg_ctx, fp32);
             gen_store_fpr64(ctx, fp64, fd);
             tcg_temp_free_i64(tcg_ctx, fp64);
@@ -9026,7 +9035,11 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
             TCGv_i64 fp64 = tcg_temp_new_i64(tcg_ctx);
 
             gen_load_fpr32(ctx, fp32, fs);
-            gen_helper_float_ceill_s(tcg_ctx, fp64, tcg_ctx->cpu_env, fp32);
+            if (ctx->nan2008) {
+                gen_helper_float_ceil_2008_l_s(tcg_ctx, fp64, tcg_ctx->cpu_env, fp32);
+            } else {
+                gen_helper_float_ceil_l_s(tcg_ctx, fp64, tcg_ctx->cpu_env, fp32);
+            }
             tcg_temp_free_i32(tcg_ctx, fp32);
             gen_store_fpr64(ctx, fp64, fd);
             tcg_temp_free_i64(tcg_ctx, fp64);
@@ -9039,7 +9052,11 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
             TCGv_i64 fp64 = tcg_temp_new_i64(tcg_ctx);
 
             gen_load_fpr32(ctx, fp32, fs);
-            gen_helper_float_floorl_s(tcg_ctx, fp64, tcg_ctx->cpu_env, fp32);
+            if (ctx->nan2008) {
+                gen_helper_float_floor_2008_l_s(tcg_ctx, fp64, tcg_ctx->cpu_env, fp32);
+            } else {
+                gen_helper_float_floor_l_s(tcg_ctx, fp64, tcg_ctx->cpu_env, fp32);
+            }
             tcg_temp_free_i32(tcg_ctx, fp32);
             gen_store_fpr64(ctx, fp64, fd);
             tcg_temp_free_i64(tcg_ctx, fp64);
@@ -9050,7 +9067,11 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
             TCGv_i32 fp0 = tcg_temp_new_i32(tcg_ctx);
 
             gen_load_fpr32(ctx, fp0, fs);
-            gen_helper_float_roundw_s(tcg_ctx, fp0, tcg_ctx->cpu_env, fp0);
+            if (ctx->nan2008) {
+                gen_helper_float_round_2008_w_s(tcg_ctx, fp0, tcg_ctx->cpu_env, fp0);
+            } else {
+                gen_helper_float_round_w_s(tcg_ctx, fp0, tcg_ctx->cpu_env, fp0);
+            }
             gen_store_fpr32(ctx, fp0, fd);
             tcg_temp_free_i32(tcg_ctx, fp0);
         }
@@ -9060,7 +9081,11 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
             TCGv_i32 fp0 = tcg_temp_new_i32(tcg_ctx);
 
             gen_load_fpr32(ctx, fp0, fs);
-            gen_helper_float_truncw_s(tcg_ctx, fp0, tcg_ctx->cpu_env, fp0);
+            if (ctx->nan2008) {
+                gen_helper_float_trunc_2008_w_s(tcg_ctx, fp0, tcg_ctx->cpu_env, fp0);
+            } else {
+                gen_helper_float_trunc_w_s(tcg_ctx, fp0, tcg_ctx->cpu_env, fp0);
+            }
             gen_store_fpr32(ctx, fp0, fd);
             tcg_temp_free_i32(tcg_ctx, fp0);
         }
@@ -9070,7 +9095,11 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
             TCGv_i32 fp0 = tcg_temp_new_i32(tcg_ctx);
 
             gen_load_fpr32(ctx, fp0, fs);
-            gen_helper_float_ceilw_s(tcg_ctx, fp0, tcg_ctx->cpu_env, fp0);
+            if (ctx->nan2008) {
+                gen_helper_float_ceil_2008_w_s(tcg_ctx, fp0, tcg_ctx->cpu_env, fp0);
+            } else {
+                gen_helper_float_ceil_w_s(tcg_ctx, fp0, tcg_ctx->cpu_env, fp0);
+            }
             gen_store_fpr32(ctx, fp0, fd);
             tcg_temp_free_i32(tcg_ctx, fp0);
         }
@@ -9080,7 +9109,11 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
             TCGv_i32 fp0 = tcg_temp_new_i32(tcg_ctx);
 
             gen_load_fpr32(ctx, fp0, fs);
-            gen_helper_float_floorw_s(tcg_ctx, fp0, tcg_ctx->cpu_env, fp0);
+            if (ctx->nan2008) {
+                gen_helper_float_floor_2008_w_s(tcg_ctx, fp0, tcg_ctx->cpu_env, fp0);
+            } else {
+                gen_helper_float_floor_w_s(tcg_ctx, fp0, tcg_ctx->cpu_env, fp0);
+            }
             gen_store_fpr32(ctx, fp0, fd);
             tcg_temp_free_i32(tcg_ctx, fp0);
         }
@@ -9329,7 +9362,11 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
             TCGv_i32 fp0 = tcg_temp_new_i32(tcg_ctx);
 
             gen_load_fpr32(ctx, fp0, fs);
-            gen_helper_float_cvtw_s(tcg_ctx, fp0, tcg_ctx->cpu_env, fp0);
+            if (ctx->nan2008) {
+                gen_helper_float_cvt_2008_w_s(tcg_ctx, fp0, tcg_ctx->cpu_env, fp0);
+            } else {
+                gen_helper_float_cvt_w_s(tcg_ctx, fp0, tcg_ctx->cpu_env, fp0);
+            }
             gen_store_fpr32(ctx, fp0, fd);
             tcg_temp_free_i32(tcg_ctx, fp0);
         }
@@ -9341,7 +9378,11 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
             TCGv_i64 fp64 = tcg_temp_new_i64(tcg_ctx);
 
             gen_load_fpr32(ctx, fp32, fs);
-            gen_helper_float_cvtl_s(tcg_ctx, fp64, tcg_ctx->cpu_env, fp32);
+            if (ctx->nan2008) {
+                gen_helper_float_cvt_2008_l_s(tcg_ctx, fp64, tcg_ctx->cpu_env, fp32);
+            } else {
+                gen_helper_float_cvt_l_s(tcg_ctx, fp64, tcg_ctx->cpu_env, fp32);
+            }
             tcg_temp_free_i32(tcg_ctx, fp32);
             gen_store_fpr64(ctx, fp64, fd);
             tcg_temp_free_i64(tcg_ctx, fp64);
@@ -9499,7 +9540,11 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
             TCGv_i64 fp0 = tcg_temp_new_i64(tcg_ctx);
 
             gen_load_fpr64(ctx, fp0, fs);
-            gen_helper_float_roundl_d(tcg_ctx, fp0, tcg_ctx->cpu_env, fp0);
+            if (ctx->nan2008) {
+                gen_helper_float_round_2008_l_d(tcg_ctx, fp0, tcg_ctx->cpu_env, fp0);
+            } else {
+                gen_helper_float_round_l_d(tcg_ctx, fp0, tcg_ctx->cpu_env, fp0);
+            }
             gen_store_fpr64(ctx, fp0, fd);
             tcg_temp_free_i64(tcg_ctx, fp0);
         }
@@ -9510,7 +9555,11 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
             TCGv_i64 fp0 = tcg_temp_new_i64(tcg_ctx);
 
             gen_load_fpr64(ctx, fp0, fs);
-            gen_helper_float_truncl_d(tcg_ctx, fp0, tcg_ctx->cpu_env, fp0);
+            if (ctx->nan2008) {
+                gen_helper_float_trunc_2008_l_d(tcg_ctx, fp0, tcg_ctx->cpu_env, fp0);
+            } else {
+                gen_helper_float_trunc_l_d(tcg_ctx, fp0, tcg_ctx->cpu_env, fp0);
+            }
             gen_store_fpr64(ctx, fp0, fd);
             tcg_temp_free_i64(tcg_ctx, fp0);
         }
@@ -9521,7 +9570,11 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
             TCGv_i64 fp0 = tcg_temp_new_i64(tcg_ctx);
 
             gen_load_fpr64(ctx, fp0, fs);
-            gen_helper_float_ceill_d(tcg_ctx, fp0, tcg_ctx->cpu_env, fp0);
+            if (ctx->nan2008) {
+                gen_helper_float_ceil_2008_l_d(tcg_ctx, fp0, tcg_ctx->cpu_env, fp0);
+            } else {
+                gen_helper_float_ceil_l_d(tcg_ctx, fp0, tcg_ctx->cpu_env, fp0);
+            }
             gen_store_fpr64(ctx, fp0, fd);
             tcg_temp_free_i64(tcg_ctx, fp0);
         }
@@ -9532,7 +9585,11 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
             TCGv_i64 fp0 = tcg_temp_new_i64(tcg_ctx);
 
             gen_load_fpr64(ctx, fp0, fs);
-            gen_helper_float_floorl_d(tcg_ctx, fp0, tcg_ctx->cpu_env, fp0);
+            if (ctx->nan2008) {
+                gen_helper_float_floor_2008_l_d(tcg_ctx, fp0, tcg_ctx->cpu_env, fp0);
+            } else {
+                gen_helper_float_floor_l_d(tcg_ctx, fp0, tcg_ctx->cpu_env, fp0);
+            }
             gen_store_fpr64(ctx, fp0, fd);
             tcg_temp_free_i64(tcg_ctx, fp0);
         }
@@ -9544,7 +9601,11 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
             TCGv_i64 fp64 = tcg_temp_new_i64(tcg_ctx);
 
             gen_load_fpr64(ctx, fp64, fs);
-            gen_helper_float_roundw_d(tcg_ctx, fp32, tcg_ctx->cpu_env, fp64);
+            if (ctx->nan2008) {
+                gen_helper_float_round_2008_w_d(tcg_ctx, fp32, tcg_ctx->cpu_env, fp64);
+            } else {
+                gen_helper_float_round_w_d(tcg_ctx, fp32, tcg_ctx->cpu_env, fp64);
+            }
             tcg_temp_free_i64(tcg_ctx, fp64);
             gen_store_fpr32(ctx, fp32, fd);
             tcg_temp_free_i32(tcg_ctx, fp32);
@@ -9557,7 +9618,11 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
             TCGv_i64 fp64 = tcg_temp_new_i64(tcg_ctx);
 
             gen_load_fpr64(ctx, fp64, fs);
-            gen_helper_float_truncw_d(tcg_ctx, fp32, tcg_ctx->cpu_env, fp64);
+            if (ctx->nan2008) {
+                gen_helper_float_trunc_2008_w_d(tcg_ctx, fp32, tcg_ctx->cpu_env, fp64);
+            } else {
+                gen_helper_float_trunc_w_d(tcg_ctx, fp32, tcg_ctx->cpu_env, fp64);
+            }
             tcg_temp_free_i64(tcg_ctx, fp64);
             gen_store_fpr32(ctx, fp32, fd);
             tcg_temp_free_i32(tcg_ctx, fp32);
@@ -9570,7 +9635,11 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
             TCGv_i64 fp64 = tcg_temp_new_i64(tcg_ctx);
 
             gen_load_fpr64(ctx, fp64, fs);
-            gen_helper_float_ceilw_d(tcg_ctx, fp32, tcg_ctx->cpu_env, fp64);
+            if (ctx->nan2008) {
+                gen_helper_float_ceil_2008_w_d(tcg_ctx, fp32, tcg_ctx->cpu_env, fp64);
+            } else {
+                gen_helper_float_ceil_w_d(tcg_ctx, fp32, tcg_ctx->cpu_env, fp64);
+            }
             tcg_temp_free_i64(tcg_ctx, fp64);
             gen_store_fpr32(ctx, fp32, fd);
             tcg_temp_free_i32(tcg_ctx, fp32);
@@ -9583,7 +9652,11 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
             TCGv_i64 fp64 = tcg_temp_new_i64(tcg_ctx);
 
             gen_load_fpr64(ctx, fp64, fs);
-            gen_helper_float_floorw_d(tcg_ctx, fp32, tcg_ctx->cpu_env, fp64);
+            if (ctx->nan2008) {
+                gen_helper_float_floor_2008_w_d(tcg_ctx, fp32, tcg_ctx->cpu_env, fp64);
+            } else {
+                gen_helper_float_floor_w_d(tcg_ctx, fp32, tcg_ctx->cpu_env, fp64);
+            }
             tcg_temp_free_i64(tcg_ctx, fp64);
             gen_store_fpr32(ctx, fp32, fd);
             tcg_temp_free_i32(tcg_ctx, fp32);
@@ -9856,7 +9929,11 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
             TCGv_i64 fp64 = tcg_temp_new_i64(tcg_ctx);
 
             gen_load_fpr64(ctx, fp64, fs);
-            gen_helper_float_cvtw_d(tcg_ctx, fp32, tcg_ctx->cpu_env, fp64);
+            if (ctx->nan2008) {
+                gen_helper_float_cvt_2008_w_d(tcg_ctx, fp32, tcg_ctx->cpu_env, fp64);
+            } else {
+                gen_helper_float_cvt_w_d(tcg_ctx, fp32, tcg_ctx->cpu_env, fp64);
+            }
             tcg_temp_free_i64(tcg_ctx, fp64);
             gen_store_fpr32(ctx, fp32, fd);
             tcg_temp_free_i32(tcg_ctx, fp32);
@@ -9868,7 +9945,11 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
             TCGv_i64 fp0 = tcg_temp_new_i64(tcg_ctx);
 
             gen_load_fpr64(ctx, fp0, fs);
-            gen_helper_float_cvtl_d(tcg_ctx, fp0, tcg_ctx->cpu_env, fp0);
+            if (ctx->nan2008) {
+                gen_helper_float_cvt_2008_l_d(tcg_ctx, fp0, tcg_ctx->cpu_env, fp0);
+            } else {
+                gen_helper_float_cvt_l_d(tcg_ctx, fp0, tcg_ctx->cpu_env, fp0);
+            }
             gen_store_fpr64(ctx, fp0, fd);
             tcg_temp_free_i64(tcg_ctx, fp0);
         }
@@ -19928,6 +20009,7 @@ void gen_intermediate_code(CPUMIPSState *env, struct TranslationBlock *tb)
              (env->insn_flags & (INSN_LOONGSON2E | INSN_LOONGSON2F));
     ctx.vp = (env->CP0_Config5 >> CP0C5_VP) & 1;
     ctx.mrp = (env->CP0_Config5 >> CP0C5_MRP) & 1;
+    ctx.nan2008 = (env->active_fpu.fcr31 >> FCR31_NAN2008) & 1;
     ctx.abs2008 = (env->active_fpu.fcr31 >> FCR31_ABS2008) & 1;
     restore_cpu_state(env, &ctx);
 #ifdef CONFIG_USER_ONLY