yuzu/unicorn
1
0
Fork 0
mirror of https://github.com/yuzu-emu/unicorn.git synced 2025-02-02 11:11:00 +00:00
Code Issues Packages Projects Releases Wiki Activity

target/arm: Fix ATS1Hx instructions

Browse source 
ATS1HR and ATS1HW (which allow AArch32 EL2 to do address translations
on the EL2 translation regime) were implemented in commit 14db7fe09a2c8.
However, we got them wrong: these should do stage 1 address translations
as defined for NS-EL2, which is ARMMMUIdx_S1E2. We were incorrectly
making them perform stage 2 translations.

A few years later in commit 1313e2d7e2cd we forgot entirely that
we'd implemented ATS1Hx, and added a comment that ATS1Hx were
"not supported yet". Remove the comment; there is no extra code
needed to handle these operations in do_ats_write(), because
arm_s1_regime_using_lpae_format() returns true for ARMMMUIdx_S1E2,
which forces 64-bit PAR format.

Backports commit 23463e0e4aeb2f0a9c60549a2c163f4adc0b8512 from qemu
This commit is contained in:
Peter Maydell 2018-11-11 08:39:17 -05:00 committed by Lioncash
parent a445db5c02
commit 84d5a60c15
No known key found for this signature in database
GPG key ID: 4E3C3CC1031BA9C7
1 changed files with 2 additions and 2 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

4
qemu/target/arm/helper.c
View file

@ -2034,7 +2034,7 @@ static uint64_t do_ats_write(CPUARMState *env, uint64_t value,
*
* (Note that HCR.DC makes HCR.VM behave as if it is 1.)
*
* ATS1Hx always uses the 64bit format (not supported yet).
* ATS1Hx always uses the 64bit format.
*/
format64 = arm_s1_regime_using_lpae_format(env, mmu_idx);
@ -2159,7 +2159,7 @@ static void ats1h_write(CPUARMState *env, const ARMCPRegInfo *ri,
MMUAccessType access_type = ri->opc2 & 1 ? MMU_DATA_STORE : MMU_DATA_LOAD;
uint64_t par64;
par64 = do_ats_write(env, value, access_type, ARMMMUIdx_S2NS);
par64 = do_ats_write(env, value, access_type, ARMMMUIdx_S1E2);
A32_BANKED_CURRENT_REG_SET(env, par, par64);
}