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tcg: Add tcg target default memory ordering

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Backports commit 71650df7b0ee0600308810a267a123b971b3d533 from qemu
This commit is contained in:
Pranith Kumar 2018-03-04 13:22:34 -05:00 committed by Lioncash
parent b9f06be41d
commit 862bbef07d
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GPG key ID: 4E3C3CC1031BA9C7
6 changed files with 12 additions and 0 deletions
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2
qemu/tcg/aarch64/tcg-target.h
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@ -117,4 +117,6 @@ static inline void flush_icache_range(uintptr_t start, uintptr_t stop)
__builtin___clear_cache((char *)start, (char *)stop); __builtin___clear_cache((char *)start, (char *)stop);
} }
#define TCG_TARGET_DEFAULT_MO (0)
#endif /* AARCH64_TCG_TARGET_H */ #endif /* AARCH64_TCG_TARGET_H */

2
qemu/tcg/arm/tcg-target.h
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@ -135,4 +135,6 @@ static inline void flush_icache_range(uintptr_t start, uintptr_t stop)
__builtin___clear_cache((char *) start, (char *) stop); __builtin___clear_cache((char *) start, (char *) stop);
} }
#define TCG_TARGET_DEFAULT_MO (0)
#endif #endif

2
qemu/tcg/mips/tcg-target.h
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@ -206,4 +206,6 @@ static inline void flush_icache_range(uintptr_t start, uintptr_t stop)
cacheflush ((void *)start, stop-start, ICACHE); cacheflush ((void *)start, stop-start, ICACHE);
} }
#define TCG_TARGET_DEFAULT_MO (0)
#endif #endif

2
qemu/tcg/ppc/tcg-target.h
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@ -125,4 +125,6 @@ extern bool have_isa_3_00;
void flush_icache_range(uintptr_t start, uintptr_t stop); void flush_icache_range(uintptr_t start, uintptr_t stop);
#define TCG_TARGET_DEFAULT_MO (0)
#endif #endif

2
qemu/tcg/s390/tcg-target.h
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@ -133,6 +133,8 @@ extern uint64_t s390_facilities;
#define TCG_TARGET_EXTEND_ARGS 1 #define TCG_TARGET_EXTEND_ARGS 1
#define TCG_TARGET_DEFAULT_MO (TCG_MO_ALL & ~TCG_MO_ST_LD)
enum { enum {
TCG_AREG0 = TCG_REG_R10, TCG_AREG0 = TCG_REG_R10,
}; };

2
qemu/tcg/sparc/tcg-target.h
View file

@ -162,6 +162,8 @@ extern bool use_vis3_instructions;
#define TCG_AREG0 TCG_REG_I0 #define TCG_AREG0 TCG_REG_I0
#define TCG_TARGET_DEFAULT_MO (0)
#ifdef _MSC_VER #ifdef _MSC_VER
#include <windows.h> #include <windows.h>
static inline void flush_icache_range(uintptr_t start, uintptr_t stop) static inline void flush_icache_range(uintptr_t start, uintptr_t stop)