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target/arm: Implement SVE compress active elements
Backports commit 3ca879aeb3412bc2be35d01a7bedf5fada960b5d from qemu
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@ -3330,6 +3330,8 @@
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#define helper_sve_clz_d helper_sve_clz_d_aarch64
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#define helper_sve_clz_h helper_sve_clz_h_aarch64
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#define helper_sve_clz_s helper_sve_clz_s_aarch64
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#define helper_sve_compact_d helper_sve_compact_d_aarch64
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#define helper_sve_compact_s helper_sve_compact_s_aarch64
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#define helper_sve_cnot_b helper_sve_cnot_b_aarch64
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#define helper_sve_cnot_d helper_sve_cnot_d_aarch64
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#define helper_sve_cnot_h helper_sve_cnot_h_aarch64
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@ -3330,6 +3330,8 @@
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#define helper_sve_clz_d helper_sve_clz_d_aarch64eb
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#define helper_sve_clz_h helper_sve_clz_h_aarch64eb
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#define helper_sve_clz_s helper_sve_clz_s_aarch64eb
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#define helper_sve_compact_d helper_sve_compact_d_aarch64eb
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#define helper_sve_compact_s helper_sve_compact_s_aarch64eb
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#define helper_sve_cnot_b helper_sve_cnot_b_aarch64eb
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#define helper_sve_cnot_d helper_sve_cnot_d_aarch64eb
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#define helper_sve_cnot_h helper_sve_cnot_h_aarch64eb
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@ -3351,6 +3351,8 @@ aarch64_symbols = (
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'helper_sve_clz_d',
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'helper_sve_clz_h',
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'helper_sve_clz_s',
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'helper_sve_compact_d',
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'helper_sve_compact_s',
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'helper_sve_cnot_b',
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'helper_sve_cnot_d',
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'helper_sve_cnot_h',
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@ -460,6 +460,9 @@ DEF_HELPER_FLAGS_4(sve_trn_h, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
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DEF_HELPER_FLAGS_4(sve_trn_s, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
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DEF_HELPER_FLAGS_4(sve_trn_d, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
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DEF_HELPER_FLAGS_4(sve_compact_s, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
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DEF_HELPER_FLAGS_4(sve_compact_d, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
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DEF_HELPER_FLAGS_5(sve_and_pppp, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, ptr, i32)
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DEF_HELPER_FLAGS_5(sve_bic_pppp, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, ptr, i32)
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DEF_HELPER_FLAGS_5(sve_eor_pppp, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, ptr, i32)
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@ -424,6 +424,12 @@ UZP2_z 00000101 .. 1 ..... 011 011 ..... ..... @rd_rn_rm
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TRN1_z 00000101 .. 1 ..... 011 100 ..... ..... @rd_rn_rm
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TRN2_z 00000101 .. 1 ..... 011 101 ..... ..... @rd_rn_rm
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### SVE Permute - Predicated Group
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# SVE compress active elements
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# Note esz >= 2
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COMPACT 00000101 .. 100001 100 ... ..... ..... @rd_pg_rn
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### SVE Predicate Logical Operations Group
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# SVE predicate logical operations
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@ -2035,3 +2035,37 @@ DO_TRN(sve_trn_d, uint64_t, )
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#undef DO_ZIP
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#undef DO_UZP
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#undef DO_TRN
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void HELPER(sve_compact_s)(void *vd, void *vn, void *vg, uint32_t desc)
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{
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intptr_t i, j, opr_sz = simd_oprsz(desc) / 4;
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uint32_t *d = vd, *n = vn;
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uint8_t *pg = vg;
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for (i = j = 0; i < opr_sz; i++) {
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if (pg[H1(i / 2)] & (i & 1 ? 0x10 : 0x01)) {
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d[H4(j)] = n[H4(i)];
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j++;
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}
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}
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for (; j < opr_sz; j++) {
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d[H4(j)] = 0;
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}
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}
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void HELPER(sve_compact_d)(void *vd, void *vn, void *vg, uint32_t desc)
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{
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intptr_t i, j, opr_sz = simd_oprsz(desc) / 8;
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uint64_t *d = vd, *n = vn;
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uint8_t *pg = vg;
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for (i = j = 0; i < opr_sz; i++) {
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if (pg[H1(i)] & 1) {
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d[j] = n[i];
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j++;
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}
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}
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for (; j < opr_sz; j++) {
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d[j] = 0;
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}
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}
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@ -2370,6 +2370,18 @@ static bool trans_TRN2_z(DisasContext *s, arg_rrr_esz *a, uint32_t insn)
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return do_zzz_data_ool(s, a, 1 << a->esz, trn_fns[a->esz]);
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}
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/*
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*** SVE Permute Vector - Predicated Group
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*/
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static bool trans_COMPACT(DisasContext *s, arg_rpr_esz *a, uint32_t insn)
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{
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static gen_helper_gvec_3 * const fns[4] = {
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NULL, NULL, gen_helper_sve_compact_s, gen_helper_sve_compact_d
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};
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return do_zpz_ool(s, a, fns[a->esz]);
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}
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/*
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*** SVE Memory - 32-bit Gather and Unsized Contiguous Group
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*/
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