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tcg: move TCG_MO/BAR types into own file

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We'll be using the memory ordering definitions to define values for
both the host and guest. To avoid fighting with circular header
dependencies just move these types into their own minimal header.

Backports commit 20937143145b8f5a4194e5c407731ba38797864e from qemu
This commit is contained in:
Alex Bennée 2018-03-02 09:02:55 -05:00 committed by Lioncash
parent 616becc2dc
commit 8c89344517
No known key found for this signature in database
GPG key ID: 4E3C3CC1031BA9C7
26 changed files with 97 additions and 17 deletions
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1
msvc/unicorn/aarch64-softmmu/aarch64-softmmu.vcxproj
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@ -35,6 +35,7 @@
<ClInclude Include="..\..\..\qemu\tcg\i386\tcg-target.h" />
<ClInclude Include="..\..\..\qemu\tcg\tcg-be-ldst.h" />
<ClInclude Include="..\..\..\qemu\tcg\tcg-be-null.h" />
<ClInclude Include="..\..\..\qemu\tcg\tcg-mo.h" />
<ClInclude Include="..\..\..\qemu\tcg\tcg-op.h" />
<ClInclude Include="..\..\..\qemu\tcg\tcg-opc.h" />
<ClInclude Include="..\..\..\qemu\tcg\tcg-runtime.h" />

3
msvc/unicorn/aarch64-softmmu/aarch64-softmmu.vcxproj.filters
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@ -66,6 +66,9 @@
<ClInclude Include="..\..\..\qemu\tcg\tcg-be-null.h">
<Filter>tcg</Filter>
</ClInclude>
<ClInclude Include="..\..\..\qemu\tcg\tcg-mo.h">
<Filter>tcg</Filter>
</ClInclude>
<ClInclude Include="..\..\..\qemu\tcg\tcg-op.h">
<Filter>tcg</Filter>
</ClInclude>

1
msvc/unicorn/aarch64eb-softmmu/aarch64eb-softmmu.vcxproj
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@ -35,6 +35,7 @@
<ClInclude Include="..\..\..\qemu\tcg\i386\tcg-target.h" />
<ClInclude Include="..\..\..\qemu\tcg\tcg-be-ldst.h" />
<ClInclude Include="..\..\..\qemu\tcg\tcg-be-null.h" />
<ClInclude Include="..\..\..\qemu\tcg\tcg-mo.h" />
<ClInclude Include="..\..\..\qemu\tcg\tcg-op.h" />
<ClInclude Include="..\..\..\qemu\tcg\tcg-opc.h" />
<ClInclude Include="..\..\..\qemu\tcg\tcg-runtime.h" />

3
msvc/unicorn/aarch64eb-softmmu/aarch64eb-softmmu.vcxproj.filters
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@ -66,6 +66,9 @@
<ClInclude Include="..\..\..\qemu\tcg\tcg-be-null.h">
<Filter>tcg</Filter>
</ClInclude>
<ClInclude Include="..\..\..\qemu\tcg\tcg-mo.h">
<Filter>tcg</Filter>
</ClInclude>
<ClInclude Include="..\..\..\qemu\tcg\tcg-op.h">
<Filter>tcg</Filter>
</ClInclude>

1
msvc/unicorn/arm-softmmu/arm-softmmu.vcxproj
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@ -34,6 +34,7 @@
<ClInclude Include="..\..\..\qemu\tcg\i386\tcg-target.h" />
<ClInclude Include="..\..\..\qemu\tcg\tcg-be-ldst.h" />
<ClInclude Include="..\..\..\qemu\tcg\tcg-be-null.h" />
<ClInclude Include="..\..\..\qemu\tcg\tcg-mo.h" />
<ClInclude Include="..\..\..\qemu\tcg\tcg-op.h" />
<ClInclude Include="..\..\..\qemu\tcg\tcg-opc.h" />
<ClInclude Include="..\..\..\qemu\tcg\tcg-runtime.h" />

3
msvc/unicorn/arm-softmmu/arm-softmmu.vcxproj.filters
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@ -33,6 +33,9 @@
<ClInclude Include="..\..\..\qemu\tcg\tcg-be-null.h">
<Filter>tcg</Filter>
</ClInclude>
<ClInclude Include="..\..\..\qemu\tcg\tcg-mo.h">
<Filter>tcg</Filter>
</ClInclude>
<ClInclude Include="..\..\..\qemu\tcg\tcg-op.h">
<Filter>tcg</Filter>
</ClInclude>

1
msvc/unicorn/armeb-softmmu/armeb-softmmu.vcxproj
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@ -34,6 +34,7 @@
<ClInclude Include="..\..\..\qemu\tcg\i386\tcg-target.h" />
<ClInclude Include="..\..\..\qemu\tcg\tcg-be-ldst.h" />
<ClInclude Include="..\..\..\qemu\tcg\tcg-be-null.h" />
<ClInclude Include="..\..\..\qemu\tcg\tcg-mo.h" />
<ClInclude Include="..\..\..\qemu\tcg\tcg-op.h" />
<ClInclude Include="..\..\..\qemu\tcg\tcg-opc.h" />
<ClInclude Include="..\..\..\qemu\tcg\tcg-runtime.h" />

3
msvc/unicorn/armeb-softmmu/armeb-softmmu.vcxproj.filters
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@ -63,6 +63,9 @@
<ClInclude Include="..\..\..\qemu\tcg\tcg-be-null.h">
<Filter>tcg</Filter>
</ClInclude>
<ClInclude Include="..\..\..\qemu\tcg\tcg-mo.h">
<Filter>tcg</Filter>
</ClInclude>
<ClInclude Include="..\..\..\qemu\tcg\tcg-op.h">
<Filter>tcg</Filter>
</ClInclude>

1
msvc/unicorn/m68k-softmmu/m68k-softmmu.vcxproj
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@ -24,6 +24,7 @@
<ClInclude Include="..\..\..\qemu\tcg\i386\tcg-target.h" />
<ClInclude Include="..\..\..\qemu\tcg\tcg-be-ldst.h" />
<ClInclude Include="..\..\..\qemu\tcg\tcg-be-null.h" />
<ClInclude Include="..\..\..\qemu\tcg\tcg-mo.h" />
<ClInclude Include="..\..\..\qemu\tcg\tcg-op.h" />
<ClInclude Include="..\..\..\qemu\tcg\tcg-opc.h" />
<ClInclude Include="..\..\..\qemu\tcg\tcg-runtime.h" />

3
msvc/unicorn/m68k-softmmu/m68k-softmmu.vcxproj.filters
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@ -33,6 +33,9 @@
<ClInclude Include="..\..\..\qemu\tcg\tcg-be-null.h">
<Filter>tcg</Filter>
</ClInclude>
<ClInclude Include="..\..\..\qemu\tcg\tcg-mo.h">
<Filter>tcg</Filter>
</ClInclude>
<ClInclude Include="..\..\..\qemu\tcg\tcg-op.h">
<Filter>tcg</Filter>
</ClInclude>

1
msvc/unicorn/mips-softmmu/mips-softmmu.vcxproj
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@ -29,6 +29,7 @@
<ClInclude Include="..\..\..\qemu\tcg\i386\tcg-target.h" />
<ClInclude Include="..\..\..\qemu\tcg\tcg-be-ldst.h" />
<ClInclude Include="..\..\..\qemu\tcg\tcg-be-null.h" />
<ClInclude Include="..\..\..\qemu\tcg\tcg-mo.h" />
<ClInclude Include="..\..\..\qemu\tcg\tcg-op.h" />
<ClInclude Include="..\..\..\qemu\tcg\tcg-opc.h" />
<ClInclude Include="..\..\..\qemu\tcg\tcg-runtime.h" />

3
msvc/unicorn/mips-softmmu/mips-softmmu.vcxproj.filters
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@ -36,6 +36,9 @@
<ClInclude Include="..\..\..\qemu\tcg\tcg-be-null.h">
<Filter>tcg</Filter>
</ClInclude>
<ClInclude Include="..\..\..\qemu\tcg\tcg-mo.h">
<Filter>tcg</Filter>
</ClInclude>
<ClInclude Include="..\..\..\qemu\tcg\tcg-op.h">
<Filter>tcg</Filter>
</ClInclude>

1
msvc/unicorn/mips64-softmmu/mips64-softmmu.vcxproj
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@ -29,6 +29,7 @@
<ClInclude Include="..\..\..\qemu\tcg\i386\tcg-target.h" />
<ClInclude Include="..\..\..\qemu\tcg\tcg-be-ldst.h" />
<ClInclude Include="..\..\..\qemu\tcg\tcg-be-null.h" />
<ClInclude Include="..\..\..\qemu\tcg\tcg-mo.h" />
<ClInclude Include="..\..\..\qemu\tcg\tcg-op.h" />
<ClInclude Include="..\..\..\qemu\tcg\tcg-opc.h" />
<ClInclude Include="..\..\..\qemu\tcg\tcg-runtime.h" />

3
msvc/unicorn/mips64-softmmu/mips64-softmmu.vcxproj.filters
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@ -36,6 +36,9 @@
<ClInclude Include="..\..\..\qemu\tcg\tcg-be-null.h">
<Filter>tcg</Filter>
</ClInclude>
<ClInclude Include="..\..\..\qemu\tcg\tcg-mo.h">
<Filter>tcg</Filter>
</ClInclude>
<ClInclude Include="..\..\..\qemu\tcg\tcg-op.h">
<Filter>tcg</Filter>
</ClInclude>

1
msvc/unicorn/mips64el-softmmu/mips64el-softmmu.vcxproj
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@ -29,6 +29,7 @@
<ClInclude Include="..\..\..\qemu\tcg\i386\tcg-target.h" />
<ClInclude Include="..\..\..\qemu\tcg\tcg-be-ldst.h" />
<ClInclude Include="..\..\..\qemu\tcg\tcg-be-null.h" />
<ClInclude Include="..\..\..\qemu\tcg\tcg-mo.h" />
<ClInclude Include="..\..\..\qemu\tcg\tcg-op.h" />
<ClInclude Include="..\..\..\qemu\tcg\tcg-opc.h" />
<ClInclude Include="..\..\..\qemu\tcg\tcg-runtime.h" />

3
msvc/unicorn/mips64el-softmmu/mips64el-softmmu.vcxproj.filters
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@ -36,6 +36,9 @@
<ClInclude Include="..\..\..\qemu\tcg\tcg-be-null.h">
<Filter>tcg</Filter>
</ClInclude>
<ClInclude Include="..\..\..\qemu\tcg\tcg-mo.h">
<Filter>tcg</Filter>
</ClInclude>
<ClInclude Include="..\..\..\qemu\tcg\tcg-op.h">
<Filter>tcg</Filter>
</ClInclude>

1
msvc/unicorn/mipsel-softmmu/mipsel-softmmu.vcxproj
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@ -29,6 +29,7 @@
<ClInclude Include="..\..\..\qemu\tcg\i386\tcg-target.h" />
<ClInclude Include="..\..\..\qemu\tcg\tcg-be-ldst.h" />
<ClInclude Include="..\..\..\qemu\tcg\tcg-be-null.h" />
<ClInclude Include="..\..\..\qemu\tcg\tcg-mo.h" />
<ClInclude Include="..\..\..\qemu\tcg\tcg-op.h" />
<ClInclude Include="..\..\..\qemu\tcg\tcg-opc.h" />
<ClInclude Include="..\..\..\qemu\tcg\tcg-runtime.h" />

3
msvc/unicorn/mipsel-softmmu/mipsel-softmmu.vcxproj.filters
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@ -36,6 +36,9 @@
<ClInclude Include="..\..\..\qemu\tcg\tcg-be-null.h">
<Filter>tcg</Filter>
</ClInclude>
<ClInclude Include="..\..\..\qemu\tcg\tcg-mo.h">
<Filter>tcg</Filter>
</ClInclude>
<ClInclude Include="..\..\..\qemu\tcg\tcg-op.h">
<Filter>tcg</Filter>
</ClInclude>

1
msvc/unicorn/sparc-softmmu/sparc-softmmu.vcxproj
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@ -24,6 +24,7 @@
<ClInclude Include="..\..\..\qemu\tcg\i386\tcg-target.h" />
<ClInclude Include="..\..\..\qemu\tcg\tcg-be-ldst.h" />
<ClInclude Include="..\..\..\qemu\tcg\tcg-be-null.h" />
<ClInclude Include="..\..\..\qemu\tcg\tcg-mo.h" />
<ClInclude Include="..\..\..\qemu\tcg\tcg-op.h" />
<ClInclude Include="..\..\..\qemu\tcg\tcg-opc.h" />
<ClInclude Include="..\..\..\qemu\tcg\tcg-runtime.h" />

3
msvc/unicorn/sparc-softmmu/sparc-softmmu.vcxproj.filters
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@ -33,6 +33,9 @@
<ClInclude Include="..\..\..\qemu\tcg\tcg-be-null.h">
<Filter>tcg</Filter>
</ClInclude>
<ClInclude Include="..\..\..\qemu\tcg\tcg-mo.h">
<Filter>tcg</Filter>
</ClInclude>
<ClInclude Include="..\..\..\qemu\tcg\tcg-op.h">
<Filter>tcg</Filter>
</ClInclude>

1
msvc/unicorn/sparc64-softmmu/sparc64-softmmu.vcxproj
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@ -24,6 +24,7 @@
<ClInclude Include="..\..\..\qemu\tcg\i386\tcg-target.h" />
<ClInclude Include="..\..\..\qemu\tcg\tcg-be-ldst.h" />
<ClInclude Include="..\..\..\qemu\tcg\tcg-be-null.h" />
<ClInclude Include="..\..\..\qemu\tcg\tcg-mo.h" />
<ClInclude Include="..\..\..\qemu\tcg\tcg-op.h" />
<ClInclude Include="..\..\..\qemu\tcg\tcg-opc.h" />
<ClInclude Include="..\..\..\qemu\tcg\tcg-runtime.h" />

3
msvc/unicorn/sparc64-softmmu/sparc64-softmmu.vcxproj.filters
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@ -33,6 +33,9 @@
<ClInclude Include="..\..\..\qemu\tcg\tcg-be-null.h">
<Filter>tcg</Filter>
</ClInclude>
<ClInclude Include="..\..\..\qemu\tcg\tcg-mo.h">
<Filter>tcg</Filter>
</ClInclude>
<ClInclude Include="..\..\..\qemu\tcg\tcg-op.h">
<Filter>tcg</Filter>
</ClInclude>

1
msvc/unicorn/x86_64-softmmu/x86_64-softmmu.vcxproj
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@ -34,6 +34,7 @@
<ClInclude Include="..\..\..\qemu\tcg\i386\tcg-target.h" />
<ClInclude Include="..\..\..\qemu\tcg\tcg-be-ldst.h" />
<ClInclude Include="..\..\..\qemu\tcg\tcg-be-null.h" />
<ClInclude Include="..\..\..\qemu\tcg\tcg-mo.h" />
<ClInclude Include="..\..\..\qemu\tcg\tcg-op.h" />
<ClInclude Include="..\..\..\qemu\tcg\tcg-opc.h" />
<ClInclude Include="..\..\..\qemu\tcg\tcg-runtime.h" />

3
msvc/unicorn/x86_64-softmmu/x86_64-softmmu.vcxproj.filters
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@ -33,6 +33,9 @@
<ClInclude Include="..\..\..\qemu\tcg\tcg-be-null.h">
<Filter>tcg</Filter>
</ClInclude>
<ClInclude Include="..\..\..\qemu\tcg\tcg-mo.h">
<Filter>tcg</Filter>
</ClInclude>
<ClInclude Include="..\..\..\qemu\tcg\tcg-op.h">
<Filter>tcg</Filter>
</ClInclude>

48
qemu/tcg/tcg-mo.h Normal file
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@ -0,0 +1,48 @@
/*
* Tiny Code Generator for QEMU
*
* Copyright (c) 2008 Fabrice Bellard
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#ifndef TCG_MO_H
#define TCG_MO_H
typedef enum {
/* Used to indicate the type of accesses on which ordering
is to be ensured. Modeled after SPARC barriers.
This is of the form TCG_MO_A_B where A is before B in program order.
*/
TCG_MO_LD_LD = 0x01,
TCG_MO_ST_LD = 0x02,
TCG_MO_LD_ST = 0x04,
TCG_MO_ST_ST = 0x08,
TCG_MO_ALL = 0x0F, /* OR of the above */
/* Used to indicate the kind of ordering which is to be ensured by the
instruction. These types are derived from x86/aarch64 instructions.
It should be noted that these are different from C11 semantics. */
TCG_BAR_LDAQ = 0x10, /* Following ops will not come forward */
TCG_BAR_STRL = 0x20, /* Previous ops will not be delayed */
TCG_BAR_SC = 0x30, /* No ops cross barrier; OR of the above */
} TCGBar;
#endif /* TCG_MO_H */

18
qemu/tcg/tcg.h
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@ -29,6 +29,7 @@
#include "cpu.h"
#include "exec/tb-context.h"
#include "qemu/bitops.h"
#include "tcg-mo.h"
#include "tcg-target.h"
#include "exec/exec-all.h"
@ -501,23 +502,6 @@ static inline intptr_t QEMU_ARTIFICIAL GET_TCGV_PTR(TCGv_ptr t)
#define TCG_CALL_DUMMY_TCGV MAKE_TCGV_I32(-1)
#define TCG_CALL_DUMMY_ARG ((TCGArg)(-1))
typedef enum {
/* Used to indicate the type of accesses on which ordering
is to be ensured. Modeled after SPARC barriers. */
TCG_MO_LD_LD = 0x01,
TCG_MO_ST_LD = 0x02,
TCG_MO_LD_ST = 0x04,
TCG_MO_ST_ST = 0x08,
TCG_MO_ALL = 0x0F, /* OR of the above */
/* Used to indicate the kind of ordering which is to be ensured by the
instruction. These types are derived from x86/aarch64 instructions.
It should be noted that these are different from C11 semantics. */
TCG_BAR_LDAQ = 0x10, /* Following ops will not come forward */
TCG_BAR_STRL = 0x20, /* Previous ops will not be delayed */
TCG_BAR_SC = 0x30, /* No ops cross barrier; OR of the above */
} TCGBar;
/* Conditions. Note that these are laid out for easy manipulation by
the functions below:
bit 0 is used for inverting;