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target/arm: Support multiple EL change hooks

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Backports commit 08267487c99e8150382420936ab72c1e0ad74ce3 from qemu
This commit is contained in:
Aaron Lindsay 2018-04-26 09:13:27 -04:00 committed by Lioncash
parent dfe1f54920
commit 8caf217d26
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GPG key ID: 4E3C3CC1031BA9C7
3 changed files with 30 additions and 18 deletions
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21
qemu/target/arm/cpu.c
View file

@ -49,13 +49,15 @@ static bool arm_cpu_has_work(CPUState *cs)
| CPU_INTERRUPT_EXITTB);
}
void arm_register_el_change_hook(ARMCPU *cpu, ARMELChangeHook *hook,
void arm_register_el_change_hook(ARMCPU *cpu, ARMELChangeHookFn *hook,
void *opaque)
{
/* We currently only support registering a single hook function */
assert(!cpu->el_change_hook);
cpu->el_change_hook = hook;
cpu->el_change_hook_opaque = opaque;
ARMELChangeHook *entry = g_new0(ARMELChangeHook, 1);
entry->hook = hook;
entry->opaque = opaque;
QLIST_INSERT_HEAD(&cpu->el_change_hooks, entry, node);
}
static void cp_reg_reset(gpointer key, gpointer value, gpointer opaque)
@ -438,6 +440,8 @@ static void arm_cpu_initfn(struct uc_struct *uc, Object *obj, void *opaque)
cpu->cp_regs = g_hash_table_new_full(g_int_hash, g_int_equal,
g_free, g_free);
QLIST_INIT(&cpu->el_change_hooks);
/* This cpu-id-to-MPIDR affinity is used only for TCG; KVM will override it.
* We don't support setting cluster ID ([16..23]) (known as Aff2
* in later ARM ARM versions), or any of the higher affinity level fields,
@ -531,7 +535,14 @@ static void arm_cpu_post_init(struct uc_struct *uc, Object *obj)
static void arm_cpu_finalizefn(struct uc_struct *uc, Object *obj, void *opaque)
{
ARMCPU *cpu = ARM_CPU(uc, obj);
ARMELChangeHook *hook, *next;
g_hash_table_destroy(cpu->cp_regs);
QLIST_FOREACH_SAFE(hook, &cpu->el_change_hooks, node, next) {
QLIST_REMOVE(hook, node);
g_free(hook);
}
}
static int arm_cpu_realizefn(struct uc_struct *uc, DeviceState *dev, Error **errp)

20
qemu/target/arm/cpu.h
View file

@ -639,12 +639,17 @@ typedef struct CPUARMState {
} CPUARMState;
/**
* ARMELChangeHook:
* ARMELChangeHookFn:
* type of a function which can be registered via arm_register_el_change_hook()
* to get callbacks when the CPU changes its exception level or mode.
*/
typedef void ARMELChangeHook(ARMCPU *cpu, void *opaque);
typedef void ARMELChangeHookFn(ARMCPU *cpu, void *opaque);
typedef struct ARMELChangeHook ARMELChangeHook;
struct ARMELChangeHook {
ARMELChangeHookFn *hook;
void *opaque;
QLIST_ENTRY(ARMELChangeHook) node;
};
/* These values map onto the return values for
* QEMU_PSCI_0_2_FN_AFFINITY_INFO */
@ -814,8 +819,7 @@ typedef struct ARMCPU {
*/
bool cfgend;
ARMELChangeHook *el_change_hook;
void *el_change_hook_opaque;
QLIST_HEAD(, ARMELChangeHook) el_change_hooks;
int32_t node_id; /* NUMA node this CPU belongs to */
} ARMCPU;
@ -2854,12 +2858,8 @@ static inline AddressSpace *arm_addressspace(CPUState *cs, MemTxAttrs attrs)
* CPU changes exception level or mode. The hook function will be
* passed a pointer to the ARMCPU and the opaque data pointer passed
* to this function when the hook was registered.
*
* Note that we currently only support registering a single hook function,
* and will assert if this function is called twice.
* This facility is intended for the use of the GICv3 emulation.
*/
void arm_register_el_change_hook(ARMCPU *cpu, ARMELChangeHook *hook,
void arm_register_el_change_hook(ARMCPU *cpu, ARMELChangeHookFn *hook,
void *opaque);
/**

7
qemu/target/arm/internals.h
View file

@ -729,11 +729,12 @@ void arm_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr,
int mmu_idx, MemTxAttrs attrs,
MemTxResult response, uintptr_t retaddr);
/* Call the EL change hook if one has been registered */
/* Call any registered EL change hooks */
static inline void arm_call_el_change_hook(ARMCPU *cpu)
{
if (cpu->el_change_hook) {
cpu->el_change_hook(cpu, cpu->el_change_hook_opaque);
ARMELChangeHook *hook, *next;
QLIST_FOREACH_SAFE(hook, &cpu->el_change_hooks, node, next) {
hook->hook(cpu, hook->opaque);
}
}