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target/arm/translate.c: Fix missing 'break' for TT insns
The code where we added the TT instruction was accidentally missing a 'break', which meant that after generating the code to execute the TT we would fall through to 'goto illegal_op' and generate code to take an UNDEF insn. Backports commit 384c6c03fb687bea239a5990a538c4bc50fdcecb from qemu
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@ -10104,6 +10104,7 @@ static void disas_thumb2_insn(DisasContext *s, uint32_t insn)
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tcg_temp_free_i32(tcg_ctx, addr);
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tcg_temp_free_i32(tcg_ctx, addr);
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tcg_temp_free_i32(tcg_ctx, op);
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tcg_temp_free_i32(tcg_ctx, op);
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store_reg(s, rd, ttresp);
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store_reg(s, rd, ttresp);
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break;
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}
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}
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goto illegal_op;
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goto illegal_op;
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}
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}
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