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target/arm/translate.c: Fix missing 'break' for TT insns

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The code where we added the TT instruction was accidentally
missing a 'break', which meant that after generating the code
to execute the TT we would fall through to 'goto illegal_op'
and generate code to take an UNDEF insn.

Backports commit 384c6c03fb687bea239a5990a538c4bc50fdcecb from qemu
This commit is contained in:
Peter Maydell 2018-03-07 11:45:32 -05:00 committed by Lioncash
parent 02516c53ff
commit 8e7ecd89a4
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qemu/target/arm/translate.c
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@ -10104,6 +10104,7 @@ static void disas_thumb2_insn(DisasContext *s, uint32_t insn)
tcg_temp_free_i32(tcg_ctx, addr); tcg_temp_free_i32(tcg_ctx, addr);
tcg_temp_free_i32(tcg_ctx, op); tcg_temp_free_i32(tcg_ctx, op);
store_reg(s, rd, ttresp); store_reg(s, rd, ttresp);
break;
} }
goto illegal_op; goto illegal_op;
} }